Abstract: A method and an apparatus for generating an image are provided. The method includes: acquiring a screenshot of a webpage preloaded by a terminal as a source image; recognizing connection areas in the source image, and generating first circumscribed rectangular frames outside outlines of the connection areas; combining, in response to determining that a distance between the connection areas is smaller than a preset distance threshold, the connection areas, and generating a second circumscribed rectangular frame outside outlines of the combined connection areas; and generating, based on a nested relationship between the first circumscribed rectangular frames and the second circumscribed rectangular frames and pictures in the first circumscribed rectangular frames, a target image. The first circumscribed rectangular frames and the second circumscribed rectangular frame are respectively generated by recognizing and combining the connection areas in the source image.

Abstract: The present application relates to a field of smart searching technology, and provides a method and an apparatus for searching a multimedia content, a device, and a storage medium. The method includes: acquiring a query vector of query information; determining, from a search library, a first category matching the query vector, wherein the search library comprises a plurality of categories, each of the categories comprises a plurality of vectors, and each of the vectors is associated with a corresponding multimedia content; and inquiring, in the first category, a target vector matching the query vector, and acquiring the multimedia content corresponding to the target vector.

Abstract: A transistor structure is provided, the structure may be for a high electron mobility transistor (HEMT). The HEMT comprises a channel layer arranged over a substrate, the channel layer may have a top surface. A barrier layer may be arranged over the channel layer. A first opening may be in the barrier layer and extend partially into the channel layer. A first barrier liner may be arranged in the first opening and over the channel layer, the first barrier liner may have a bottom surface. The bottom surface of the first barrier liner may be lower than the top surface of the channel layer.

Abstract: Disclosed are embodiments of a transistor (e.g., a III-V high electron mobility transistor (HEMT), a III-V metal-insulator-semiconductor HEMT (MISHEMT), or the like) that has multiple self-aligned terminals. The self-aligned terminals include a self-aligned gate, a self-aligned source terminal and, optionally, a self-aligned drain terminal. By forming self-aligned terminals during processing, the separation distances between the terminals (e.g., between the gate and source terminal and, optionally, between the gate and drain terminal) can be reduced in order to reduce device size and to improve performance (e.g., to reduce on resistance and increase switching speeds). Also disclosed herein are method embodiments for forming such a transistor.

Abstract: An interface includes a first functional part and a second functional part. The first functional part is configured to implement processing dependent on a medium access control (MAC) rate, and the second functional part is configured to implement processing independent of the MAC rate.

Abstract: A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a semiconductor device with a dual isolation structure and methods of manufacture. The structure includes: a dual isolation structure including semiconductor material; and an active device region including a channel material and a gate metal material over the channel material. The channel material is between the dual isolation structure and the gate metal material includes a bottom surface not extending beyond a sidewall of the dual isolation structure.

Abstract: Disclosed is an integrated circuit (IC) structure that includes a through-metal through-substrate interconnect. The interconnect extends essentially vertically through a device level metallic feature on a frontside of a substrate, extends downward from the device level metallic feature into or completely through the substrate (e.g., to contact a backside metallic feature below), and extends upward from the device level metallic feature through interlayer dielectric (ILD) material (e.g., to contact a BEOL metallic feature above). The device level metallic feature can be, for example, a metallic source/drain region of a transistor, such as a high electron mobility transistor (HEMT) or a metal-insulator-semiconductor high electron mobility transistor (MISHEMT), which is formed on the frontside of the substrate. The backside metallic feature can be a grounded metal layer. The BEOL metallic feature can be a metal wire in one of the BEOL metal levels. Also disclosed is an associated method.

Abstract: A codeword synchronization method includes determining a candidate in a plurality of bits of a data sequence received by a receive end, and determining a synchronization position based on the candidate bit, where the synchronization position indicates a start position of a codeword in the data sequence.

Abstract: A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to series inductors and methods of manufacture. A structure includes a plurality of wiring levels each of which include a wiring structure connected in series to one another. A second wiring level being located above a first wiring level of the plurality of wiring levels. A wiring structure on the second wiring level being at least partially outside boundaries of the wiring structure of the first wiring level.

Abstract: Aspects extend to methods, systems, and computer program products for ranking contextual metadata to generate relevant data insights. Aspects of the invention can be used to enhance data analytics by automatically deriving relevance signals used to generate insights closely related to the context in which a user is exploring or analyzing data. User experiences can include embedded data visualizations, search engines, and natural language querying systems to help users understand their data more effectively. By utilizing metrics on the relevance information, insights related and/or relevant to the context in which the user is analyzing data can be created. Thus, relevance information can define a scope for a variety of automatically generated insights of data. Insight generation can be based on computed relevance signals that target areas interesting to users.

Abstract: A first network device determines configuration information of a target flexible Ethernet (FlexE) group that needs to be adjusted, and adjusts the target FlexE group synchronously with a second network device based on the configuration information of the target FlexE group. The second network device communicates with the first network device through a physical layer link in the target FlexE group. The configuration information of the target FlexE group includes a backup FlexE group number and a backup FlexE map of the target FlexE group, and the backup FlexE map includes information about the physical layer link in the target FlexE group. The first network device and the second network device perform synchronous adjustment. In this way, embodiments of this application provide a management solution for losslessly and dynamically adjusting a FlexE group, to avoid impact on a service and implement FlexE group adjustment in various scenarios.

Abstract: This disclosure provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.

Abstract: A method includes periodically inserting another AM into a data stream (DS) to obtain a second DS, and the first data stream includes a first alignment marker (AM); sending the second DS through physical lanes (PLs), where a quantity of the PLs is not equal to 2n, where the second AM's insertion period and each second AM's size is based on condition 1 or 2, where condition 1 is the quantity of the PLs, where condition 2 is condition 1 and a ratio of the second DS's rate to the first DS's rate, the second AM's insertion period and each second AM's size is an integer multiple of the quantity of the PLs, and where the second DS's rate is not less than the first DS's rate, and traffic per unit time corresponding to the rate of the second DS is an integer multiple of the quantity of the PLs.

Abstract: Provided herein are electret-MOF filter embedded with particles derived from metal-organic frameworks (MOF) and their methods of manufacturing. The methods of manufacturing the electret-MOF filter can include suspending MOF particles in a solvent to form a MOF particle mixture, contacting a charged polymeric fibrous web with the MOF particle mixture, and coating the charged polymeric fibrous web with the MOF particles by flowing the MOF particle mixture through an inverse side of the polymeric fibrous web. The disclosed coating method can deposit MOF particles uniformly, without formation of films at interstitial spaces between fibers. The electret-MOF filter can simultaneously remove fine particulate matters (PMs) and hazardous gaseous pollutants (including volatile organic compounds (VOCs)) with high particle holding and gas adsorption capacities, and with very low air resistance.

Abstract: An interface obtains basic page information from another interface. The basic page information includes N bits, the N bits include an FEC function indicator bit sequence including an FEC ability indicator bit and an FEC requested indicator bit. The interface determines, based on values of a plurality of bits in the N bits, an operation mode supported by the another interface. The FEC function indicator bit sequence includes a first FEC function indicator bit corresponding to m FEC abilities; or the FEC function indicator bit sequence includes a first FEC ability indicator bit corresponding to n FEC abilities, where both m and n are greater than or equal to 1. Because one FEC function indicator bit indicates more FEC abilities, N bits in a basic page can carry more information, so that a process of increasing auto-negotiation pages is slowed down, thereby avoiding impact on auto-negotiation efficiency.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to tight pitch wirings and capacitors and methods of manufacture. The structure includes: a capacitor including: a bottom plate of a first conductive material; an insulator material on the bottom plate; and a top plate of a second conductive material on the insulator material; and a plurality of wirings on a same level as the bottom plate and composed of the second conductive material.

Abstract: This application relates to a slot negotiation method and a device. The method includes: A transmitter sends a first FlexE overhead frame to a receiver, to request active/standby calendar switching. When the receiver is in a restart state, the receiver does not respond to the received first FlexE overhead frame. In addition, the RX sends a routine update second FlexE overhead frame to the transmitter. Determining that the second FlexE overhead frame is not a response to the first FlexE overhead frame, the transmitter sends a third FlexE overhead frame to request active/standby calendar switching again. According to the method in this application, incorrect calendar switching on the transmitter side caused by a mistaken response of the receiver can be avoided. This reduces the likelihood of a service interruption caused by the existing slot negotiation mechanism.

Abstract: This application provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.