Abstract: A data processing method includes: generating a service serial number for a target service according to a preset naming rule; obtaining service data of the target service; obtaining a target data table from a plurality of pre-configured data tables, according to the service serial number; and storing the service data to the target data table.

Abstract: An apparatus includes a control circuit and a plurality of non-volatile memory cells arranged in a plane of a memory die. The plane includes a first word line including a first word line portion coupled to a corresponding first group of the non-volatile memory cells, and a second word line including a second word line portion coupled to a corresponding second group of the non-volatile memory cells, the second word line different from the first word line. The control circuit is configured to apply a first voltage to the first word line portion and apply a second voltage to the second word line portion to concurrently read the first group of the non-volatile memory cells and the second group of the non-volatile memory cells. The first group of the non-volatile memory cells and the second group of the non-volatile memory cells each store less than a page of data.

Abstract: The present disclosure provides a method and system for processing an obstacle detection result of an ultrasonic sensor array. The method comprises: obtaining obstacle coordinates collected by ultrasonic sensors in an ultrasonic sensor array; inputting the obstacle coordinates collected by ultrasonic sensors in the ultrasonic sensor array into a pre-trained neural network model, to obtain true or false labels for the obstacle coordinates collected by the ultrasonic sensors output by the pre-trained neural network model; process the obstacle coordinates collected by the ultrasonic sensors in the ultrasonic sensor array according to the true or false labels. The present disclosure improves the accuracy in the obstacle detection of the ultrasonic sensor array, avoids detection error and omission and improves the driving safety.

Abstract: Techniques regarding star polymers with enhanced antimicrobial functionality are provided. For example, a polymer is provided that can comprise a core that can have a singlet oxygen generator and that can generate a singlet oxygen species upon irradiation with light. The polymer can also comprise a plurality of polycarbonate arms covalently bonded to the core. The plurality of polycarbonate arms can be degradable and can comprise a cation. Further, the plurality of polycarbonate arms can have antimicrobial functionality.

Abstract: An apparatus includes a control circuit configured to connect to memory cells connected in series in NAND strings. Each NAND string includes a plurality of data memory cells coupled to a plurality of data word lines in series with a plurality of dummy memory cells connected to a plurality of dummy word lines. The control circuit configured to apply a first dummy word line voltage to one or more dummy word lines of the plurality of dummy word lines in a verify step of a program operation to program data memory cells. The control circuit is configured to apply a second dummy word line voltage to the one or more dummy word lines in a read operation to read the data memory cells.

Abstract: A provided a storage device configured to support a number of namespaces. The storage device includes a memory and a controller coupled to the memory. The controller includes a host interface layer and a flash translation layer configured to report to the host interface layer a first over-provisioning chunk from an over-provisioning pool and a first chunk separate from the over-provisioning pool. The controller is configured to receive a command at the host interface layer to utilize a portion of the memory for a first namespace from among the number of namespaces and the first namespace includes an unaligned chunk. The controller is configured to utilize the first over-provisioning chunk as the unaligned chunk of the first namespace. A number of over-provisioning chunks to be utilized as unaligned chunks is less than the number of namespaces.

Abstract: A method for providing more reliable output when conducting a live product demonstration is disclosed. In one embodiment, such a method initiates, on a client system, a live product demonstration by executing a function on a live demonstration server. In the event the function fails, the method saves a breakpoint associated with the live product demonstration. The method checks the availability of a standby demonstration server. In the event the standby demonstration server is available, the method automatically continues, from the breakpoint, the live product demonstration by executing the function on the standby demonstration server. If the standby demonstration server is not available, the method may return an error message to the client system. In the event the live demonstration server is recovered, the method may resume the live product demonstration by executing the function on the live demonstration server. A corresponding system and computer program product are also disclosed.

Abstract: The present disclosure provides a routing structure. The routing structure includes a substrate having a boundary and a first conductive trace configured to be coupled to a first conductive pad disposed within the boundary of the substrate. The first conductive trace is inclined with respect to the boundary of the substrate.

Abstract: A preparation method of a zeolite/polyimide composite membrane includes: synthesizing a zeolite-doped polyamic acid precursor casting solution by condensation polymerization synthesis; coating a substrate with the obtained casting solution, and obtaining a zeolite/polyamic acid composite porous membrane by non-solvent induced phase separation; and obtaining the zeolite/polyimide composite membrane by performing thermal imidization on the zeolite/polyamic acid composite porous membrane through gradient heating.

Abstract: Provided are a light source module and a backlight display module. The light source module includes a flexible printed circuit board and a plurality of side-emitting LEDs. The flexible printed circuit board extends along a central axis. The plurality of side-emitting LEDs are sequentially arranged along the central axis and bonded to the flexible printed circuit board, and a light-emitting surface of one side-emitting LED of the plurality of side-emitting LEDs is perpendicular to a bonding surface of the flexible printed circuit board.

Abstract: The present disclosure relates to the technical field of wastewater treatment, and provides a wastewater treatment method and apparatus based on hydrate-based water vapor adsorption. The apparatus includes a wastewater evaporation zone, a hydrate formation zone, a hydrate decomposition zone, and a data acquisition and control system. Rising water vapor and condensed water formed during evaporation of wastewater at normal temperature react with a hydrate former on a cooling wall surface to form a hydrate, continuous evaporation of the wastewater is promoted, the hydrate is scraped off to a collecting zone below by a scraper after being formed, and the hydrate is decomposed into fresh water, thereby realizing wastewater treatment. The present disclosure provides a method for treating complex wastewater containing a plurality of pollutants, where water vapor is consumed to form the hydrate to promote wastewater evaporation, and water obtained from the decomposition does not contain pollutants theoretically.

Abstract: The memory device includes at least one memory block with source and drain sides and a plurality of memory cells arranged in a plurality of word lines. The word lines are arranged in a plurality of independently programmable and erasable sub-blocks. Control circuitry is configured to program the memory cells of a selected sub-block and determine a location of the within the at least one memory block and determine a programming condition of at least one unselected sub-block. The control circuitry is also configured to program at least one word line in the selected sub-block in a plurality of program loops that include pre-charging processes. The control circuitry pre-charges a plurality of channels from either the source or drain side based on at least one of the location of the selected sub-block within the memory block and the programming condition of the at least one unselected sub-block.

Abstract: The present disclosure provides an atomization device, which includes a cartridge module, a battery module, and a connection module. The cartridge module includes a heating member. The heating member has a first pin and a second pin. The battery module has a first electrode and a second electrode. The connection module is detachably connected to the cartridge module and the battery module. The connection module has a first conductive member and a second conductive member. A first end of the first conductive member is in contact with the first pin. A second end of the first conductive member is electrically connected to the first electrode. A first end of the second conductive member is in contact with the second pin. A second end of the second conductive member is in contact with the second electrode. False soldering or poor soldering is reduced, thereby reducing the failure of the atomization device.

Abstract: A circulating conveyor may comprise: a first conveying line and a second conveying line, wherein both the first conveying line and the second conveying line have a loading position and an unloading position at the two ends and clamps may be circularly conveyed between the first conveying line and the second conveying line in a clockwise or counterclockwise direction; and a circulating adapter. The circulating adapter may comprise a first circulating adapter and a second circulating adapter arranged in pairs at both the loading position and the unloading position, wherein the first circulating adapter and the second circulating adapter may be used for conveying the clamps between the first conveying line and the second conveying line.

Abstract: Methods for input/output voltage training of a three-dimensional (3D) memory device is disclosed. The method can comprise the following operations: (1) setting a reference voltage value at an on-die termination (ODT) enabled status; (2) controlling the 3D memory device to perform a write training process; (3) determining whether a further write training process is needed; (4) in response to determining that the further write training process is needed, repeating operations (1), (2) and (3); and (5) in response to determining that the further write training process is not needed, setting the reference voltage value as an optimized reference voltage value.

Abstract: Technology is disclosed herein for managing timing parameters when programming memory cells. Timing parameters used sub-clocks in an MLC program mode may also be used for those same sub-clocks in a first SLC program mode. However, in a second SLC program mode a different set of timing parameters may be used for that set of sub-clocks. Using the same set of timing parameters for the MLC program mode and the first SLC program mode saves storage space. However, the timing parameters for the MLC program mode may be slower than desired for SLC programming. A different set of timing parameters may be used for the second SLC program mode to provide for faster program operation. Moreover, the different set of timing parameters used for the faster SLC program mode do not require storage of a separate set of timing parameters.

Abstract: A minutes of meeting processing method, a device, and a medium. The method comprises: acquiring meeting text of a meeting audio/video; inputting the meeting text into a to-do identification model, and determining initial to-do statements; inputting the initial to-do statements into a tense determination model, and determining tense results of the initial to-do statements; and determining a meeting to-do statement in the initial to-do statements on the basis of the tense results.

Abstract: Technology is disclosed herein for smart verify in a memory system that has a four bit per cell program mode (or X4 mode) and also a three bit per cell program mode (or X3 mode). The X3 mode uses a three-bit gray code that is based on a four-bit gray code of the X4 mode. The memory system skips verify of states in the X3 mode, while using a considerable portion of the programming logic from the X4 mode. In one X3 mode the memory system skips B-state verify while the number of memory cells having a Vt above an A-state verify voltage is below a threshold. In one X3 mode the memory system determines whether to skip verify for a first set of data states based on a first test and determines whether to skip verify for a second set of data states based on a second test.