Abstract: A method and system for migrating an existing ASIC design from one semiconductor fabrication process to another are disclosed herein. In some embodiments, a method for migrating the existing ASIC design comprises parsing the gate-level netlist one row at a time into one or more standard cells forming the ASIC design, forming a plurality of mapping tables having mapping rules for mapping the parsed one or more standard cells into equivalent target standard cells implemented in the second semiconductor fabrication process, mapping the parsed one or more standard cells into the equivalent target standard cells using the plurality of mapping tables, and generating a target gate-level netlist describing the ASIC design in terms of the equivalent target standard cells.

Abstract: The present invention provides engineered penicillin G acylase (PGA) enzymes, polynucleotides encoding the enzymes, compositions comprising the enzymes, and methods of using the engineered PGA enzymes.

Abstract: A multifunctional table includes a table body, a carrier member, and a holder. The table body includes a board and a support member connected to each other. The board has a table top and a groove. The carrier member is connected to the table body and includes a first slideway. The holder includes a slidable attaching portion and a holding portion connected to each other. The holding portion includes a first holding surface. The first holding surface corresponds to the groove when the slidable attaching portion is slidably attached to the first slideway in a first attached state. A holder includes a slidable attaching portion and a holding portion connected to each other. The holding portion includes a first holding surface and a second holding surface opposite to each other. The first holding surface and the second holding surface are asymmetrical about a central x axis of the holder.

Abstract: The present invention provides engineered RNA polymerase variants and compositions comprising these variants. The present invention further provides engineered T7 RNA polymerase variants and compositions comprising these variants. These variants have been evolved for selective incorporation of the m7G(5?)ppp(5?)m7G cap analog over GTP at the initiation of in vitro transcription. The present invention also provides methods for selective capping of RNA transcripts.

Abstract: The present invention provides engineered penicillin G acylase (PGA) enzymes, polynucleotides encoding the enzymes, compositions comprising the enzymes, and methods of using the engineered PGA enzymes.

Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines and disposed in memory holes coupled to bit lines. A control means successively applies each of a series of pulses of a program voltage to selected ones of the word lines while simultaneously applying one of a bit line program voltage and a bit line inhibit voltage to ones of the bit lines coupled to the memory holes containing groups of the memory cells connected to the selected ones of the plurality of word lines to program the groups of the memory cells with data. The control means maintains a voltage applied to ones of the plurality of bit lines as the bit line inhibit voltage in response to the ones of the plurality of bit lines remaining unselected when programming a next one of the groups of the memory cells.

Abstract: Technology is disclosed herein for managing timing parameters when programming memory cells. Timing parameters used sub-clocks in an MLC program mode may also be used for those same sub-clocks in a first SLC program mode. However, in a second SLC program mode a different set of timing parameters may be used for that set of sub-clocks. Using the same set of timing parameters for the MLC program mode and the first SLC program mode saves storage space. However, the timing parameters for the MLC program mode may be slower than desired for SLC programming. A different set of timing parameters may be used for the second SLC program mode to provide for faster program operation. Moreover, the different set of timing parameters used for the faster SLC program mode do not require storage of a separate set of timing parameters.

Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines and disposed in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states. A control means is coupled to the word lines and the strings and is configured to successively apply one of a series of pulses of a program voltage to each selected one of the word lines to program the memory cells connected thereto during a program operation. The control means is also configured to utilize a time of a preliminary period of the program operation based on the one of the series of pulses of the program voltage being applied. The preliminary period of the program operation is before the series of pulses of the program voltage are applied to each selected one of the plurality of word lines.

Abstract: A memory apparatus and method of operation is provided. The apparatus includes memory cells connected to word lines. The memory cells are disposed in memory holes and grouped into a plurality of tiers. The memory cells are configured to retain a threshold voltage corresponding to one of a plurality of data states to store one bit as single-level cells and a plurality of bits as multi-level cells. The apparatus also includes a control means coupled to the word lines and the memory holes and configured to select a predetermined strobe quantity of the plurality of tiers of the memory cells separately for the memory cells operating as the single-level cells and the memory cells operating as the multi-level cells. The control means is also configured to trigger sensing of the predetermined strobe quantity of the plurality of tiers of the memory cells during a verify operation.

Abstract: This application relates to a slot negotiation method and a device. The method includes: A transmitter sends a first FlexE overhead frame to a receiver, to request active/standby calendar switching. When the receiver is in a restart state, the receiver does not respond to the received first FlexE overhead frame. In addition, the RX sends a routine update second FlexE overhead frame to the transmitter. Determining that the second FlexE overhead frame is not a response to the first FlexE overhead frame, the transmitter sends a third FlexE overhead frame to request active/standby calendar switching again. According to the method in this application, incorrect calendar switching on the transmitter side caused by a mistaken response of the receiver can be avoided. This reduces the likelihood of a service interruption caused by the existing slot negotiation mechanism.

Abstract: A resonance conversion device and a universal serial bus circuit are provided. The resonance conversion device includes an input filter circuit, a full-bridge LLC converter circuit, a transformer circuit, a rectifier filter circuit, and a controller. The controller is configured to determine whether an indication voltage of a voltage command is less than or equal to a threshold value and to perform the following steps: in response to the indication voltage being less than or equal to the threshold value, controlling the full-bridge LLC converter circuit into a half-bridge operation mode, and regulating the DC output voltage by performing half-bridge burst mode control on the full-bridge LLC converter circuit based on the DC output voltage; and in response to the indication voltage being greater than the threshold value, regulating the DC output voltage by performing full-bridge burst mode control on the full-bridge LLC converter circuit based on the DC output voltage.

Abstract: A multifunctional table includes a table body, a carrier member, and a holder. The table body includes a board and a support member connected to each other. The board has a table top and a groove. The carrier member is connected to the table body and includes a first slideway. The holder includes a slidable attaching portion and a holding portion connected to each other. The holding portion includes a first holding surface. The first holding surface corresponds to the groove when the slidable attaching portion is slidably attached to the first slideway in a first attached state. A holder includes a slidable attaching portion and a holding portion connected to each other. The holding portion includes a first holding surface and a second holding surface opposite to each other. The first holding surface and the second holding surface are asymmetrical about a central x axis of the holder.

Abstract: The present invention provides engineered phosphopentomutase (PPM) enzymes, polypeptides having PPM activity, and polynucleotides encoding these enzymes, as well as vectors and host cells comprising these polynucleotides and polypeptides. Methods for producing PPM enzymes are also provided. The present invention further provides compositions comprising the PPM enzymes and methods of using the engineered PPM enzymes. The present invention finds particular use in the production of pharmaceutical compounds.

Abstract: The present invention provides engineered phosphopentomutase (PPM) enzymes, polypeptides having PPM activity, and polynucleotides encoding these enzymes, as well as vectors and host cells comprising these polynucleotides and polypeptides. Methods for producing PPM enzymes are also provided. The present invention further provides compositions comprising the PPM enzymes and methods of using the engineered PPM enzymes. The present invention finds particular use in the production of pharmaceutical compounds.

Abstract: The present invention provides engineered penicillin G acylase (PGA) enzymes, polynucleotides encoding the enzymes, compositions comprising the enzymes, and methods of using the engineered PGA enzymes.

Abstract: The present invention provides engineered penicillin G acylase (PGA) enzymes, polynucleotides encoding the enzymes, compositions comprising the enzymes, and methods of using the engineered PGA enzymes.

Abstract: The present application provides engineered polypeptides having imine reductase activity, polynucleotides encoding the engineered polypeptides, host cells capable of expressing the engineered polypeptides, and methods of using these engineered polypeptides with a range of ketone and amine substrate compounds to prepare secondary and tertiary amine product compounds.

Abstract: The present invention provides engineered RNA polymerase variants and compositions comprising these variants. The present invention further provides engineered T7 RNA polymerase variants and compositions comprising these variants. These variants have been evolved for selective incorporation of the m7G(5?)ppp(5?)m7G cap analog over GTP at the initiation of in vitro transcription. The present invention also provides methods for selective capping of RNA transcripts.

Abstract: The present application provides engineered glucose dehydrogenase polypeptides having imine reductase activity, polynucleotides encoding the engineered polypeptides, host cells capable of expressing the engineered polypeptides, and methods of using these engineered polypeptides with a range of ketone and amine substrate compounds to prepare secondary and tertiary amine product compounds.