Patents by Inventor Xiangfeng Duan
Xiangfeng Duan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060211183Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: ApplicationFiled: April 18, 2006Publication date: September 21, 2006Applicant: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Parce, Jay Goldman
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Patent number: 7105428Abstract: The present invention is directed to systems and methods for nanowire growth and harvesting. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial oriented nanowire growth using a combination of silicon precursors. In a further aspect of the invention, methods to improve nanowire quality through the use of sacrifical growth layers are provided. In another aspect of the invention, methods for transferring nanowires from one substrate to another substrate are provided.Type: GrantFiled: April 29, 2005Date of Patent: September 12, 2006Assignee: Nanosys, Inc.Inventors: Yaoling Pan, Xiangfeng Duan, Robert S. Dubrow, Jay L. Goldman, Shahriar Mostarshed, Chunming Niu, Linda T. Romano, Dave Stumbo
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Publication number: 20060175601Abstract: The present invention relates generally to sub-microelectronic circuitry, and more particularly to nanometer-scale articles, including nanoscale wires which can be selectively doped at various locations and at various levels. In some cases, the articles may be single crystals. The nanoscale wires can be doped, for example, differentially along their length, or radially, and either in terms of identity of dopant, concentration of dopant, or both. This may be used to provide both n-type and p-type conductivity in a single item, or in different items in close proximity to each other, such as in a crossbar array. The fabrication and growth of such articles is described, and the arrangement of such articles to fabricate electronic, optoelectronic, or spintronic devices and components.Type: ApplicationFiled: June 30, 2005Publication date: August 10, 2006Applicant: President and Fellows of Harvard CollegeInventors: Charles Lieber, Xiangfeng Duan, Yi Cui, Yu Huang, Mark Gudiksen, Lincoln Lauhon, Jianfang Wang, Hongkun Park, Qingqiao Wei, Wenjie Liang, David Smith, Deli Wang, Zhaohui Zhong
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Publication number: 20060169788Abstract: Macroelectronic substrate materials incorporating nanowires are described. These are used to provide underlying electronic elements (e.g., transistors and the like) for a variety of different applications. Methods for making the macroelectronic substrate materials are disclosed. One application is for transmission an reception of RF signals in small, lightweight sensors. Such sensors can be configured in a distributed sensor network to provide security monitoring. Furthermore, a method and apparatus for a radio frequency identification (RFID) tag is described. The RFID tag includes an antenna and a beam-steering array. The beam-steering array includes a plurality of tunable elements. A method and apparatus for an acoustic cancellation device and for an adjustable phase shifter that are enabled by nanowires are also described.Type: ApplicationFiled: September 14, 2005Publication date: August 3, 2006Applicant: Nanosys, Inc.Inventors: Stephen Empedocles, David Stumbo, Chunming Niu, Xiangfeng Duan
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Patent number: 7083104Abstract: Macroelectronic substrate materials incorporating nanowires are described. These are used to provide underlying electronic elements (e.g., transistors and the like) for a variety of different applications. Methods for making the macroelectronic substrate materials are disclosed. One application is for transmission an reception of RF signals in small, lightweight sensors. Such sensors can be configured in a distributed sensor network to provide security monitoring. Furthermore, a method and apparatus for a radio frequency identification (RFID) tag is described. The RFID tag includes an antenna and a beam-steering array. The beam-steering array includes a plurality of tunable elements. A method and apparatus for an acoustic cancellation device and for an adjustable phase shifter that are enabled by nanowires are also described.Type: GrantFiled: September 14, 2005Date of Patent: August 1, 2006Assignee: Nanosys, Inc.Inventors: Stephen A. Empedocles, David P. Stumbo, Chunming Niu, Xiangfeng Duan
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Publication number: 20060151820Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: ApplicationFiled: January 30, 2006Publication date: July 13, 2006Applicant: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Parce, Jay Goldman
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Patent number: 7067867Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: GrantFiled: September 30, 2003Date of Patent: June 27, 2006Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Wallace Parce, Jay L. Goldman
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Patent number: 7064372Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: GrantFiled: December 3, 2004Date of Patent: June 20, 2006Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence A. Bock, David P. Stumbo, J. Wallace Parce, Jay L. Goldman
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Publication number: 20060040103Abstract: Ligand compositions for use in preparing discrete coated nanostructures are provided, as well as the coated nanostructures themselves and devices incorporating same. Methods for post-deposition shell formation on a nanostructure and for reversibly modifying nanostructures are also provided. The ligands and coated nanostructures of the present invention are particularly useful for close packed nanostructure compositions, which can have improved quantum confinement and/or reduced cross-talk between nanostructures.Type: ApplicationFiled: June 7, 2005Publication date: February 23, 2006Applicant: NANOSYS, Inc.Inventors: Jeffery Whiteford, Rhett Brewer, Mihai Buretea, Jian Chen, Karen Cruden, Xiangfeng Duan, William Freeman, David Heald, Francisco Leon, Chao Liu, Andreas Meisel, Kyu Min, J. Parce, Erik Scher
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Publication number: 20060019472Abstract: The present invention is directed to systems and methods for nanowire growth and harvesting. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial oriented nanowire growth using a combination of silicon precursors. In a further aspect of the invention, methods to improve nanowire quality through the use of sacrifical growth layers are provided. In another aspect of the invention, methods for transferring nanowires from one substrate to another substrate are provided.Type: ApplicationFiled: April 29, 2005Publication date: January 26, 2006Applicant: Nanosys, Inc.Inventors: Yaoling Pan, Xiangfeng Duan, Robert Dubrow, Jay Goldman, Shahriar Mostarshed, Chunming Niu, Linda Romano, Dave Stumbo
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Publication number: 20060008942Abstract: The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.Type: ApplicationFiled: April 29, 2005Publication date: January 12, 2006Applicant: Nanosys, Inc.Inventors: Linda Romano, Jian Chen, Xiangfeng Duan, Robert Dubrow, Stephen Empedocles, Jay Goldman, James Hamilton, David Heald, Francesco Lemmi, Chunming Niu, Yaoling Pan, George Pontis, Vijendra Sahi, Erik Scher, David Stumbo, Jeffery Whiteford
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Publication number: 20050287717Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices).Type: ApplicationFiled: June 7, 2005Publication date: December 29, 2005Applicant: NANOSYS, Inc.Inventors: David Heald, Karen Cruden, Xiangfeng Duan, Chao Liu, J. Parce
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Publication number: 20050279274Abstract: The present invention is directed to compositions of matter, systems, and methods to manufacture nanowires. In an embodiment, a buffer layer is placed on a nanowire growth substrate and catalytic nanoparticles are added to form a catalytic-coated nanowire growth substrate. Methods to develop and use this catalytic-coated nanowire growth substrate are disclosed. In a further aspect of the invention, in an embodiment a nanowire growth system using a foil roller to manufacture nanowires is provided.Type: ApplicationFiled: April 12, 2005Publication date: December 22, 2005Inventors: Chunming Niu, Jay Goldman, Xiangfeng Duan, Vijendra Sahi
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Publication number: 20050202615Abstract: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A thin film of nanoelements is formed on the substrate above a channel region. A gate contact is formed on the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device, nanoelements are present having a plurality of charge injection voltages, to provide multiple states. In another aspect, a printing device includes a charge diffusion layer that includes a matrix containing a plurality of nanoelements configured to be anisotropically electrically conductive through the charge diffusion layer to transfer charge to areas of the first surface with reduced lateral charge spread.Type: ApplicationFiled: March 10, 2004Publication date: September 15, 2005Applicant: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, David Stumbo, Calvin Chow
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Publication number: 20050201149Abstract: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device.Type: ApplicationFiled: December 21, 2004Publication date: September 15, 2005Applicant: Nanosys, Inc.Inventors: Xiangfeng Duan, Calvin Chow, David Heald, Chunming Niu, J. Parce, David Stumbo
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Publication number: 20050181587Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: ApplicationFiled: April 13, 2005Publication date: August 18, 2005Applicant: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Parce, Jay Goldman
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Publication number: 20050164432Abstract: A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest width of less than 500 nanometers. Such a semiconductor may comprise an interior core comprising a first semiconductor; and an exterior shell comprising a different material than the first semiconductor. Such a semiconductor may be elongated and my have, at any point along a longitudinal section of such a semiconductor, a ratio of the length of the section to a longest width is greater than 4:1, or greater than 10:1, or greater than 100:1, or even greater than 1000:1.Type: ApplicationFiled: March 17, 2005Publication date: July 28, 2005Applicant: President and Fellows of Harvard CollegeInventors: Charles Lieber, Yi Cui, Xiangfeng Duan, Yu Huang
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Publication number: 20050110064Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: ApplicationFiled: December 3, 2004Publication date: May 26, 2005Applicant: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Parce, Jay Goldman
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Publication number: 20050079659Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: ApplicationFiled: September 30, 2003Publication date: April 14, 2005Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Parce, Jay Goldman
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Patent number: 6872645Abstract: Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and/or oriented nanostructures, devices that include populations of positioned and/or oriented nanostructures, systems for positioning and/or orienting nanostructures, and related devices, systems and methods.Type: GrantFiled: September 10, 2002Date of Patent: March 29, 2005Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Hugh Daniels, Chunming Niu, Vijendra Sahi, James Hamilton, Linda T. Romano