Abstract: A method and structure for fabricating sensor(s) or electronic device(s) using vertical mounting is presented. The method includes providing a substrate having a surface region and forming sensor(s) or electronic device(s) on a first region overlying the surface region. At least one bond pad structure can be formed from at least one trench structure. The resulting device can then be singulated within a vicinity of the bond pad structure(s) to form at least one integrated sensor or electronic devices having at least one vertical bond pad. At least one singulated device(s) can be coupled to a package, having a package surface region, such that the vertical bond pad(s) are configured horizontally, and at least one interconnection can be formed between the vertical bond pad(s) and at least one portion of the package surface region.

Abstract: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.

Abstract: The present invention provides a method and device using CMOS and MEMS fabrication techniques for making an integrated microneedle device with integrated circuits. Merely by way of example, the technology can be applied to bio and chemical sensing, and other bioMEMS applications. In some embodiments, the integrated circuits are completed using standard IC processes. For example, an array of microneedles are fabricated on top of the IC substrate followed by formation of micro fluidic channels in the substrate. On-chip integrated circuits enable real-time sensing and intelligent drug delivery.

Abstract: The present invention relates to integrating an inertial mechanical device on top of a CMOS substrate monolithically using IC-foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A thick silicon layer is added on top of the CMOS. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Comparing to the incumbent bulk or surface micromachined MEMS inertial sensors, the vertically monolithically integrated inertial sensors have smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.

Abstract: A method of fabricating ESD suppression device includes forming conductive pillars dispersed in a dielectric material. The gaps formed between each pillar in the device behave like spark gaps when a high voltage ESD pulse occurs. When the voltage of the pulse reaches the “trigger voltage” these gaps spark over, creating a very low resistance path. In normal operation, the leakage current and the capacitance is very low, due to the physical gaps between the conductive pillars. The proposed method for fabricating an ESD suppression device includes micromachining techniques to be on-chip with device ICs.

Abstract: The present invention is related shielding integrated devices using CMOS fabrication techniques to form an encapsulation with cavity. The integrated circuits are completed first using standard IC processes. A wafer-level hermetic encapsulation is applied to form a cavity above the sensitive portion of the circuits using IC-foundry compatible processes. The encapsulation and cavity provide a hermetic inert environment that shields the sensitive circuits from EM interference, noise, moisture, gas, and corrosion from the outside environment.

Abstract: The present invention relates to integrating an inertial mechanical device on top of a CMOS substrate monolithically using IC-foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A thick silicon layer is added on top of the CMOS. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Comparing to the incumbent bulk or surface micromachined MEMS inertial sensors, the vertically monolithically integrated inertial sensors have smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.

Abstract: The present invention relates to integrating an inertial mechanical device on top of a CMOS substrate monolithically using IC-foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A thick silicon layer is added on top of the CMOS. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Comparing to the incumbent bulk or surface micromachined MEMS inertial sensors, the vertically monolithically integrated inertial sensors have smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.

Abstract: The present invention is related shielding integrated devices using CMOS fabrication techniques to form an encapsulation with cavity. The integrated circuits are completed first using standard IC processes. A wafer-level hermetic encapsulation is applied to form a cavity above the sensitive portion of the circuits using IC-foundry compatible processes. The encapsulation and cavity provide a hermetic inert environment that shields the sensitive circuits from EM interference, noise, moisture, gas, and corrosion from the outside environment.

Abstract: A three-dimensional integrated circuit device includes a first substrate having a first crystal orientation comprising at least one or more PMOS devices thereon and a first dielectric layer overlying the one or more PMOS devices. The three-dimensional integrated circuit device also includes a second substrate having a second crystal orientation comprising at least one or more NMOS devices thereon; and a second dielectric layer overlying the one or more NMOS devices. An interface region couples the first dielectric layer to the second dielectric layer to form a hybrid structure including the first substrate overlying the second substrate.

Abstract: This present invention relates in general to protection of integrated circuit chips, and more particularly, to a micromachined suppression device for protecting integrated circuit chips from electrostatic discharges. The proposed ESD suppression device consists of conductive pillars are dispersed in a dielectric material. The gaps between each pillar behave like spark gaps when a high voltage ESD pulse occurs. When the voltage of the pulse reaches the “trigger voltage” these gaps spark over, creating a very low resistance path. In normal operation, the leakage current and the capacitance is very low, due to the physical gaps between the conductive pillars. The proposed ESD suppression device is fabricated using micromachining techniques to be on-chip with device ICs.

Abstract: Protection for infrared sensing device, and more particularly, to a monolithically integrated uncooled infrared sensing device using IC foundry compatible processes. The proposed infrared sensing device is fabricated on a completed IC substrate. In an embodiment, the infrared sensing device has a single crystal silicon plate with an absorbing layer supported a pair of springs. The absorbing layer absorbs infrared radiation and heats up the underlying silicon layer. As a result, an n well in the silicon layer changes its resistance related to its temperature coefficient of resistance (TCR). In another embodiment, the infrared sensing device has a top sensing plate supported by an underlying spring structures. The top sensing plate has sensing materials such as amorphous silicon, poly silicon, SiC, SiGe, Vanadium oxide, or YbaCuO. Finally, a micro lens array is placed on top of the sensing pixel array with a gap in between.

Abstract: The present invention relates to integrating an inertial mechanical device on top of an IC substrate monolithically using IC-foundry compatible processes. The IC substrate is completed first using standard IC processes. A thick silicon layer is added on top of the IC substrate. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Compared with the incumbent bulk or surface micromachined MEMS inertial sensors, vertically monolithically integrated inertial sensors provided by embodiments of the present invention have one or more of the following advantages: smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.

Abstract: A computer implemented method for determining an intensity of user input to a computer system, performed by the computer system that is programmed to perform the method includes determining by a display, an indication of a finger position a user in response to a change in finger position relative to the computer system, wherein change in fin position is also associated with a magnitude of change, determining by a physical sensor of the computer system, the magnitude of change in response to the change in finger position, determining by the computer system, a user selection of a function to perform in response to the indication of the finger position, determining by the computer system, an input parameter associated with the function in response to the magnitude of change, and initiating performance by the computer system, of the function in response to the input parameter.

Abstract: A computer implemented method for performing a user-defined function in a computer system, performed by the computer system that is programmed to perform the method includes determining by a display a display position in response to a change and a rate change in state of a user-controlled user input device, determining by a physical sensor a magnitude of change in sensed physical in response to the rate of change in the state, determining whether the magnitude of change exceeds a threshold level, determining a function to perform in response to display position when magnitude of change in sensed physical properties exceeds the threshold level, initiating performance of the function in response to the function, and inhibiting performance of the function when the magnitude of change in sensed physical properties does not exceed the threshold level.

Abstract: An integrated MEMS system in which CMOS and MEMS devices are provided to form an integrated CMOS-MEMS system. The system can include a silicon substrate layer, a CMOS layer, MEMS and CMOS devices, and a wafer level packaging (WLP) layer. The CMOS layer can form an interface region, one which any number of CMOS MEMS devices can be configured.

Abstract: This present invention relates generally to manufacturing objects. More particularly, the invention relates to a method and structure for fabricating an out-of-plane compliant micro actuator. The compliant actuator has large actuation range in both vertical and horizontal planes without physical contact to the substrate. Due to fringe field actuation, the compliant actuator has no pull-in phenomenon and requires low voltage by a ‘zipping’ movement compared to conventional parallel plate electrostatic actuators. The method and device can be applied to micro actuators as well as other devices, for example, micro-electromechanical sensors, detectors, fluidic, and optical systems.

Abstract: A multilayered integrated optical and circuit device. The device has a first substrate comprising at least one integrated circuit chip thereon, which has a cell region and a peripheral region. Preferably, the peripheral region has a bonding pad region, which has one or more bonding pads and an antistiction region surrounding each of the one or more bonding pads. The device has a second substrate with at least one or more deflection devices thereon coupled to the first substrate. At least one or more bonding pads are exposed on the first substrate. The device has a transparent member overlying the second substrate while forming a cavity region to allow the one or more deflection devices to move within a portion of the cavity region to form a sandwich structure including at least a portion of the first substrate, a portion of the second substrate, and a portion of the transparent member.

Abstract: This present invention relates in general to protection of integrated circuit chips, and more particularly, to a micromachined suppression device for protecting integrated circuit chips from electrostatic discharges. The proposed ESD suppression device consists of conductive pillars are dispersed in a dielectric material. The gaps between each pillar behave like spark gaps when a high voltage ESD pulse occurs. When the voltage of the pulse reaches the “trigger voltage” these gaps spark over, creating a very low resistance path. In normal operation, the leakage current and the capacitance is very low, due to the physical gaps between the conductive pillars. The proposed ESD suppression device is fabricated using micromachining techniques to be on-chip with device ICs.

Abstract: Protection for infrared sensing device, and more particularly, to a monolithically integrated uncooled infrared sensing device using IC foundry compatible processes. The proposed infrared sensing device is fabricated on a completed IC substrate. In an embodiment, the infrared sensing device has a single crystal silicon plate with an absorbing layer supported a pair of springs. The absorbing layer absorbs infrared radiation and heats up the underlying silicon layer. As a result, an n well in the silicon layer changes its resistance related to its temperature coefficient of resistance (TCR). In another embodiment, the infrared sensing device has a top sensing plate supported by an underlying spring structures. The top sensing plate has sensing materials such as amorphous silicon, poly silicon, SiC, SiGe, Vanadium oxide, or YbaCuO. Finally, a micro lens array is placed on top of the sensing pixel array with a gap in between.