Patents by Inventor Xiaoyuan Wang

Xiaoyuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11958999
    Abstract: The present disclosure relates to a ligand for a quantum dot, a ligand quantum dot, a quantum dot layer and a method for patterning the same. The surface of the ligand quantum dot of the present disclosure is connected with the cleavage-type ligand including a first ligand unit A, a cleavage unit B, and an adhesion adjusting unit C. The method includes: providing a substrate; coating a mixture containing the ligand quantum dot on the substrate to form a quantum dot film; exposing a preset region of the quantum dot film to ultraviolet light, so that the cleavage unit B in the cleavage-type ligand undergoes a photolysis reaction, and a molecular segment containing the adhesion adjusting unit C and obtained after decomposition is detached from a surface of the quantum dot; and washing off an unexposed region of the quantum dot film with an organic solvent, followed by drying.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: April 16, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wenhai Mei, Zhenqi Zhang, Aidi Zhang, Xiaoyuan Zhang, Haowei Wang
  • Patent number: 11914253
    Abstract: Embodiments of the present disclosure provides an array substrate and a manufacturing method thereof, a display panel. The array substrate includes: a base (10); a pixel electrode (50) and a thin film transistor disposed on the base (10); a passivation layer (16) covering the thin film transistor and the pixel electrode (50), the passivation layer (16) being provided with a transferring through hole (K1, K2) that simultaneously exposes the pixel electrode (50) and a drain electrode (15) or a source electrode (14) of the thin film transistor; a connection electrode (60) disposed on the passivation layer (16) and at the transferring through hole (K1, K2), the connection electrode (60) connected with the pixel electrode (50), and the drain electrode (15) or the source electrode (14) through the transferring through hole (K1, K2).
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: February 27, 2024
    Assignees: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoyuan Wang, Wu Wang, Yan Fang, Shengxue Wu
  • Publication number: 20240060076
    Abstract: The disclosure relates to a thermal switch system and application thereof in improving yield of amino acid, and particularly relates to a method for improving the yield of amino acid by regulating intracellular metabolic flux distribution using the thermal switch system, which belongs to the technical fields of genetic engineering and microbial fermentation. The system rebalances metabolic flux between pyruvate and oxaloacetate by controlling heterologous expression of pyruvate carboxylase and in combination with chemical properties that oxaloacetate is temperature-sensitive and easy to decarboxylate, and dynamically regulates a central metabolic pathway to ensure the supply of reducing cofactors, so as to promote the production of L-threonine. Temperature-controlled threonine-producing strains TWF106/pFT24rp and TWF113/pFT24rpa1 obtained in the disclosure have threonine molar conversion rates of 111.78% and 124.03% respectively.
    Type: Application
    Filed: May 17, 2022
    Publication date: February 22, 2024
    Applicant: Jiangnan University
    Inventors: Xiaoyuan WANG, Yu FANG, Jianli WANG, Shuyan ZHANG, Xiaoqing HU
  • Patent number: 11835829
    Abstract: A display substrate is provided, including: a base substrate; a display area, and a peripheral area surrounding the display area on the base substrate, where a dummy pixel unit and a dummy data line are located in the peripheral area. The dummy pixel unit includes a thin film transistor including a first electrode and a second electrode. The first electrode is one of a source electrode and a drain electrode and is electrically connected to the dummy data line, and the second electrode is another of the source electrode and the drain electrode and includes a first portion and a second portion separated by a first opening. A display panel including the display substrate and an electronic device including the display substrate or the display panel are further provided.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: December 5, 2023
    Assignees: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wu Wang, Meicun Jiang, Xiaoyuan Wang, Ruilin Bi, Wenlong Feng
  • Publication number: 20230335065
    Abstract: A driving circuit, a driving method, a display substrate and a display device are provided. The driving circuit includes a first node control circuit, a second node control circuit, a third node control circuit and an output circuit; the first node control circuit controls the potential of the first node; the second node control circuit controls the potential of the second node; the third node control circuit controls, under the control of the on-off control signal, the first node to be electrically connected to the third node or the first node to be electrically disconnected from the third node; the output circuit controls, under the control of the potential of the second node and the potential of the third node, output of the driving signal through the driving signal terminal.
    Type: Application
    Filed: March 4, 2022
    Publication date: October 19, 2023
    Applicants: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiandong Guo, Zhongshan Wu, Xiaoyuan Wang
  • Publication number: 20230333695
    Abstract: The present invention relates to a touch substrate with a touch control unit including a first touch electrode having a first bus bar extending along a first direction and a first inner electrode extending from the first bus bar, and a second touch electrode having a second bus bar extending along the first direction and a second inner electrode extending from the second bus bar. The first and second bus bars are disposed opposite to each other, the first and second inner electrodes are between the first and second bus bars, alternately and spaced apart from each other in the first direction. Each pair of adjacent first and second inner electrodes constitutes an inner electrode group, within which, at least a portion of the first inner electrode extends toward the second inner electrode, and at least a portion of the second inner electrode extends toward the first inner electrode.
    Type: Application
    Filed: August 5, 2021
    Publication date: October 19, 2023
    Inventors: Zhongshan WU, Xiaoyuan WANG, Yan LIU, Ruiqi PAN, Xiaofeng YIN, Jiantao LIU
  • Publication number: 20230290837
    Abstract: A Group III-V compound semiconductor device includes a Group III-V compound substrate and a passivation structure. The passivation structure is disposed on a surface of the Group III-V compound substrate and includes a scandium-nitrogen-containing layer and a scandium-oxygen-containing layer sequentially stacked in that order in a direction away from the surface of the Group III-V compound substrate.
    Type: Application
    Filed: May 18, 2023
    Publication date: September 14, 2023
    Inventors: Dexiao GUO, Zhidong LIN, Junlei HE, Lige WANG, Xiaoyuan WANG, Jie ZHAO, Cheng LIU, Nien-tze YEH
  • Publication number: 20230185140
    Abstract: Embodiments of the present disclosure provides an array substrate and a manufacturing method thereof, a display panel. The array substrate includes: a base (10); a pixel electrode (50) and a thin film transistor disposed on the base (10); a passivation layer (16) covering the thin film transistor and the pixel electrode (50), the passivation layer (16) being provided with a transferring through hole (K1, K2) that simultaneously exposes the pixel electrode (50) and a drain electrode (15) or a source electrode (14) of the thin film transistor; a connection electrode (60) disposed on the passivation layer (16) and at the transferring through hole (K1, K2), the connection electrode (60) connected with the pixel electrode (50), and the drain electrode (15) or the source electrode (14) through the transferring through hole (K1, K2).
    Type: Application
    Filed: January 3, 2023
    Publication date: June 15, 2023
    Inventors: Xiaoyuan WANG, Wu WANG, Yan FANG, Shengxue WU
  • Patent number: 11659789
    Abstract: An ecological restoration method for a lake wetland against effects of water level rise in a dry season includes: collecting basic data of a lake; determining wetland phytoremediation species of the lake; determining characteristic water levels of the lake under a baseline scenario and under different water level rise scenarios; determining a restoration range based on wetland types corresponding to different characteristic water levels; selecting an experimental restoration area from the restoration range, and performing ecological restoration; and monitoring a plant community state and waterbird biodiversity, judging whether the restoration reaches a preset goal, and adjusting the method if the restoration does not reach the preset goal. According to the method, the effects of water level rise in the dry season on wetland habitat, biodiversity, ecosystem services and the like can be relieved to the greatest extent, so that an ecological restoration effect of the lake wetland is improved.
    Type: Grant
    Filed: November 10, 2022
    Date of Patent: May 30, 2023
    Assignee: CHANGJIANG WATER RESOURCES PROTECTION INSTITUTE
    Inventors: Bo Jiang, Hongqing Li, Xiaoyuan Wang, Zhilan Liu, Bo Cheng, Yachun Liu, Xue Bi, Rongyou Chen
  • Publication number: 20230157214
    Abstract: An ecological restoration method for a lake wetland against effects of water level rise in a dry season includes: collecting basic data of a lake; determining wetland phytoremediation species of the lake; determining characteristic water levels of the lake under a baseline scenario and under different water level rise scenarios; determining a restoration range based on wetland types corresponding to different characteristic water levels; selecting an experimental restoration area from the restoration range, and performing ecological restoration; and monitoring a plant community state and waterbird biodiversity, judging whether the restoration reaches a preset goal, and adjusting the method if the restoration does not reach the preset goal. According to the method, the effects of water level rise in the dry season on wetland habitat, biodiversity, ecosystem services and the like can be relieved to the greatest extent, so that an ecological restoration effect of the lake wetland is improved.
    Type: Application
    Filed: November 10, 2022
    Publication date: May 25, 2023
    Applicant: CHANGJIANG WATER RESOURCES PROTECTION INSTITUTE
    Inventors: Bo JIANG, Hongqing LI, Xiaoyuan WANG, Zhilan LIU, Bo CHENG, Yachun LIU, Xue BI, Rongyou CHEN
  • Patent number: 11573467
    Abstract: Embodiments of the present disclosure provides an array substrate and a manufacturing method thereof, a display panel. The array substrate includes: a base; a pixel electrode and a thin film transistor disposed on the base; a passivation layer covering the thin film transistor and the pixel electrode, the passivation layer being provided with a transferring through hole that simultaneously exposes the pixel electrode and a drain electrode or a source electrode of the thin film transistor; a connection electrode disposed on the passivation layer and at the transferring through hole, the connection electrode connected with the pixel electrode, and the drain electrode or the source electrode through the transferring through hole.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: February 7, 2023
    Assignees: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoyuan Wang, Wu Wang, Yan Fang, Shengxue Wu
  • Patent number: 11545069
    Abstract: A display panel is provided. The display panel includes at least one transistor of a split structure. The transistor of the split structure comprises a control electrode, a first electrode and a second electrode; the first electrode comprises N first electrode portions, the second electrode comprises N second electrode portions, and N is an integer greater than 2; the N first electrode portions are electrically coupled, and the N second electrode portions are electrically coupled; the display panel has a plurality of transistor regions arranged at intervals, an n-th first electrode portion and an n-th second electrode portion are located in a same transistor region, an m-th first electrode portion and an (m+1)-th first electrode portion are respectively located in two adjacent transistor regions, n and in are an positive integers, n is less than or equal to N, and in is less than or equal to N?1.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: January 3, 2023
    Assignees: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Xiaoyuan Wang, Yan Fang, Wu Wang, Guangdi Cao, Wenlong Feng
  • Patent number: 11520192
    Abstract: The present disclosure relates to an array substrate. The array substrate may include a base substrate; a first electrode layer on the base substrate, and at least one connection electrode at a periphery of the first electrode unit. The first electrode layer may include a plurality of first electrodes, each of the plurality of first electrodes may include at least one first electrode unit, the first electrode unit may include a plurality of strip electrodes, and a plurality of slits are between the plurality of strip electrodes. The plurality of strip electrodes are electrically connected to the connection electrode, and the connection electrode disconnects at one or more positions such that corresponding ends of one or more of the plurality of slits form openings at the one or more positions of the connection electrode.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: December 6, 2022
    Assignees: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Xiaoyuan Wang, Wu Wang, Yan Fang, Yajie Bai, Ruilin Bi
  • Patent number: 11456321
    Abstract: A method for manufacturing a display substrate, a display substrate and a display device are provided. The method for manufacturing a display substrate includes: forming, on a base substrate, a concave-convex structure extending in a direction identical to an extending direction of a signal transmission line; and forming the signal transmission line on the concave-convex structure.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: September 27, 2022
    Assignees: Chongqing BOE Optoelectronics Technology Co., Ltd., Beijing BOE Technology Development Co., Ltd.
    Inventors: Yunze Li, Ni Yang, Xiaoyuan Wang, Xuefang Chen, Hui Li, Mengqiu Liu
  • Publication number: 20220291558
    Abstract: A display panel and a display device are disclosed. The display panel comprises an array substrate and spacers; the array substrate comprises a first substrate, gate lines, data lines, and multiple sub-pixel units; the first substrate is provided with multiple sub-pixel regions, first wiring regions each located between two adjacent rows of sub-pixel regions, and second wiring regions each located between two adjacent columns of sub-pixel regions and intersecting the first wiring regions; at least part of each sub-pixel unit is located on a sub-pixel region; the gate lines and the data lines are respectively located on the first wiring regions and the second wiring regions and are electrically connected to the sub-pixel units; the data lines and the gate lines are insulated from each other and intersect each other; each data line is provided with an alignment part.
    Type: Application
    Filed: March 10, 2021
    Publication date: September 15, 2022
    Inventors: Qiujie SU, Xiaoyuan WANG, Zhihua SUN, Li TIAN, Seungmin LEE, Jiantao LIU
  • Patent number: 11392002
    Abstract: An array substrate includes a base substrate; a data line and a common electrode line on the base substrate; and a first gate line and a second gate line on the base substrate, wherein both the first gate line and the second gate line cross both the data line and the common electrode line to define a sub-pixel. The sub-pixel includes: a pixel electrode; a common electrode; and an insulating layer between the pixel electrode and the common electrode. The common electrode includes a plurality of slits, and the slits extend in the same direction as the data line. The slits include a first slit close to the data line, the pixel electrode includes a first side surface close to the data line, and an orthographic projection of the first side surface on the base substrate is located within an orthographic projection of the first slit on the base substrate.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: July 19, 2022
    Assignees: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoyuan Wang, Wu Wang, Yan Fang, Ruilin Bi, Yajie Bai, Yujie Gao, Seungmin Lee
  • Publication number: 20220085076
    Abstract: Provided are an array substrate and a display apparatus thereof. The array substrate includes a display region and a binding region located at a side of the display region; the binding region includes a first conductive layer disposed on the substrate and a planarization layer disposed at a side of the first conductive layer away from the substrate. The binding region includes a binding zone and a vacancy zone alternately disposed along an edge of the display region, the first conductive layer includes a plurality of binding pins disposed in the binding zone, and the planarization layer is provided with first openings exposing the plurality of binding pins and covering the binding zone and the vacancy zone.
    Type: Application
    Filed: August 12, 2021
    Publication date: March 17, 2022
    Inventors: Xiaoyuan WANG, Yan FANG, Junhui WU, Jiantao LIU
  • Patent number: D1002564
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: October 24, 2023
    Assignee: HONOR DEVICE CO., LTD.
    Inventors: Zhiqiang Jiang, Liang Yang, Jun Xiang, Xiaoyuan Wang, Yin Wang, Qian Wang, Yang Zhang
  • Patent number: D1002565
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: October 24, 2023
    Assignee: HONOR DEVICE CO., LTD.
    Inventors: Jun Xiang, Qian Wang, Zhiqiang Jiang, Liang Yang, Xiaoyuan Wang, Yin Wang, Yang Zhang
  • Patent number: D1002567
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: October 24, 2023
    Assignee: HONOR DEVICE CO., LTD.
    Inventors: Yang Zhang, Zhiqiang Jiang, Liang Yang, Jun Xiang, Xiaoyuan Wang, Yin Wang, Qian Wang