Patents by Inventor Xiaobin Wang

Xiaobin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250233338
    Abstract: The present utility model discloses a connector with a C-shaped elastic piece configured to connect to a PCB board, which comprises: a main housing, wherein two main housings symmetrically spliced are provided; a plurality of groups of wires uniformly distributed along a length direction of the main housing, wherein any one group of wires comprise a signal wire and a ground wire; a plurality of elastic pieces separately welded with the signal wire of the wires, wherein each elastic piece comprises a welding part welded with the signal wire and an abutting part abutted against the PCB board; a spacer assembly comprising a plurality of separation spaces for separating adjacent elastic pieces; and an isolation frame provided with a plurality of slots for the elastic pieces to pass through, wherein the elastic pieces pass through the isolation frame and are abutted against the PCB board.
    Type: Application
    Filed: January 30, 2024
    Publication date: July 17, 2025
    Inventors: Xiling He, Huilin Wu, Jijian Wei, Haiqiu Lu, Xiao'an Wang, Xiaobin Wang, Jun Yang, Zhaoyang Tang, Di Jiang, Mingliang Xia, Junzhong Liu
  • Patent number: 12339252
    Abstract: Embodiments herein relate to systems and methods for detecting aeration properties in fluids using a vibration sensor. In an embodiment, a system for fluid aeration monitoring is included having a vibration sensor configured to be mounted along a fluid flow path, and a control circuit in signal communication with the vibration sensor. The control circuit can be configured to evaluate a signal received from the vibration sensor and calculate one or more aeration parameters based on signals from the vibration sensor. Other embodiments are also included herein.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: June 24, 2025
    Assignee: Donaldson Company, Inc.
    Inventors: Michael J. Cronin, Xiaobin Wang
  • Publication number: 20250183594
    Abstract: The present utility model discloses a connector for preventing signal interference, comprising a plurality of groups of wires and spacers for separating two adjacent groups of the wires, wherein the wires comprise signal wires and ground wires, the ground wires are connected on both sides of the signal wires, and a wire shielding layer is sleeved between the signal wires and the ground wires; a wire clamp is mounted on the spacer, a plurality of bosses are arranged on the spacer, the wire clamp is provided with a plurality of staggered holes matched with the bosses and signal wire holes matched with the signal wires; and the wire clamp and the bosses are snap-fitted via the staggered holes, and the wire shielding layer is connected to the signal wire holes.
    Type: Application
    Filed: December 29, 2023
    Publication date: June 5, 2025
    Inventors: Xiling He, Huilin Wu, Jijian Wei, Haiqiu Lu, Xiao'an Wang, Xiaobin Wang, Jun Yang
  • Publication number: 20250157894
    Abstract: A semiconductor package comprises a lead frame, a first field-effect transistor (FET), a second FET, an integrated circuit (IC), a plurality of bond wires, and a molding encapsulation. The lead frame comprises a first die paddle and a second die paddle. The first FET is flipped and attached to the first die paddle. The second FET is flipped and attached to the second die paddle. A method comprises the steps of providing a lead frame comprising a first die paddle and a second die paddle; applying a first adhesive layer; mounting a first FET and a second FET; applying a second adhesive layer; mounting an IC; applying bonding wires; forming a molding encapsulation; and applying a singulation process so as to form a plurality of semiconductor packages.
    Type: Application
    Filed: June 28, 2024
    Publication date: May 15, 2025
    Applicant: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Yan Xun Xue, Jian Yin, Long-Ching Wang, Sitthipong Angkititrakul, Xiaobin Wang, Bo Chen
  • Patent number: 12295166
    Abstract: A device and a method of making the device comprising, a semiconductor substrate layer and an epitaxial layer formed on the semiconductor substrate. One or more trenches are formed in the epitaxial layer, each trench having a pair of opposing sidewalls, wherein a distance between the opposing sidewalls is greater near a bottom of the trench than near a top of the trench, wherein the bottom of the trench is closer to the semiconductor substrate layer than the top.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: May 6, 2025
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Madhur Bobde, Sik Lui, Lei Zhang, Xiaobin Wang
  • Publication number: 20250118638
    Abstract: A semiconductor package comprises a first device and a second device. The structure of the first semiconductor device is similar to that of the second semiconductor device. The first semiconductor device comprises a lead frame strip, a first plurality of field effect transistors (FETs), a first plurality of clips, a second plurality of FETs, a second plurality of clips, and a first molding encapsulation. A method is applied to fabricate a plurality of semiconductor packages. The method comprises the steps of providing a lead frame strip, attaching a first plurality of FETs, attaching a first plurality of clips, attaching a second plurality of FETs, attaching a second plurality of clips, and forming a molding encapsulation.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 10, 2025
    Applicant: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Yan Xun Xue, Madhur Bobde, Long-Ching Wang, Jian Yin, Lin Chen, Ziwei Yu, Xiaobin Wang, Zhiqiang Niu, Kuan-Hung Li
  • Publication number: 20250079734
    Abstract: The utility model discloses a small-sized connector convenient for dismounting and mounting, the connector being inserted and received in a female socket of a PCB board, comprising: a connector housing inserted and received in the female socket; two elastic clamping plates, wherein the two elastic clamping plates are symmetrically mounted on both sides of the connector housing, first ends of the two elastic clamping plates are each provided with a clamping hole, and the female socket is provided with a clamping boss clamped with the clamping hole; and a pull strap, wherein both ends of the pull strap are respectively connected to second ends of the two elastic clamping plates, and the pull strap is used to pull the second ends of the two elastic clamping plates to separate the clamping holes at the first ends of the two elastic clamping plates from the clamping bosses of the female socket.
    Type: Application
    Filed: December 29, 2023
    Publication date: March 6, 2025
    Inventors: Xiling He, Huilin Wu, Jijian Wei, Haiqiu Lu, Xiao'an Wang, Xiaobin Wang, Jun Yang, Zhaoyang Tang, Di Jiang, Mingliang Xia, Junzhong Liu
  • Publication number: 20250079769
    Abstract: Disclosed is a ground wire spacer structure of a connector, comprising two groups of connector monoblocks that are symmetrical and spliced, wherein any group of the connector monoblocks comprise a housing provided with: a plurality of groups of elastic pieces, wherein one end of the elastic piece is connected to a female socket of the connector, and the other end of the elastic piece is connected to a wire group of the connector; a plurality of metal spacers distributed between two adjacent groups of the elastic pieces and used to separate the elastic pieces; and a conductive sheet mounted on the housing, wherein the conductive sheet is abutted against the plurality of spacers, the conductive sheet is connected to a ground wire in the wire group, and the metal spacers and the conductive sheet form a plurality of independent spaces for accommodating the elastic pieces respectively.
    Type: Application
    Filed: December 29, 2023
    Publication date: March 6, 2025
    Inventors: Xiling He, Huilin Wu, Jijian Wei, Haiqiu Lu, Xiao'an Wang, Xiaobin Wang, Jun Yang, Zhaoyang Tang, Di Jiang, Mingliang Xia, Junzhong Liu
  • Publication number: 20250081517
    Abstract: A multiple gate transistor and method of its manufacture are described. The transistor comprises a common substrate, a source, a drain, a body, a first gate electrode and a second gate electrode. The first gate electrode and the second gate electrode are colinearly aligned along a horizontal plane of the common substrate and are separated by a dielectric wall. The dielectric wall provides electrical isolation between the first gate electrode and the second gate electrode.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 6, 2025
    Inventors: Wenwen Li, Xiaobin Wang, Sik Lui, Adithya Prakash, Lingpeng Guan, Madhur Bobde
  • Publication number: 20250072045
    Abstract: A trench MOSFET device implements a trench source/body contact structure and includes a first MOSFET section and a second MOSFET section where the first MOSFET section has a body contact resistance lower than a body contact resistance of the second MOSFET section. In some embodiments, the first MOSFET section includes trench source/body contacts to make electrical contact with the source region and with a body contact doped region having a first doping level. In one embodiment, the second MOSFET section includes trench source/body contacts that contacts only the source region. In another embodiment, the second MOSFET section includes trench source/body contacts to make electrical contact with the source region and with a second body contact doped region having a second doping level lower than the first doping level. In some embodiments, the first MOSFET section has a transistor area much smaller than the transistor area of the second MOSFET section.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 27, 2025
    Inventors: Sik Lui, Madhur Bobde, Wenwen Li, Xiaobin Wang, Lingpeng Guan
  • Publication number: 20250062572
    Abstract: The present utility model discloses a connector for preventing signal interference, comprising: a connector housing; a plurality of groups of wires arranged in the connector housing, wherein any group of the wires comprise a signal wire and a ground wire, and the ground wires in the plurality of groups of the wires are connected in series; and a metal partition plate, wherein a plurality of spacers are arranged on the metal partition plate, the spacers are positioned on both sides of the wires to separate two adjacent groups of the wires, and the spacers are connected to the ground wires. The present utility model solves the problem of signal interference caused by the absence of an isolation structure between wires in the existing connector.
    Type: Application
    Filed: December 29, 2023
    Publication date: February 20, 2025
    Inventors: Xiling He, Huilin Wu, Jijian Wei, Haiqiu Lu, Xiao'an Wang, Xiaobin Wang, Jun Yang, Zhaoyang Tang, Di Jiang, Mingliang Xia, Junzhong Liu
  • Publication number: 20240426891
    Abstract: A high-impedance fault positioning method and system based on synchronous Lissajous curve characteristics are provided. The method includes: acquiring a bus zero-sequence differential voltage and a feeder zero-sequence current of a faulty line; constructing a first Lissajous curve in a characteristic frequency band range based on the bus zero-sequence differential voltage and the feeder zero-sequence current; when the proportion of the faulty line is less than a set threshold value and the slope of the first Lissajous curve is negative, determining that high-impedance faults have occurred in the faulty line; constructing a second Lissajous curve based on the bus zero-sequence differential voltage and the section zero-sequence current, performing linear fitting on discrete data points of the second Lissajous curve to obtain a fitted curve; and when the slope of the fitted curve is negative for at least three consecutive periods, determining that high-impedance faults have occurred in the section.
    Type: Application
    Filed: March 21, 2024
    Publication date: December 26, 2024
    Applicant: Shandong University
    Inventors: Fang SHI, Hengxu ZHANG, Zhaoru HAN, Zongshuai JIN, Xiaobin WANG
  • Publication number: 20240151590
    Abstract: A charging structure configured to charge a food thermometer is provided. The charging structure includes a housing, a first electrode component, a second electrode component, and an energy storage element. The housing includes a storage groove for storing the food thermometer. The first electrode component and the second electrode component are disposed on opposite ends of the storage groove, and the first electrode component and the second electrode component are configured to abut against a third electrode and a fourth electrode that are disposed on opposite ends of the food thermometer, respectively. The energy storage element is disposed inside the housing and is electrically connected to the first electrode component and the second electrode component.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 9, 2024
    Inventors: XianFeng JIA, XiaoBin WANG
  • Patent number: 11774296
    Abstract: A method and device for temperature monitoring of a power transistor formed in a semiconductor die comprising are disclosed. A side of a temperature-sensing resistor disposed in the semiconductor die is coupled to a voltage input side of the power transistor. A controller coupled to a second side of the temperature-sensing resistor is configured to detect a voltage across the resistor and trigger a temperature related corrective action using the detected voltage.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: October 3, 2023
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Zhenyu Wang, Jian Yin, Lingpeng Guan, Sitthipong Angkititrakul, Christopher Ben Bartholomeusz, Xiaobin Wang
  • Publication number: 20230295557
    Abstract: The present invention provides a system for recovering protein in a production process of an ultrahigh maltose syrup, including a saccharification tank, an enzyme preparation tank, a first plate heat exchanger, a second plate heat exchanger, a plate and frame filter, a buffer tank and a rotary drum filter. The present invention further provides a method of recovering protein by using the system. After the sugar liquid in the saccharification tank is stood, the protein floats at the upper part of the saccharification tank and the lower liquid is clear and transparent and thus the sugar liquid can be directly filtered. When the saccharification tank is discharged, the lower liquid is firstly discharged with the remaining liquid being bottoms containing protein. During a production process, enzymatic hydrolysis is performed for the sugar liquid containing protein before filtration to improve the filtration effect of the sugar liquid. Assisted by the plate and frame filter, protein can be recovered.
    Type: Application
    Filed: November 30, 2021
    Publication date: September 21, 2023
    Inventors: Xinping Cheng, Shengrong Chen, Yuqing Cheng, Yuanlong Han, Chengjun Liao, Jiaxing Luo, Xiaobin Wang
  • Publication number: 20230238440
    Abstract: A device and a method of making the device comprising, a semiconductor substrate layer and an epitaxial layer formed on the semiconductor substrate. One or more trenches are formed in the epitaxial layer, each trench having a pair of opposing sidewalls, wherein a distance between the opposing sidewalls is greater near a bottom of the trench than near a top of the trench, wherein the bottom of the trench is closer to the semiconductor substrate layer than the top.
    Type: Application
    Filed: January 21, 2022
    Publication date: July 27, 2023
    Inventors: Madhur Bobde, Sik Lui, Lei Zhang, Xiaobin Wang
  • Publication number: 20230147081
    Abstract: A method and device for temperature monitoring of a power transistor formed in a semiconductor die comprising are disclosed. A side of a temperature-sensing resistor disposed in the semiconductor die is coupled to a voltage input side of the power transistor. A controller coupled to a second side of the temperature-sensing resistor is configured to detect a voltage across the resistor and trigger a temperature related corrective action using the detected voltage.
    Type: Application
    Filed: November 11, 2021
    Publication date: May 11, 2023
    Inventors: Zhenyu Wang, Jian Yin, Lingpeng Guan, Sitthipong Angkititrakul, Christopher Ben Bartholomeusz, Xiaobin Wang
  • Publication number: 20220357302
    Abstract: Embodiments herein relate to systems and methods for detecting aeration properties in fluids using a vibration sensor. In an embodiment, a system for fluid aeration monitoring is included having a vibration sensor configured to be mounted along a fluid flow path, and a control circuit in signal communication with the vibration sensor. The control circuit can be configured to evaluate a signal received from the vibration sensor and calculate one or more aeration parameters based on signals from the vibration sensor. Other embodiments are also included herein.
    Type: Application
    Filed: July 2, 2020
    Publication date: November 10, 2022
    Inventors: Michael J. Cronin, Xiaobin Wang
  • Publication number: 20220290887
    Abstract: Embodiments herein relate to monitoring systems that can learn patterns of filtration system operation and then use the learned patterns to monitor ongoing filtration system operation/performance. In a first aspect, a monitoring system for an air filtration system is included having a control circuit, and a pressure sensor, wherein the pressure sensor is in electronic communication with the control circuit. The monitoring system can be configured to store data reflecting signals of the pressure sensor, evaluate the stored data representing a first time period to derive a valve operating pattern, and compare data from the pressure sensor obtained after the first time period against the derived valve operating pattern to identify an abnormal valve event.
    Type: Application
    Filed: March 15, 2022
    Publication date: September 15, 2022
    Inventors: Chad M. Goltzman, Charles E. Kotasek, Peter P. Vitko, Xiaobin Wang, Matthew J. Anderson, John H. Chastain, JR., Jacob C. Savstrom
  • Patent number: D921502
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: June 8, 2021
    Assignee: SHENZHEN TIANYAO TECHNOLOGY CO., LTD.
    Inventor: Xiaobin Wang