Abstract: A wide-size range aerodynamic focusing lens may include a virtual impactor comprising an inlet nozzle, a major flow tube, and a receiving nozzle. A wide-size range aerodynamic focusing lens may include a plurality of grouped focusing elements comprising a first focusing lens element group, a refocusing lens element group, and a second focusing lens element group, and. A wide-size range aerodynamic focusing lens may include an accelerating nozzle. A wide-size range aerodynamic focusing lens may include a plurality of spacers where the diameter ratio of the spacer proximal to a lens element can range from 2 to 20.

Abstract: A disconnection mechanism, for engaging or disengaging a fixed component and a movable component arranged on a first shaft extending in a first direction. The disconnection mechanism includes a shift fork, connected to the movable component, and constructed to be able to reciprocate linearly in the first direction, so that the movable component is engaged with or disengaged from the fixed component. An actuator includes an output end which rotates about a rotation axis of the actuator at a distance from the rotation axis. A drive rod has a first end rotatably connected to the output end and a second end rotatably connected to the shift fork, so that the output end, when rotating, is able to drive the shift fork to reciprocate linearly.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure, and a semiconductor structure, relating to the technical field of semiconductors. The method of manufacturing a semiconductor structure includes: providing a substrate; forming multiple initial active pillars on the substrate; forming a gate layer between initial active pillars; and forming a first dielectric layer with openings on the gate layer and on the initial active pillars; removing part of the initial active pillar located in each opening to form an active pillar; and removing part of the gate layer to form an isolation trench and a word line, such that two adjacent active pillars in the same row are located on two sides of the isolation trench.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure and a semiconductor structure. The method includes: providing a base and forming, on the base, a bit line contact region provided with a first groove; forming a first bit line contact layer in the first groove, wherein the first bit line contact layer in the first groove defines a second groove; forming a diffusion layer in the second groove, wherein the diffusion layer in the second groove defines a third groove; forming, in the third groove, a second bit line contact layer provided with a gap; and processing the diffusion layer.

Abstract: A semiconductor structure includes: a substrate; a through silicon via structure that is located in the substrate; a first heat dissipation layer that is around a side wall of the through silicon via structure, and a material of which is a metal semiconductor compound; and a second heat dissipation layer that is around the side wall of the through silicon via structure and located between the first heat dissipation layer and the through silicon via structure, and a heat conductivity of which is greater than a heat conductivity of the first heat dissipation layer.

Abstract: The present disclosure provides an electrolytic module unit based on a boron-doped diamond (BDD) electrode, including a water flow guide module and an electrolytic module. The electrolytic module is provided within the water flow guide module. The electrolytic module includes a BDD electrode including a main body portion and a plurality of branch portions disposed on two sides of the main body portion. The main body portion and the plurality of branch portions on two sides of the main body portion constitute a fishbone-like structure. The BDD electrode of the electrolytic module unit is of the fishbone-like structure.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a base, the base including a substrate and a first heat dissipation structure located in the substrate, heat conductivity of the first heat dissipation structure being higher than that of the substrate, the substrate including an upper surface and a lower surface opposite to each other, and a surface of the first heat dissipation structure being exposed on the upper surface of the substrate; a second heat dissipation structure, the second heat dissipation structure being at least located on an upper surface of the first heat dissipation structure; and a through silicon via (TSV) structure, the TSV structure penetrating through an entire thickness of the second heat dissipation structure and extending into the base, the second heat dissipation structure surrounding the TSV structure, and the first heat dissipation structure surrounding the TSV structure.

Abstract: The present disclosure relates to the technical field of semiconductors, and provides a mask pod and a semiconductor device. The mask pod includes: a body, wherein the body has an accommodation space configured to accommodate a mask, the accommodation space has a first opening, and the first opening is located on a circumferential side of the body; and a shielding member, wherein the shielding member is provided on the body and is movably provided relative to the body, to shield or release the first opening.

Abstract: The present disclosure provides an electrolytic module unit based on a boron-doped diamond (BDD) electrode, including a water flow guide module and an electrolytic module. The electrolytic module is provided within the water flow guide module. The electrolytic module includes a BDD electrode including a main body portion and a plurality of branch portions disposed on two sides of the main body portion. The main body portion and the plurality of branch portions on two sides of the main body portion constitute a fishbone-like structure. The BDD electrode of the electrolytic module unit is of the fishbone-like structure.

Abstract: The present disclosure provides a display module and a display device. The display module includes: a circuit board including a first surface and a second surface opposite to the first surface; a display substrate on the first surface of the circuit board; a first glue layer on the first surface of the circuit board and surrounding the a sidewall of the display substrate; and a second glue layer on the second surface of the circuit board, wherein a transparency of the second glue layer is different from a transparency of the first glue layer.

Abstract: A method for manufacturing a semiconductor structure includes: a substrate is provided; the substrate is etched to form a blind hole, a sidewall of the blind hole has a first roughness; at least one planarization process is performed on the sidewall of the blind hole until the sidewall of the blind hole has a preset roughness less than the first roughness. The planarization process includes: a first sacrificial layer is formed on the sidewall of the blind hole; a reaction source gas is provided such that the reaction source gas reacts with the first sacrificial layer and a portion of the substrate at the sidewall of the blind hole to form a second sacrificial layer; and the second sacrificial layer is removed, and after the second sacrificial layer is removed, the sidewall of the blind hole has a second roughness less than the first roughness.

Abstract: The present application provides a semiconductor structure and a manufacturing method thereof. The method of manufacturing the semiconductor structure includes: providing a base, the base including a substrate and a first dielectric layer on the substrate; forming a through silicon via in the base, the through silicon via penetrating through the first dielectric layer, extending into the substrate, and having a depth less than a thickness of the base; forming an electrically conductive structure in the through silicon via; forming a filling hole in the first dielectric layer and the substrate, the filling hole surrounding the electrically conductive structure, exposing a sidewall of the electrically conductive structure and a part of the substrate, and having a stepwise sidewall; and forming a thermally conductive structure in the filling hole.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure and a semiconductor structure, relating to the technical field of semiconductors. The method of manufacturing a semiconductor structure includes: providing a substrate; forming active pillars arranged in an array on the substrate, a projection shape of a longitudinal section of each of the active pillars includes a cross shape; forming a first oxide layer on the substrate, where a filling region is formed between adjacent active pillars in the same row; sequentially forming a word line and a dielectric layer in the filling region; exposing a top surface of each of the active pillars; forming a contact layer on the active pillars; and forming a capacitor structure on the contact layer.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure and a semiconductor structure, relating to the technical field of semiconductors. The method of manufacturing a semiconductor structure includes: providing a substrate; forming multiple active pillars arranged in an array on the substrate, where an outer surface layer of each of the active pillars has a concave-convex surface; forming a gate oxide layer on the substrate, where a filling region is formed between two adjacent active pillars in the same row; forming a word line and a first dielectric layer in the filling region; exposing a top surface of each of the active pillars; forming a contact layer on the top surface of each of the active pillars; and forming a capacitor structure on the contact layer.

Abstract: Method for forming a capacitor includes following operations. A base is provided. First supporting layer and first sacrificial layer are formed on the base sequentially. First through holes penetrating first supporting layer and first sacrificial layer are formed to expose the base. First through holes are filled to form first filling structures. Second supporting layer covering remaining first sacrificial layer and first filling structures is formed. Second through holes penetrating second supporting layer are formed. Second sacrificial layer covering remaining second supporting layer and second through holes, and third supporting layer are formed. Third through holes penetrating third supporting layer and second sacrificial layer are formed. First filling structures are removed to communicate each of third through holes and corresponding one of first through holes.

Abstract: The invention discloses a hydrophilic anti-fog nano paint for endoscope, which includes the following according to the number of weight parts: plant polyphenols of 1-10 parts, metal ions of 0.1-2 parts, biomass molecules of 0.1-0.5 parts, additives of 10-20 parts and solvents of 250 parts; the paint is coated on the surface of the substrate, and the desired coating can be obtained after drying; the plant polyphenol and metal ions in the invention combine to form the plant polyphenol-metal nano complex, form hydrophilic nano-film with biomass molecules on the surface of the laparoscope, and cooperatively enhance the surface interface hydrophilicity of the lens; the formula of the invention has good biocompatibility, will not cause clinical side effects when it comes into contact with tissues, and can meet the needs of clinical use.

Abstract: A memory cell includes a transistor, a storage node contact and a capacitor that are connected sequentially, wherein the capacitor includes a lower electrode, an upper electrode and a dielectric layer disposed between the lower electrode and the upper electrode. The lower electrode includes: a first electrode layer having a first sub-electrode region and a plurality of second sub-electrode regions connected to the first sub-electrode region, where the first sub-electrode region is in contact with a surface of the storage node contact, each of the second sub-electrode regions extends along a direction away from the storage node contact and has a first end face and a second end face facing each other in an extension direction, the first end face being in contact with the surface of the storage node contact; and a second electrode layer, covering at least part of a surface of the first electrode layer.

Abstract: A method for forming a capacitor includes: providing a substrate; sequentially forming a first sacrificial layer and a first support layer for covering the substrate; forming first openings penetrating through the first support layer; sequentially forming a second sacrificial layer and a second support layer for covering a remaining portion of the first support layer; forming through holes which sequentially penetrate through the second support layer, the second sacrificial layer, the remaining portion of the first support layer, and the first sacrificial layer; forming first electrode layers, each first electrode layer covering an inner wall of a respective one of the through holes; forming second openings penetrating through a remaining portion of the second support layer; and sequentially forming a dielectric layer and a second electrode layer for covering the first electrode layers, to form the capacitor.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure and a semiconductor structure. The method includes: providing a base and forming, on the base, a bit line contact region provided with a first groove; forming a first bit line contact layer in the first groove, wherein the first bit line contact layer in the first groove defines a second groove; forming a diffusion layer in the second groove, wherein the diffusion layer in the second groove defines a third groove; forming, in the third groove, a second bit line contact layer provided with a gap; and processing the diffusion layer.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure and a semiconductor structure, relating to the technical field of semiconductors. The method of manufacturing a semiconductor structure includes: providing a substrate; forming active pillars arranged in an array on the substrate, a projection shape of a longitudinal section of each of the active pillars includes a cross shape; forming a first oxide layer on the substrate, where a filling region is formed between adjacent active pillars in the same row; sequentially forming a word line and a dielectric layer in the filling region; exposing a top surface of each of the active pillars; forming a contact layer on the active pillars; and forming a capacitor structure on the contact layer.