Abstract: Segmented semiconductor nanowires are manufactured by removal of material from a layered structure of two or more semiconductor materials in the absence of a template. The removal takes place at some locations on the surface of the layered structure and continues preferentially along the direction of a crystallographic axis, such that nanowires with a segmented structure remain at locations where little or no removal occurs. The interface between different segments can be perpendicular to or at angle with the longitudinal direction of the nanowire.

Abstract: A multigate structure which comprises a semiconductor substrate; an ultra-thin silicon or carbon bodies of less than 20 nanometers thick located on the substrate; an electrolessly deposited metallic layer selectively located on the side surfaces and top surfaces of the ultra-thin silicon or carbon bodies and selectively located on top of the multigate structures to make electrical contact with the ultra-thin silicon or carbon bodies and to minimize parasitic resistance, and wherein the ultra-thin silicon or carbon bodies and metallic layer located thereon form source and drain regions is provided along with a process to fabricate the structure.

Abstract: An apparatus for plating a magnetic film on a substrate includes: a track including a plurality of stopping points along the track; a permanent magnet placed on the track such that the permanent magnet can be moved along the track towards and away from the stopping points; at least one plating tank positioned on the stopping point; and a removable high permeability iron flux concentrator inserted into gaps between the substrate and inside walls of the plating tank, substantially surrounding the substrate and extending around and under the substrate.

Abstract: The present disclosure relates to an improved method of providing a Ni silicide metal contact on a silicon surface by electrodepositing a Ni film on a silicon substrate. The improved method results in a controllable silicide formation wherein the silicide has a uniform thickness. The metal contacts may be incorporated in, for example, CMOS devices, MEM (micro-electro-mechanical) devices, and photovoltaic cells.

Abstract: A method to determine the cleanness of a semiconductor substrate and the quantity/density of pin holes that may exist within a patterned antireflective coating (ARC) is provided. Electroplating is employed to monitor the changes in the porosity of the ARC caused by the pin holes during solar cell manufacturing. In particular, electroplating a metal or metal alloy to form a metallic grid on an exposed front side surface of a substrate also fills the pin holes. The quantity/density of metallic filled pin holes (and hence the number of pin holes) in the patterned ARC can then be determined.

Abstract: A contact metallurgy structure comprising a patterned dielectric layer having vias on a substrate; a silicide layer of cobalt and/or nickel located at the bottom of vias; a contact layer comprising Ti located in vias on top of the silicide layer; a diffusion layer located in vias and on top of the contact layer; a metal fill layer in vias is provided along with a method of fabrication. The metal fill layer comprises at least one member selected from the group consisting of copper, ruthenium, rhodium platinum, palladium, iridium, rhenium, tungsten, gold, silver and osmium and alloys thereof. When the metal fill layer comprises rhodium, the diffusion layer is not required. Optionally a seed layer for the metal fill layer can be employed.

Abstract: The present invention provides a method of reducing corrosion and water decomposition on a surface of an electrode having a titanium nitride conductive layer disposed on a substrate and estimating extent of reduction thereof. The electrode is immersed into a solution containing a hydroxyl-functional compound. Thereafter, a voltage is applied to the titanium nitride conductive layer of the electrode. The extent of oxidation of the titanium nitride conductive layer is correlated with the extent of formation of oxide of titanium nitride and/or the extent of oxidation of the titanium nitride conductive layer is correlated with the increase of surface roughness. The extent of water decomposition is correlated with formation of hydrogen and oxygen bubbles.

Abstract: The present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A conductive layer is deposited on a substrate. The conductive layer is partially oxidized by an oxygen plasma process to convert a portion thereof to an oxide layer thereby forming the electrode. The oxide layer is free of surface defects and the thickness of the oxide layer is from about 0.09 nm to about 10 nm and ranges therebetween, controllable with 0.2 nm precision.

Abstract: Accordingly, the present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A substrate which has a conductive layer disposed thereon is provided and the conductive layer has an oxide layer with an exposed surface. The exposed surface of the oxide layer contacts a solution of an organic surface active compound in an organic solvent to form a protective layer of the organic surface active compound over the oxide layer. The protective layer has a thickness of from about 0.5 nm to about 5 nm and ranges therebetween depending on a chemical structure of the surface active compound.

Abstract: A semiconductor device or a photovoltaic cell having a contact structure, which includes a silicon (Si) substrate; a metal alloy layer deposited on the silicon substrate; a metal silicide layer and a diffusion layer formed simultaneously from thermal annealing the metal alloy layer; and a metal layer deposited on the metal silicide and barrier layers.

Abstract: The present disclosure provides a method of forming a back side surface field of a solar cell without utilizing screen printing. The method includes first forming a p-type dopant layer directly on the back side surface of the semiconductor substrate that includes a p/n junction utilizing an electrodeposition method. The p/n junction is defined as the interface that is formed between an n-type semiconductor portion of the substrate and an underlying p-type semiconductor portion of the substrate. The plated structure is then annealed to from a P++ back side surface field layer directly on the back side surface of the semiconductor substrate. Optionally, a metallic film can be electrodeposited on an exposed surface of the P++ back side surface layer.

Abstract: A method of forming patterned metallization by electrodeposition under illumination without external voltage supply on a photovoltaic structure or on n-type region of a transistor/junction.

Abstract: A method of patterning magnetic devices and sensors by double etching, which includes forming a layer of dielectric on a substrate; depositing a thin adhesion layer and a thin seed layer; applying a thin resist frame to pattern a structure; cleaning the metal surface to prepare for plating; electroplating to fill up the structure and the uncovered field area, which uses a paddle cell with a permanent magnet providing magnetic field to induce magnetic orientation; stripping the resist frame; etching the seed layer/adhesion layer exposed below the resist frame down to the dielectric surface; etching the rest of magnetic materials and the seed layer using electrolytic etching in the field; etching the adhesion layer in the field, and repeating the steps for building structures with multiple levels.

Abstract: A grid stack structure of a solar cell, which includes a silicon substrate, wherein a front side of the silicon is doped with phosphorus to form a n-emitter and a back side of the silicon is screen printed with aluminum (Al) metallization; a dielectric layer, which acts as an antireflection coating (ARC), applied on the silicon; a mask layer applied on the front side to define a grid opening of the dielectric layer, wherein an etching method is applied to open an unmasked grid area; a light-induced plated nickel or cobalt layer applied to the front side with electrical contact to the back side Al metallization; a silicide layer formed by rapid thermal annealing of the plated nickel (Ni) or cobalt (Co); an optional barrier layer electrodeposited on the silicide; a copper (Cu) layer electrodeposited on the silicide/barrier film layer; and a thin protective layer is chemically applied or electrodeposited on top of the Cu layer.

Abstract: The present disclosure provides a method of electrodeposition of a metal or metal alloy on at least one surface of a semiconductor material. The method of the present invention provides full coverage of an electrodeposited metallic film on the at least one surface of the semiconductor material. The method of the present disclosure includes providing a semiconductor material. A metallic film is applied to at least one surface of the semiconductor material by an electrodeposition process. The electrodeposition process employed uses current waveforms that apply a low current density initially, and after a predetermined period of time, the current density is changed to a high current density.

Abstract: A method for fabricating a phase change memory device including memory cells includes patterning a via to a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, lining each via with a conformal conductive seed layer to the contact surface, forming a dielectric layer covering the conductive seed layer, and etching a center region of each via to the contact surface to expose the conformal conductive seed layer at the contact surface. The method further includes electroplating phase change material on exposed portions of the conformal conductive seed layer, recessing the phase change material within the center region forming a conductive material that remains conductive upon oxidation, on the recessed phase change material, oxidizing edges of the conformal conductive seed layer formed along sides of each via, and forming a top electrode over each memory cell.

Abstract: A method for fabricating a phase change memory device including memory cells includes patterning a via to a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, lining each via with a conformal conductive seed layer to the contact surface, forming a dielectric layer covering the conductive seed layer, and etching a center region of each via to the contact surface to expose the conformal conductive seed layer at the contact surface. The method further includes electroplating phase change material on exposed portions of the conformal conductive seed layer, recessing the phase change material within the center region forming a conductive material that remains conductive upon oxidation, on the recessed phase change material, oxidizing edges of the conformal conductive seed layer formed along sides of each via, and forming a top electrode over each memory cell.

Abstract: An apparatus for plating a magnetic film on a substrate includes: a track including a plurality of stopping points along the track; a permanent magnet placed on the track such that the permanent magnet can be moved along the track towards and away from the stopping points; at least one plating tank positioned on the stopping point; and a removable high permeability iron flux concentrator inserted into gaps between the substrate and inside walls of the plating tank, substantially surrounding the substrate and extending around and under the substrate.

Abstract: An apparatus and method designed to remove metals from a wafer surface using an electrolytic removal process. The apparatus includes a conductive pad having a plurality of alternating cathodes and anodes provided with a power source. The conductive pad is structured and configured to contact all metal islands on a surface of the wafer. Gaps are provided between pairs of the plurality of alternating cathodes and anodes.

Abstract: An apparatus for plating a magnetic film on a substrate includes: a track including a plurality of stopping points along the track; a permanent magnet placed on the track such that the permanent magnet can be moved along the track towards and away from the stopping points; at least one plating tank positioned on the stopping point; and a removable high permeability iron flux concentrator inserted into gaps between the substrate and inside walls of the plating tank, substantially surrounding the substrate and extending around and under the substrate.