Abstract: An apparatus includes a ramp generator configured to produce a set signal for determining a phase shift between a first phase and a second phase of a power converter, a first phase on-timer configured to produce a first reset signal for determining a turn-on time of a high-side switch of the first phase of the power converter, a second phase on-timer configured to produce a second reset signal for determining a turn-on time of a high-side switch of the second phase of the power converter, and a control logic block configured to generate gate drive signals for the first phase and the second phase of the power converter based on the set signal, the first reset signal and the second reset signal.

Abstract: An apparatus includes a ramp generator configured to produce a set signal for determining a phase shift between a first phase and a second phase of a power converter, a first phase on-timer configured to produce a first reset signal for determining a turn-on time of a high-side switch of the first phase of the power converter, a second phase on-timer configured to produce a second reset signal for determining a turn-on time of a high-side switch of the second phase of the power converter, and a control logic block configured to generate gate drive signals for the first phase and the second phase of the power converter based on the set signal, the first reset signal and the second reset signal.

Abstract: An apparatus includes a first conversion unit configured to convert a ramp voltage signal into a ramp current signal flowing through a first resistor, a second conversion unit configured to convert a feedback voltage signal into a feedback current signal flowing through the first resistor, a third conversion unit configured to convert a control voltage signal generated by an error amplifier into a control current signal flowing through a second resistor, and a comparator having a first input coupled to the first resistor and a second input coupled to the second resistor, wherein an output of the comparator determines a turn-on of a high-side switch of a power converter.

Abstract: An apparatus includes a buck converter portion of a buck-boost converter configured to operate under a constant on-time control scheme, wherein an on-time of a high-side switch of the buck converter portion is determined by a buck on-time timer, and a boost converter portion of the buck-boost converter configured to operate under a constant off-time control scheme, wherein an off-time of a low-side switch of the boost converter portion is determined by a boost off-time timer.

Abstract: An apparatus includes a buck converter portion of a buck-boost converter configured to operate under a constant on-time control scheme, wherein an on-time of a high-side switch of the buck converter portion is determined by a buck on-time timer, and a boost converter portion of the buck-boost converter configured to operate under a constant off-time control scheme, wherein an off-time of a low-side switch of the boost converter portion is determined by a boost off-time timer.

Abstract: An apparatus includes a first timer configured to determine a turn-off time of a first high-side switch of a buck-boost converter, and a second timer configured to determine a turn-off time of a second low-side switch of the buck-boost converter based on a comparison between a first signal and a second signal, the first signal being proportional to an input voltage of the buck-boost converter, and the second signal being generated based on a signal proportional to an output voltage of the buck-boost converter.

Abstract: An apparatus includes a ramp generator configured to produce a set signal for determining a phase shift between a first phase and a second phase of a power converter, a first phase on-timer configured to produce a first reset signal for determining a turn-on time of a high-side switch of the first phase of the power converter, a second phase on-timer configured to produce a second reset signal for determining a turn-on time of a high-side switch of the second phase of the power converter, and a control logic block configured to generate gate drive signals for the first phase and the second phase of the power converter based on the set signal, the first reset signal and the second reset signal.

Abstract: An apparatus includes a transistor coupled to a load through an output terminal of a load switch IC, a gate drive circuit connected to a gate of the transistor, wherein the gate drive circuit is configured such that in a short circuit event, a voltage on the gate of the transistor is gradually reduced, and wherein as a result of reducing the voltage on the gate of the transistor gradually, a negative voltage occurring at the output terminal of the load switch IC is minimized.

Abstract: An apparatus includes a buck-boost converter comprising a buck portion and a boost portion connected in cascade, and a controller comprising a first timer and a second timer, wherein the first timer is configured to determine a turn-on time of a high-side switch of the buck portion, and wherein the first timer determines the turn-on time of the high-side switch of the buck portion based on a comparison between a first signal and a second signal, and wherein the first signal is proportional to an output voltage of the buck-boost converter and the second signal is generated based on a signal proportional to an input voltage of the buck-boost converter, and the second timer is configured to determine a turn-on time of a low-side switch of the boost portion.

Abstract: An apparatus includes a first conversion unit configured to convert a ramp voltage signal into a ramp current signal flowing through a first resistor, a second conversion unit configured to convert a feedback voltage signal into a feedback current signal flowing through the first resistor, a third conversion unit configured to convert a control voltage signal generated by an error amplifier into a control current signal flowing through a second resistor, and a comparator having a first input coupled to the first resistor and a second input coupled to the second resistor, wherein an output of the comparator determines a turn-on of a high-side switch of a power converter.

Abstract: An apparatus includes a buck converter portion of a buck-boost converter configured to operate under a constant on-time control scheme, wherein an on-time of a high-side switch of the buck converter portion is determined by a buck on-time timer, and a boost converter portion of the buck-boost converter configured to operate under a constant off-time control scheme, wherein an off-time of a low-side switch of the boost converter portion is determined by a boost off-time timer.

Abstract: A method includes converting a ramp voltage signal into a ramp current signal, a feedback signal into a feedback current signal, a reference signal into a reference current signal, and a control signal into a control current signal through a plurality of adjustable-gain units, and determining a turn-on of a high-side switch of a power converter through comparing a first control voltage and a second control voltage, wherein the first control voltage is generated based on a sum of the ramp current signal and the feedback current signal, and the second control voltage is generated based on a sum of the reference current signal and the control current signal.

Abstract: An apparatus includes a first timer configured to determine a turn-off time of a first high-side switch of a buck-boost converter, and a second timer configured to determine a turn-off time of a second low-side switch of the buck-boost converter based on a comparison between a first signal and a second signal, the first signal being proportional to an input voltage of the buck-boost converter, and the second signal being generated based on a signal proportional to an output voltage of the buck-boost converter.

Abstract: A switch frequency control apparatus comprises a timer configured to receive a ramp and a threshold voltage, and generate a control signal for setting gate drive signals of a power converter, a ramp generator configured to generate the ramp through charging a ramp capacitor using a current source having a current level equal to a bias voltage divided by a resistor, and a threshold generator configured to generate the threshold voltage proportional to the bias voltage.

Abstract: A buck-boost converter comprises generating a first ramp using a first current source having a current level proportional to an input voltage of a buck-boost converter, and a second ramp using a second current source having a current level proportional to an output voltage of the buck-boost converter, generating a first threshold voltage proportional to a difference between the input voltage and the output voltage of the buck-boost converter, and a second threshold voltage proportional to the input voltage of the buck-boost converter, terminating a gate drive signal of a first low-side switch of the buck-boost converter based upon comparing the first threshold voltage and the first ramp, and terminating a gate drive signal of a second high-side switch of the buck-boost converter based upon comparing the second threshold voltage and the second ramp.

Abstract: An apparatus includes a buck-boost converter comprising a buck portion and a boost portion connected in cascade, and a controller comprising a first timer and a second timer, wherein the first timer is configured to determine a turn-on time of a high-side switch of the buck portion, and wherein the first timer determines the turn-on time of the high-side switch of the buck portion based on a comparison between a first signal and a second signal, and wherein the first signal is proportional to an output voltage of the buck-boost converter and the second signal is generated based on a signal proportional to an input voltage of the buck-boost converter, and the second timer is configured to determine a turn-on time of a low-side switch of the boost portion.

Abstract: A controller includes a first timer for setting a turn-on time of a first high-side switch of a buck-boost converter, wherein the turn-on time of the first high-side switch is determined by an input voltage of the buck-boost converter, an output voltage of the buck-boost converter and a first predetermined bias voltage, a second timer for setting a turn-on time of a second low-side switch of the buck-boost converter, wherein the turn-on time of the second low-side switch is determined by the input voltage of the buck-boost converter, the output voltage of the buck-boost converter and a second predetermined bias voltage, and a valley current mode control device for setting a turn-on time of a first low-side switch and a turn-on time of a second high-side switch of the buck-boost converter.

Abstract: A method includes converting a ramp voltage signal into a ramp current signal, a feedback signal into a feedback current signal, a reference signal into a reference current signal, and a control signal into a control current signal through a plurality of adjustable-gain units, and determining a turn-on of a high-side switch of a power converter through comparing a first control voltage and a second control voltage, wherein the first control voltage is generated based on a sum of the ramp current signal and the feedback current signal, and the second control voltage is generated based on a sum of the reference current signal and the control current signal.

Abstract: An apparatus includes a first adjustable-gain conversion unit configured to receive a ramp signal, a second adjustable-gain conversion unit configured to receive a feedback signal proportional to an output voltage of a power converter, a third adjustable-gain conversion unit configured to receive an output signal of an error amplifier and a comparator configured to determine a turn-on of a high-side switch of the power converter based on outputs of the first adjustable-gain conversion unit, the second adjustable-gain conversion unit and the third adjustable-gain conversion unit.

Abstract: A power converter comprises a first switch and a second switch connected in series between an input power source and ground, an inductor connected between a common node of the first switch and the second switch, and an output capacitor, a control apparatus comprising a feedback control apparatus and an ramp generator, wherein the ramp generator is configured to dynamically adjust an amplitude of a ramp based upon different operating conditions, an on-time control generator and a latch having a set input configured to receive an output signal of the control apparatus and a reset input configured to receive an output signal of the on-time control generator.