Abstract: A buck-boost converter comprises generating a first ramp using a first current source having a current level proportional to an input voltage of a buck-boost converter, and a second ramp using a second current source having a current level proportional to an output voltage of the buck-boost converter, generating a first threshold voltage proportional to a difference between the input voltage and the output voltage of the buck-boost converter, and a second threshold voltage proportional to the input voltage of the buck-boost converter, terminating a gate drive signal of a first low-side switch of the buck-boost converter based upon comparing the first threshold voltage and the first ramp, and terminating a gate drive signal of a second high-side switch of the buck-boost converter based upon comparing the second threshold voltage and the second ramp.

Abstract: A buck-boost converter comprises a first high-side switch and a first low-side switch connected in series between an input voltage terminal and ground, a second high-side switch and a second low-side switch connected in series between an output voltage terminal and ground, an inductor connected to a common node of the first high-side switch and the first low-side switch, and a common node of the second high-side switch and the second low-side switch and a control apparatus configured to generate gate drive signals, wherein the control apparatus comprises a first timer for setting a turn-off time of the first low-side switch, a second timer for setting a turn-off time of the second high-side switch and a peak current mode control device for setting a turn-off time of the first high-side switch and a turn-off time of the second low-side switch.

Abstract: A switch frequency control apparatus comprises a timer configured to receive a ramp and a threshold voltage, and generate a control signal for setting gate drive signals of a power converter, a ramp generator configured to generate the ramp through charging a ramp capacitor using a current source having a current level equal to a bias voltage divided by a resistor, and a threshold generator configured to generate the threshold voltage proportional to the bias voltage.

Abstract: An apparatus includes a first adjustable-gain conversion unit configured to receive a ramp signal, a second adjustable-gain conversion unit configured to receive a feedback signal proportional to an output voltage of a power converter, a third adjustable-gain conversion unit configured to receive an output signal of an error amplifier and a comparator configured to determine a turn-on of a high-side switch of the power converter based on outputs of the first adjustable-gain conversion unit, the second adjustable-gain conversion unit and the third adjustable-gain conversion unit.

Abstract: A switch frequency control apparatus comprises a timer coupled between a bias voltage and ground, wherein the timer comprises a first input configured to receive a ramp, a second input configured to receive a threshold voltage and an output configured to be connected to an input of a PWM circuit, wherein the output of the timer is used for setting either a constant on-time or a constant off-time of a power converter and a threshold generator coupled between the bias voltage and ground, wherein the threshold generator is configured to receive a plurality of control signals of the power converter and generate the threshold voltage based upon a duty cycle of the power converter.

Abstract: A switch frequency control apparatus comprises a timer coupled between a bias voltage and ground, wherein the timer comprises a first input configured to receive a ramp, a second input configured to receive a threshold voltage and an output configured to be connected to an input of a PWM circuit, wherein the output of the timer is used for setting either a constant on-time or a constant off-time of a power converter and a threshold generator coupled between the bias voltage and ground, wherein the threshold generator is configured to receive a plurality of control signals of the power converter and generate the threshold voltage based upon a duty cycle of the power converter.

Abstract: A power converter comprises a first switch and a second switch connected in series between an input power source and ground, an inductor connected between a common node of the first switch and the second switch, and an output capacitor, a control apparatus comprising a feedback control apparatus and an ramp generator, wherein the ramp generator is configured to dynamically adjust an amplitude of a ramp based upon different operating conditions, an on-time control generator and a latch having a set input configured to receive an output signal of the control apparatus and a reset input configured to receive an output signal of the on-time control generator.

Abstract: A buck-boost converter comprises a first high-side switch and a first low-side switch connected in series between an input voltage terminal and ground, a second high-side switch and a second low-side switch connected in series between an output voltage terminal and ground, an inductor connected to a common node of the first high-side switch and the first low-side switch, and a common node of the second high-side switch and the second low-side switch and a control apparatus configured to generate gate drive signals, wherein the control apparatus comprises a first timer for setting a turn-off time of the first low-side switch, a second timer for setting a turn-off time of the second high-side switch and a peak current mode control device for setting a turn-off time of the first high-side switch and a turn-off time of the second low-side switch.

Abstract: An apparatus comprises a first voltage-current conversion unit configured to receive a ramp signal, a second voltage-current conversion unit configured to receive a feedback signal proportional to an output voltage of a power converter, a third voltage-current conversion unit configured to receive an output signal of an error amplifier and a comparator having a first input coupled to an output of the third voltage-current conversion unit and a second input coupled to an output of the first voltage-current conversion unit and an output of the second voltage-current conversion unit through a first summing unit, wherein an output of the comparator determines a turn-on of a high-side switch of the power converter.

Abstract: The present disclosure provides a system and method for managing a four-switch BUCKBOOST converter with a combination of a Constant Off-time (COT) control and a Peak Current Mode (PCM) control. With the COT control, the four-switch BUCKBOOST converter can automatically and smoothly transition between a BUCK mode, a BUCKBOOST mode, and a BOOST mode when input voltage varies. In some implementations, the four-switch BUCKBOOST converter only requires a simple, low-power-consumption and robust system control loop compensation with the PCM control for inductor current, and, thus, eliminates the need for oscillator and slope compensation circuit. The PCM control is used to determine turn-off-timing of switches of the four-switch BUCKBOOST converter. The system control loop compensation can provide cycle-by-cycle current limit function to protect the converter and load from over-current damages.

Abstract: A synchronous buck direct current to direct current (DC-DC) converter includes a signal output terminal, an output stage circuit, a first comparator, a latch, a control logic circuit, a driver circuit and an on-time control circuit. The output stage circuit provides an output voltage to the signal output terminal according to an input voltage. The first comparator receives a reference voltage and a feedback signal related to the output voltage and outputs a control signal. The latch receives the control signal and a timing signal and outputs an on-enable signal. The control logic circuit receives the on-enable signal and outputs an on-control signal. The driver circuit controls charge/discharge time of the output stage circuit according to the on-control signal. The on-time control circuit receives the on-control signal and the input voltage and outputs the timing signal related to a duty cycle of the output stage circuit.

Abstract: A synchronous buck direct current to direct current (DC-DC) converter includes a signal output terminal, an output stage circuit, a first comparator, a latch, a control logic circuit, a driver circuit and an on-time control circuit. The output stage circuit provides an output voltage to the signal output terminal according to an input voltage. The first comparator receives a reference voltage and a feedback signal related to the output voltage and outputs a control signal. The latch receives the control signal and a timing signal and outputs an on-enable signal. The control logic circuit receives the on-enable signal and outputs an on-control signal. The driver circuit controls charge/discharge time of the output stage circuit according to the on-control signal. The on-time control circuit receives the on-control signal and the input voltage and outputs the timing signal related to a duty cycle of the output stage circuit.

Abstract: A converter circuit has an error amplifier to provide an error signal; a proportional amplifier to provide a gain signal according the error signal and an output voltage of the converter circuit; a first comparator, generating a pulse signal according to the gain signal and a comparison signal; and a timer, generating a timing signal according to the pulse signal to indicate the on time and the off time of the converter circuit; and wherein either the gain signal or the comparison signal comprises a ramp component, and wherein the on time of the converter circuit is constant.

Abstract: The present application discloses a control circuit of a switching power converter, wherein the switching power converter comprises a power switch, and is configured to convert an input voltage into an output voltage, the control circuit comprises: a first time generating circuit configured to generate a first time signal; a phase lock circuit configured to generate a second time signal; and a switching signal generating circuit configured to generate a switching signal to control the ON and OFF switching of the power switch. The phase lock circuit generates the second time signal in accordance with the frequency difference between the switching signal and a reference clock signal, so as to get the frequency of the switching signal to be substantially equal to the frequency of the reference clock signal.

Abstract: In one embodiment, a switch mode power supply comprising a switch and a control circuit is disclosed. The control circuit may comprise a multi-function pin configured to receive a first current sampling signal and a first voltage sampling signal. A first comparing signal may be provided by comparing the first voltage sampling signal with a first threshold signal when the switch is turned OFF, and a second comparing signal may be provided by comparing the first current sampling signal with a second threshold signal when the switch is turned ON. The control circuit may be configured to control the switch in accordance with the first comparing signal and the second comparing signal.

Abstract: The present invention provides a switching converter with pulse skipping mode. The switching converter comprises a switching circuit having at least one switch, a controller and a feedback circuit. The controller comprises an error amplifying circuit, a logic circuit, a ramp signal generator and a pulse skipping circuit. The error amplifying circuit generates a compensation signal based on comparing the feedback signal with a reference signal. The logic circuit generates a control signal to control the ON and OFF switching of the at least one switch based on the compensation signal. The ramp signal generator generates a ramp signal. The pulse skipping circuit generates a pulse skipping signal based on the compensation signal, the ramp signal and a threshold voltage. The logic circuit skips one or more switching pulses of the control signal in accordance with the pulse skipping signal.

Abstract: A sample and hold circuit and the method thereof are disclosed. The sample and hold circuit may be applied in voltage regulators or other circuits. The sample and hold circuit comprises: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a control circuit configured to receive the input signal and the output signal, and wherein based on the input signal and the output signal, the control circuit generates a digital signal, and wherein the digital signal increases when the output signal is lower than the input signal, and maintains when the output signal is larger than or equal to the input signal; a digital-to-analog converter (DAC) configured to convert the digital signal to the output signal.

Abstract: A constant ON-time converter is disclosed. The constant ON-time converter comprises a feedback circuit, a slope compensation circuit and a buffer circuit. The feedback signal comprises an output configured to provide a feedback signal indicating an output voltage of the constant ON-time converter. The slope compensation circuit comprises an output configured to provide a slope compensation signal. The buffer circuit is coupled between the output of the feedback circuit and the output of the slope compensation circuit to avoid the feedback signal and the output voltage of the constant ON-time converter is influenced by the slope compensation signal.

Abstract: The present invention provides a controller used in a switching power supply. The controller comprises an oscillator, a first comparison circuit and a logic circuit. The oscillator generates a slope compensation signal and a clock signal. The first comparison circuit generates a first comparison signal in accordance with a current sensing signal, a feedback signal and the slope compensation signal. The logic circuit generates a control signal to control the main switch based on the clock signal and the first compensation signal. If the on time of the main switch is longer than the predetermined time period, the slope compensation signal will have a first slew rate during the predetermined time period and a second slew rate out of the predetermined time period, wherein the second slew rate is smaller than the first slew rate.

Abstract: The present invention provides a controller used in a switching power supply. The controller comprises an oscillator, a first comparison circuit and a logic circuit. The oscillator generates a slope compensation signal and a clock signal. The first comparison circuit generates a first comparison signal in accordance with a current sensing signal, a feedback signal and the slope compensation signal. The logic circuit generates a control signal to control the main switch based on the clock signal and the first compensation signal. If the on time of the main switch is longer than the predetermined time period, the slope compensation signal will have a first slew rate during the predetermined time period and a second slew rate out of the predetermined time period, wherein the second slew rate is smaller than the first slew rate.