Abstract: A doping method and a doping apparatus of an array substrate are provided. The doping method includes: providing a substrate defined with to-be-heavily-doped region, to-be-lightly-doped region and to-be-doped channel region; forming a photoresist layer by a lithography process, the photoresist layer including first through third photoresist portions respectively corresponding to the to-be-heavily-doped region, the to-be-lightly-doped region and the to-be-doped channel region, the first photoresist portion being thinner than the second photoresist portion, the second photoresist portion being thinner than the third photoresist portion; and performing one time of doping on the to-be-heavily-doped region, the to-be-lightly-doped region and the to-be-doped region through the photoresist layer and thereby forming a heavily-doped region, a lightly-doped region and a channel region respectively.

Abstract: The invention provides a manufacturing method of a low temperature polysilicon thin film transistor, including: providing a substrate; forming a buffer layer on the substrate; simultaneously forming a polysilicon layer and a photoresist layer on the buffer layer; implanting ions into a source region and a drain region; removing the photoresist layer; forming an insulating layer on the polysilicon layer; forming a gate electrode on the insulating layer; and forming a passivation layer on the insulating layer. The passivation layer covers the gate electrode. The invention can only use one time of mask process and one time of ion implantation process to complete the manufacturing processing of the polysilicon layer, the manufacturing process can be simplified and therefore the cost of process is reduced and the productivity is improved.

Abstract: A doping method for an array substrate and a manufacturing equipment. The doping method comprises: using a halftone mask to form a photoresist pattern layer on a gate insulation layer of a substrate; wherein, a polysilicon pattern layer is disposed on the substrate; the gate insulation layer covers the polysilicon pattern layer; the photoresist pattern layer corresponding to a heavily doping region forms a hollow portion; the photoresist pattern layer corresponding to a lightly doping region forms a first photoresist portion; the photoresist pattern layer corresponding to an undoped region forms a second photoresist portion; the first photoresist portion is thinner than the second photoresist portion; and performing one doping process to the polysilicon pattern layer such that the heavily doping region and the lightly doping region of the polysilicon pattern layer are formed simultaneously in order to reduce the manufacturing process of an LTPS array substrate.

Abstract: The present invention discloses a shift register unit, employed for providing a gate voltage to a nth pixel of a liquid crystal display, and comprising first to third P-type transistors, and gates of the first, second P-type transistors respectively receive gate voltages of n-2th, n-2th pixels, and first end of the first, second P-type transistors respectively receive first and second input signals, and both second ends of the first and second P-type transistors are coupled to a gate of the third P-type transistor; the gate voltages of the n-2th, n-2th pixels are respectively employed to control on-off of the first and second P-type transistors, and to make the first input signal on-off the third P-type transistor; n is a nature number larger than 2; a first end of the third P-type transistor is coupled to a first clock signal or a second clock signal, and a second end is employed as being a voltage output end to be coupled to the nth pixel.

Abstract: The disclosure is related to a touch panel including a substrate; a low-temperature poly-silicon layer, a first isolating layer, a gate and a second isolating layer arranged in sequence and disposed on a surface of the substrate; a source and a drain disposed on the second isolating layer, the source and the drain disposed separately and respectively connected to the low-temperature poly-silicon layer through a through hole; a planar layer disposed on the source, the drain and the second isolating layer, the planar layer having a first via corresponding to the drain; a filling part filling the first via and the filling part electrically connected to the drain; a third isolating layer disposed on the planar layer, the third isolating layer having a second via corresponding to the filling part; a pixel electrode disposed on the third isolating layer and electrically connected to the filling part through the second via.

Abstract: The present disclosure relates to a computer implemented method, a computer program product, and a computer system for verifying the road network of map. An embodiment of the present invention provides a method for verifying a road network of a map. The method comprises: determining, based on locations of a set of points in the map, a trajectory distance of a trajectory between a start point and an end point in the set of points on the map; determining a route distance between the start point and the end point in the road network of the map; and verifying the road network by comparing the trajectory distance and the route distance.

Abstract: The present disclosure relates to a computer implemented method, a computer program product, and a computer system for verifying the road network of map. An embodiment of the present invention provides a method for verifying a road network of a map. The method comprises: determining, based on locations of a set of points in the map, a trajectory distance of a trajectory between a start point and an end point in the set of points on the map; determining a route distance between the start point and the end point in the road network of the map; and verifying the road network by comparing the trajectory distance and the route distance.

Abstract: The present disclosure relates to a computer implemented method, a computer program product, and a computer system for verifying the road network of map. An embodiment of the present invention provides a method for verifying a road network of a map. The method comprises: determining, based on locations of a set of points in the map, a trajectory distance of a trajectory between a start point and an end point in the set of points on the map; determining a route distance between the start point and the end point in the road network of the map; and verifying the road network by comparing the trajectory distance and the route distance.

Abstract: The present disclosure relates to a computer implemented method, a computer program product, and a computer system for verifying the road network of map. An embodiment of the present invention provides a method for verifying a road network of a map. The method comprises: determining, based on locations of a set of points in the map, a trajectory distance of a trajectory between a start point and an end point in the set of points on the map; determining a route distance between the start point and the end point in the road network of the map; and verifying the road network by comparing the trajectory distance and the route distance.

Abstract: A method and apparatus of location sequence inferences for moving objects traveling along a path. The method and apparatus primarily concerns determining the location of a moving vehicle on a roadway in a roadway network. The inputs to the system include: raw GPS tracking sequence with timestamp, trajectory of the moving object inferred by map matching, accurate speed sequence from a reliable device, e.g. OBD (On-Board Diagnostics is an automotive term referring to a vehicle's self-diagnostic and reporting capability), historical map matching results and historical locations sequence inference results. The output of the system is a sequence of more accurate location (on road segments) sequences than raw GPS locations and map matching results.

Abstract: An inhibitor targeting specific complement, the inhibitor targeting specific complement is a protein, the protein has a targeted inhibition function on the complement activation, and the amino acid sequence of the protein comprises CRIg extracellular domain and complement inhibiting domain; the amino acid sequence of the protein is consist of the CRIg extracellular domain and the complement inhibiting domain connected directly, or indirectly through a linker which can connect the two domains The preparation method of the inhibitor targeting specific complement comprises connecting the protein polypeptides of the CRIg extracellular domain and the complement inhibiting domain by gene engineering technology. The protein can be used to prepare a drug targeting inhibition of complement activation.

Abstract: According to an example, fluctuations of a metric for events are determined. The fluctuations are for multiple time intervals. A pixel-based visualization of the fluctuations is generated, and the pixels represent amounts of the fluctuations.

Abstract: The present invention provides a liquid crystal display and a shift register thereof. Each shift register unit of the shift register comprises a storage circuit, receiving and temporarily storing a former stage signal, a voltage level control circuit and an inverter circuit, charging and discharging scan lines of a liquid crystal display panel, and a first node exists between the voltage level control circuit and the inverter circuit, and a second node exists between the storage circuit and the voltage level control circuit, and the storage circuit is employed to selectively invert and output received level signals to the second node under control of a first sequence signal, and the voltage level control circuit is employed to provide a low level signal to the first node, and the inverter circuit is employed to selectively invert and output the low level signal provided by the voltage level control circuit under control of a second sequence signal.

Abstract: The present disclosure relates to a computer implemented method, a computer program product, and a computer system for verifying the road network of map. An embodiment of the present invention provides a method for verifying a road network of a map. The method comprises: determining, based on locations of a set of points in the map, a trajectory distance of a trajectory between a start point and an end point in the set of points on the map; determining a route distance between the start point and the end point in the road network of the map; and verifying the road network by comparing the trajectory distance and the route distance.

Abstract: A speaker's fast installation assembly includes one ring portion and a plurality of fixing units. Each fixing unit includes an upper cylindrical portion, a lower cylindrical portion and a spring. Each lower cylindrical portion has an L shape and includes a vertical cylindrical part and a horizontal part, which horizontally extends from a lower portion of the vertical cylindrical part.

Abstract: The present disclosure relates to a computer implemented method, a computer program product, and a computer system for verifying the road network of map. An embodiment of the present invention provides a method for verifying a road network of a map. The method comprises: determining, based on locations of a set of points in the map, a trajectory distance of a trajectory between a start point and an end point in the set of points on the map; determining a route distance between the start point and the end point in the road network of the map; and verifying the road network by comparing the trajectory distance and the route distance.

Abstract: The present disclosure relates to a computer implemented method, a computer program product, and a computer system for verifying the road network of map. An embodiment of the present invention provides a method for verifying a road network of a map. The method comprises: determining, based on locations of a set of points in the map, a trajectory distance of a trajectory between a start point and an end point in the set of points on the map; determining a route distance between the start point and the end point in the road network of the map; and verifying the road network by comparing the trajectory distance and the route distance.

Abstract: The present disclosure relates to a computer program product for verifying the road network of map. An embodiment of the present invention provides a method for verifying a road network of a map. The method comprises: determining, based on locations of a set of points in the map, a trajectory distance of a trajectory between a start point and an end point in the set of points on the map; determining a route distance between the start point and the end point in the road network of the map; and verifying the road network by comparing the trajectory distance and the route distance.

Abstract: A door assembly for a light fixture that includes a door frame formed of two opposing frame sides connected to two opposing frame ends that collectively form an opening and define a door frame plane. A reflector is positioned within the door frame to span the opening and to extend downwardly through the door frame plane such that at least a portion of the reflector extends below the door frame plane.

Abstract: Provided is a hand brake, comprising a hand wheel (4), a chain (5), an enclosure (1), a drive shaft assembly (3) which is disposed in the enclosure (1), bull gear (13), and base assembly; the hand wheel (4) is connected to the drive shaft assembly (3), one end of the chain (5) is fixed to the bull gear (13) by means of rivets, and the main shaft of the bull gear (13) is a chain winding shaft (2). The hand brake further comprises a limiting device disposed on the chain winding shaft (2) between the bull gear (13) and the base (22); the limiting device comprises a bearing I (10), a torsion spring (11), a guide plate (9), and a guide plate holder (23); the torsion spring (11) is sleeved on the outside of the bearing I (10).