Abstract: A method for manufacturing a semiconductor device includes forming a contact etch stop layer on an active area of a substrate that has a gate stack formed thereon. The gate stack includes a metal gate and a metal oxide. The contact etch stop layer includes a silicon oxide layer sandwiched between a first and a silicon nitride layers, the second silicon nitride layer is disposed on the active area. The method further includes forming a contact hole extending through an interlayer dielectric layer on the first silicon nitride layer using the first silicon nitride layer as a protection for the active area, removing a portion the first silicon nitride layer disposed at the bottom of the contact hole using the silicon oxide layer as a protection for the active area, and removing the metal oxide using the second silicon nitride layer as a protection for the active area.

Abstract: A semiconductor apparatus and a manufacturing method therefor is described. The semiconductor apparatus comprises a substrate and a gate structure for a N-channel semiconductor device above the substrate. A recess is formed at a lower end portion of at least one of two sides of the gate where it is adjacent to a source region and a drain region, of the N-channel semiconductor. The channel region of the N-channel semiconductor device has enhanced strain. The apparatus can further have a gate structure for a P-channel semiconductor device above the substrate.

Abstract: A method for manufacturing a semiconductor device comprises: providing a substrate having an active area and a gate structure on the active area and formed with a first interlayer dielectric layer thereon, wherein the first interlayer dielectric layer has a first open to expose a portion of a surface of the active area, and an upper surface of the first interlayer dielectric layer is substantially flush with an upper surface of the gate; filling the first open with a first conductive material to form a first portion of contact; forming a second interlayer dielectric layer over the first interlayer dielectric layer, the second interlayer dielectric layer having a second open to substantially expose an upper part of the first portion of the contact in the first open; and filling the second open with a second conductive material to form a second portion of the contact.

Abstract: A semiconductor device and method for manufacturing the same are provided. A substrate with an active area and a first interlayer dielectric formed over the substrate is provided. The first interlayer dielectric has a first opening exposing a portion of a surface of the active area, the first opening being filled with a fill material. A second interlayer dielectric is formed over the first interlayer dielectric with a second opening substantially exposing an upper portion of the fill material in the corresponding first opening. The fill material is then removed and the first opening and the second opening are filled with a conductive material to form a contact.

Abstract: A new MOSFET device is described comprising a metal gate electrode, a gate dielectric and an interfacial layer. The interfacial layer comprises a lanthanum hafnium oxide material for modulating the effective work function of the metal gate. The gate dielectric material in contact with the interfacial layer is different that the interfacial layer material. A method for its manufacture is also provided and its applications.