Abstract: A method of optimizing resource allocation based on adaptive multi-faceted cutting of a power dispatching model is provided. The method includes constructing and analyzing a two-stage distributed robust model by using acquired operation state information of a power system and identifying therefrom a second-stage infinite-dimensional decision variable. A model is reconstructed by dimensionality reduction and a dispatching model is solved to obtain a dispatching strategy scheme for realizing optimal resource allocation. The two-stage distributed robust dispatching model is transformed into a finite-dimensional problem, so that rapid solution is realized. By improving the solving efficiency and the accuracy of the power dispatching model, the working efficiency of the power system is obviously improved.

Abstract: An information verification method based on a cloud security technology is provided. Before transmitting to-be-verified information including user information, a terminal device performs encryption processing on the to-be-verified information by using random numbers and a public key issued by a verification server, to obtain to-be-verified ciphertext information, which is to be used throughout transmission for logging into a server of a third-party application. The server of the third-party application cannot decrypt the to-be-verified information and the to-be-verified information may be obtained only by the verification server. The verification server transmits an application login success message to the terminal device based on decryption processing on the to-be-verified ciphertext information. In this way, the server of the third-party application may be logged in to without exposing privacy information of a user to the third-party application, thereby improving the security of identity verification.

Abstract: A data processing method including receiving a data flow sent by an encoder side, where the data flow is a bit stream on which interleaving encoding is used, the data flow includes synchronization information, and the synchronization information is distributed in the data flow based on a first permutation interval, obtaining, from the data flow, first data information based on a first value interval and a first value length, where the first value interval is equal to the first permutation interval, and a difference between the first value length and a length of the synchronization information is less than or equal to a preset error value, and when a similarity between the first data information and the synchronization information exceeds a preset similarity threshold, performing de-interleaving on the data flow based on a start location of the first data information.

Abstract: Disclosed is a connector assembly. The connector assembly comprises a first connector and a second connector, wherein the first connector comprises a first base body, a first ground terminal and a first shielding piece, the first ground terminal and the first shielding piece are both arranged on the first base body, and the first ground terminal is electrically connected to the first shielding piece; and the second connector comprises a second base body, a second ground terminal and a second shielding piece, the second ground terminal and the second shielding piece are both arranged on the second base body, the second ground terminal is electrically connected to the second shielding piece, and the second ground terminal is electrically connected to the first ground terminal.

Abstract: An array substrate includes: a base substrate, a light shielding layer on a first surface of the base substrate, and a plurality of pixel units and a first common electrode bus on a second surface of the base substrate. The base substrate includes a display region, first and second peripheral regions. Orthographic projections of the pixel units on the base substrate are arranged in an array in the display region. At least part of an orthographic projection of the light shielding layer and at least part of an orthographic projection of the first common electrode bus on the base substrate are in the second peripheral region, and the first common electrode bus is electrically connected to the common electrode included in at least one pixel unit. A distribution density of the first common electrode bus in the first peripheral region is smaller than that in the second peripheral region.

Abstract: A low-jitter random clock generation circuit includes: a clock division and pulse generation module connected to an input clock, performing frequency division processing to obtain frequency division clocks, and then detecting some frequency division clocks one by one to obtain frequency division pulses in a one-to-one correspondence; a pseudorandom number generation module connected to one frequency division clock, and generating a pseudorandom number; a status control module connected to all the frequency division clocks and the pseudorandom number to generate status control signals; and a random clock output module connected to the input clock, all the frequency division clocks, all the frequency division pulses, and all the status control signals, randomly sampling the frequency division clocks by using the frequency division pulses under control of the status control signals, and synchronously outputting the randomly sampled frequency division clocks by using the input clock, to obtain random clocks.

Abstract: A ball bearing sensor shift arrangement for a camera may include one or more voice coil motor (VCM) actuators that include the fixed magnets, optical image stabilization (OIS) coils, and/or one or more autofocus (AF) coils. The ball bearing sensor shift arrangement may be coupled with an image sensor of the camera, and may include carrier frames configured to move on ball bearings so as to enable motion of the image sensor in multiple degrees-of-freedom (DOF). An OIS carrier frame(s) may be coupled with the OIS coils, which may be positioned proximate the fixed magnets and used for moving the image sensor in directions orthogonal to an optical axis of the camera. An AF carrier frame may be coupled with the AF coil(s), which may be positioned proximate the fixed magnets and used for moving the image sensor in at least one direction parallel to the optical axis.

Abstract: A chip with built-in verification is shown. The signals of key nodes within the chip are collected as operational information. Verification hardware built into the chip includes a plurality of registers, which are programmed to define a branch-type trigger condition. The branch-type trigger condition is formed by sequence-related events. The verification hardware includes an arithmetic module that generates a debugging prompt in response to the branch-type trigger condition defined in the plurality of registers being satisfied by the operational information.

Abstract: In a pipelined analog-to-digital converter, at least one pipeline stage includes an N-bit sub-analog-to-digital conversion module, a first sub-digital-to-analog conversion module, a second sub-digital-to-analog conversion module, and a switched capacitor amplification module. The first sub-digital-to-analog conversion module and the second sub-digital-to-analog conversion module respectively receive and process 2N?1 digital signals, which correspondingly require 2*2N?1 switched capacitors. In a pipeline stage based on a structure of “N-bit sub-analog-to-digital conversion module+sub-digital-to-analog conversion module+subtractor+multiplier”, the non-inverting input and the inverting input of the differential input comparison are completely symmetrical, which correspondingly requires 2*2N switched capacitors.

Abstract: A method for determining a centerline of a blood vessel in an image associated with a subject is provided. The method includes obtaining a centerline model used for identifying a centerline of a blood vessel and identifying the centerline of the blood vessel based on the centerline model.

Abstract: A warehousing system (100) is provided. The system is provided with a storage region (100a) and includes a plurality of first shelving units (111) arranged in the storage region (100a), a plurality of travel aisles (120) formed between the first shelving units (111) facing each other, and a first transport passage (131) in communication with the travel aisles (120). The warehousing system (100) further includes second shelving units (112) arranged in an upper-layer space of the first transport passage (131) and located on two sides of extension lines of the travel aisles (120). A height (HL2) of a lowest goods location of each second shelving unit (112) is greater than a height (HL1) of a lowest goods location of each first shelving unit (111).

Abstract: Provided is a method and system for converting trajectory coordinates of moving objects, including: capturing a video of moving objects by drone; extracting trajectory data of moving objects in pixel coordinate system; solving a representation of unit direction vector corresponding to target point in camera coordinate system in ECEF coordinate system based on location information of drone, attitude information of camera, and intrinsic parameter information of camera during capturing of each frame, and in combination with pixel coordinates of target point in pixel coordinate system, to obtain a representation of vector from ECEF origin to the target point; and, representing coordinates of target point in WGS84 coordinate system by using the representation of vector from the ECEF origin to the target point, and finally obtaining the coordinates of target point in WGS84 coordinate system based on target point altitude is the same as altitude at which the drone takes off.

Abstract: Embodiments of the present disclosure disclose a virtual avatar rendering method and apparatus, an electronic device, and a storage medium. The method includes: obtaining at least one component in a facial image; obtaining a grid image corresponding to the facial image by converting the at least one component into a grid component; and generating a virtual avatar based on the grid image and rendering the virtual avatar.

Abstract: A quick-locking piston-type floating power supply connector includes a housing assembly, a contact assembly, and a base assembly, wherein the housing assembly is sleeved on an outer wall of one end of the base assembly, one end of the contact assembly is fixed in the base assembly, the other end of the contact assembly extends from the base assembly, the other end of the contact assembly extends outwards to be partially embedded into a cover plate assembly, a floating contact member of a piston-type structure is vertically arranged at the terminal of the other end of the contact assembly, the floating contact member is mounted in the cover plate assembly, a mounting opening of the floating contact member extends outwards to the cover plate assembly, and the floating contact member is used for meeting the electrical assembly requirements of PCBs with different heights.

Abstract: The present disclosure provides an ?-olefin extractant and a method for separating an alkane and an ?-olefin, wherein the ?-olefin extractant comprises an alcohol-amine, a saturated monoketone having a carbon chain length of 7-10 and a monovalent salt of a Group IB metal, wherein the alcohol-amine, the saturated monoketone having a carbon chain length of 7-10 and the monovalent salt of a Group IB metal are in a mass ratio of (0.9-2.0):(0.8-1.5):(0.1-0.6). In the present disclosure, the technical principle of complexing extractive rectification is utilized and achieves the purpose of separating an olefin from an alkane by adding a complexing extractant to form a relatively stable complex between a metals and the olefin. The present disclosure has advantages of good separation effect and high product yield.

Abstract: A display substrate, including: a substrate; and a plurality of data lines each extending in a first direction, a touch layer, and a plurality of touch signal lines, sequentially arranged away from the substrate, wherein the touch layer includes a plurality of touch electrodes configured to be multiplexed as common electrodes, and each touch electrode includes a plurality of touch sub-electrodes electrically connected to each other; wherein the touch sub-electrodes are arranged in an array along the first direction and a second direction, a first slit is between any two adjacent touch sub-electrodes along the second direction, and orthographic projections of the first slit and a corresponding data line on the substrate overlap each other; the touch signal lines are connected to the touch electrodes, and an orthographic projection of at least one touch signal line on the substrate covers the orthographic projection of the first slit on the substrate.

Abstract: An array substrate, a manufacturing method and a display device. The array substrate includes: a base substrate; a plurality of gate lines and a plurality of data lines; a plurality of touch signal lines; a plurality of touch electrodes; a plurality of pixel electrodes; and an insulation layer. The touch signal line and a transparent conductive layer where the pixel electrode is located are arranged at a side of the insulation layer away from a transparent conductive layer where the touch electrode is located, an orthogonal projection of the pixel electrode onto the base substrate is separated from an orthogonal projection of the touch signal line onto the base substrate to be insulated from each other, and each touch electrode is coupled to at least one touch signal line through a via hole in the insulation layer.

Abstract: An application-level memory control group of a first application may be created when the first application is opened. An anonymous page of the first application is added to a least recently used linked list of the application-level memory control group, and a file page of the first application is added to a global least recently used linked list. An application-level memory control group is created in a dimension of an application, and an anonymous page of the application is managed in a refined manner. In addition, a file page of the application-level memory control group may be managed based on a global least recently used linked list.

Abstract: Provided are a method for controlling electric power and a charging and discharging system. The method includes: acquiring first data, the first data being configured to indicate electricity consumption information of a power grid; and controlling the electricity consumption device to acquire electric energy from the power grid or to transmit the electric energy to the power grid through the charging and discharging device according to the first data in a case where an electricity consumption device is connected to a charging and discharging device. The technical solution of the present application is beneficial to achieving a reasonable allocation of electric power.

Abstract: An electronic assembly includes a substrate, a chip configured on the substrate, a cover component configured on the chip, a capacitance element configured on the substrate, and a sealing structure surrounding the chip and sealing a gap between the cover component and the substrate. The sealing structure includes an insulating gel encapsulating the capacitance element. In addition, a manufacturing method of the electronic assembly is also provided.