Patents by Inventor Xuan Lin
Xuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240114116Abstract: A multi-projector system and a method of calibrating the multi-projector system are provided. The method includes: controlling a first projector to project a first image, and capturing and generating a first captured image including the first image to obtain a first color value from the first captured image through an image capturing device; projecting a second image according to a first projection parameter, and capturing and generating a second captured image including the second image to obtain a second color value from the second captured image through the image capturing device, wherein the first projection parameter includes an electrical parameter of a light source module of the second projector; calculating an absolute difference between the first color value and the second color value; and adjusting the first projection parameter to update the absolute difference in response to the absolute difference being greater than a first threshold.Type: ApplicationFiled: September 25, 2023Publication date: April 4, 2024Applicant: Coretronic CorporationInventors: Xuan-En Fung, Chun-Lin Chien, Yu-Wen Lo, Yu-Hua Yang
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Publication number: 20240112957Abstract: A fabrication method is disclosed that includes: forming a first metal layer over first and second semiconductor structures; forming a first patterned photolithographic layer with an opening that exposes a portion of the first metal layer over the first semiconductor structure but not to a boundary between semiconductor structures; removing the exposed portion of the first metal layer; forming a second metal layer over the first and second semiconductor structures; forming a second patterned photolithographic layer with an opening that exposes a portion of the second metal layer over the second semiconductor structure but not to the boundary; removing the exposed portion of the first and second metal layers; wherein a barrier structure is generated between the first and second semiconductor structures that includes remaining portions of the first metal layer and a portion of the second metal layer overlying the remaining portions of the first metal layer.Type: ApplicationFiled: January 12, 2023Publication date: April 4, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Xuan Wang, Cheng-Chun Tseng, Yi-Chun Chen, Yu-Hsien Lin, Ryan Chia-Jen Chen
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Publication number: 20240103480Abstract: A controller for controlling an electric motor module equipped with incremental encoder and operation method thereof are provided. The controller includes a quadruple frequency circuit, a driver circuit, a non-volatile memory (NVM) and a multi-phase control circuit. The multi-phase control circuit can perform multi-phase control with aid of the NVM, for example: reading an offset counter value from the NVM; executing an initial angle estimation procedure, generating an initial counter value according to an estimated initial angle and the offset counter value, and starting utilizing the driver circuit to directly control the electric motor to start with the estimated initial angle and utilizing a counter to perform counting operations; calculating a counter value error and clear the current counter value to be zero; and performing compensation corresponding to a predetermined compensation times count according to the counter value error, respectively, to control the rotor to reach a target angle.Type: ApplicationFiled: August 11, 2023Publication date: March 28, 2024Applicant: Artery Technology CompanyInventors: Ming-Tsan Lin, Yi-Shiang Ouyang, Zi-Xuan Huang
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Patent number: 11935302Abstract: In some aspects, a method for object re-identification may include obtaining a first set of images from a first camera, and a second set of images from at least one second camera; determining a first set of features based on the first set of images, the first set of features lying in a first feature space; and determining a second set of features based on the second set of images, the second set of features lying in a second feature space. The method may additionally include determining a first feature projection matrix and a second feature projection matrix that respectively map the first set of features and the second set of features to a shared feature space; and determining a common dictionary based on the shared feature space.Type: GrantFiled: December 29, 2020Date of Patent: March 19, 2024Assignees: NANYANG TECHNOLOGICAL UNIVERSITY, NCS PTE. LTD.Inventors: Guoqing Zhang, Weisi Lin, Arun Kumar Chandran, Xuan Jing
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Publication number: 20240087258Abstract: A cross reality system enables any of multiple devices to efficiently access previously stored maps. Both stored maps and tracking maps used by portable devices may have any of multiple types of location metadata associated with them. The location metadata may be used to select a set of candidate maps for operations, such as localization or map merge, that involve finding a match between a location defined by location information from a portable device and any of a number of previously stored maps. The types of location metadata may prioritized for use in selecting the subset. To aid in selection of candidate maps, a universe of stored maps may be indexed based on geo-location information. A cross reality platform may update that index as it interacts with devices that supply geo-location information in connection with location information and may propagate that geo-location information to devices that do not supply it.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Applicant: Magic Leap, Inc.Inventors: Xuan Zhao, Christian Ivan Robert Moore, Sen Lin, Ali Shahrokni, Ashwin Swaminathan
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Publication number: 20240087960Abstract: A method may include forming a mask layer on top of a first dielectric layer formed on a first source/drain and a second source/drain, and creating an opening in the mask layer and the first dielectric layer that exposes portions of the first source/drain and the second source/drain. The method may include filling the opening with a metal layer that covers the exposed portions of the first source/drain and the second source/drain, and forming a gap in the metal layer to create a first metal contact and a second metal contact. The first metal contact may electrically couple to the first source/drain and the second metal contact may electrically couple to the second source/drain. The gap may separate the first metal contact from the second metal contact by less than nineteen nanometers.Type: ApplicationFiled: November 13, 2023Publication date: March 14, 2024Inventors: Yu-Lien HUANG, Ching-Feng FU, Huan-Just LIN, Fu-Sheng LI, Tsai-Jung HO, Bor Chiuan HSIEH, Guan-Xuan CHEN, Guan-Ren WANG
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Patent number: 11918958Abstract: The present invention discloses a Fe—Al-based metal porous membrane and a preparation method thereof, which relate to the technical field of industrial gas-solid and liquid-solid separation and purification, and mainly address problems in the prior art, such as cracking-prone and peeling of a membrane layer of an existing Fe—Al-based metal porous membrane during its preparation and use. The preparation method of the present invention comprises the steps of: adding a Fe—Al-based metal powder and a metal fiber powder into an organic-additive-added water-based solvent, and mixing them into a slurry; casting the slurry, through a casting machine, to form a membrane green body on a metal substrate layer, and letting it dry; and placing the dried membrane green body in a sintering furnace, to remove organic substances and perform high-temperature sintering and predetermined-temperature reaction synthesis.Type: GrantFiled: June 4, 2020Date of Patent: March 5, 2024Assignee: AT&M ENVIRONMENTAL ENGINEERING TECHNOLOGY CO., LTD.Inventors: Hu Gu, Junjun Yang, Fan Wang, Guanying Liu, Yu Zhang, Ying Dai, Xuan Yang, Kun Wang, Shiyu Lin
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Patent number: 11923433Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.Type: GrantFiled: March 9, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
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Publication number: 20230228880Abstract: The present disclosure provides a method and an apparatus for creating an occupancy grid map, as well as a processing apparatus. The method includes: creating a current occupancy grid map based on a location of the vehicle and a previous occupancy grid map; and determining a current probability that each grid in the current occupancy grid map belongs to each of occupancy categories based on last environment perception information received from the sensors and updating an occupancy category to which each grid in the current occupancy grid map belongs based on the current probability that the grid belongs to each of the occupancy categories, in accordance with an asynchronous updating policy.Type: ApplicationFiled: March 8, 2023Publication date: July 20, 2023Inventors: Xuan LIN, Naiyan WANG
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Publication number: 20230204558Abstract: A water quality monitoring device and a monitoring method thereof are provided. The water quality monitoring device includes a water tank, a first and a second optical detection devices and a control circuit. The water tank has an accommodating space to carry a liquid. The first optical detection device provides a first light to detect and obtain a first reference light intensity, a first scattered light intensity, and a first penetrating light intensity. The second optical detection device provides a second light to detect and obtain a second reference light intensity, a second scattered light intensity, and a second penetrating light intensity. The control circuit calculates a water quality detection value of the liquid based on the first reference light intensity, the first scattered light intensity, the first penetrating light intensity, the second reference light intensity, the second scattered light intensity, and the second penetrating light intensity.Type: ApplicationFiled: December 24, 2021Publication date: June 29, 2023Applicant: Industrial Technology Research InstituteInventors: Chen-Hua Chu, Chun-Kuo Liu, Yi-Hong Liu, Chi-Fan Wang, Jung-Hao Wang, Sheng-Wei Peng, Yu-Xuan Lin
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Patent number: 11630210Abstract: The present disclosure provides a method and an apparatus for creating an occupancy grid map, as well as a processing apparatus. The method includes: creating a current occupancy grid map based on a location of the vehicle and a previous occupancy grid map; and determining a current probability that each grid in the current occupancy grid map belongs to each of occupancy categories based on last environment perception information received from the sensors and updating an occupancy category to which each grid in the current occupancy grid map belongs based on the current probability that the grid belongs to each of the occupancy categories, in accordance with an asynchronous updating policy.Type: GrantFiled: December 11, 2019Date of Patent: April 18, 2023Assignee: BEIJING TUSEN ZHITU TECHNOLOGY CO., LTD.Inventors: Xuan Lin, Naiyan Wang
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Publication number: 20200183011Abstract: The present disclosure provides a method and an apparatus for creating an occupancy grid map, as well as a processing apparatus. The method includes: creating a current occupancy grid map based on a location of the vehicle and a previous occupancy grid map; and determining a current probability that each grid in the current occupancy grid map belongs to each of occupancy categories based on last environment perception information received from the sensors and updating an occupancy category to which each grid in the current occupancy grid map belongs based on the current probability that the grid belongs to each of the occupancy categories, in accordance with an asynchronous updating policy.Type: ApplicationFiled: December 11, 2019Publication date: June 11, 2020Inventors: Xuan LIN, Naiyan WANG
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Patent number: 10580696Abstract: Structures for interconnects and methods of forming interconnects. An interconnect opening in a dielectric layer includes a first portion and a second portion arranged over the first portion. A first conductor layer composed of a first metal is arranged inside the first portion of the interconnect opening. A second conductor layer composed of a second metal is arranged inside the second portion of the interconnect opening. The first metal is ruthenium.Type: GrantFiled: August 21, 2018Date of Patent: March 3, 2020Assignee: GLOBALFOUNDRIES INC.Inventors: Sean Xuan Lin, Christian Witt, Mark V. Raymond, Nicholas V. LiCausi, Errol Todd Ryan
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Publication number: 20200066585Abstract: Structures for interconnects and methods of forming interconnects. An interconnect opening in a dielectric layer includes a first portion and a second portion arranged over the first portion. A first conductor layer composed of a first metal is arranged inside the first portion of the interconnect opening. A second conductor layer composed of a second metal is arranged inside the second portion of the interconnect opening. The first metal is ruthenium.Type: ApplicationFiled: August 21, 2018Publication date: February 27, 2020Inventors: Sean Xuan Lin, Christian Witt, Mark V. Raymond, Nicholas V. LiCausi, Errol Todd Ryan
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Patent number: 10573593Abstract: The present disclosure relates to semiconductor structures and, more particularly, to metal interconnect structures for super (skip) via integration and methods of manufacture. The structure includes: a first wiring layer with one or more wiring structures; a second wiring layer including an interconnect and wiring structure; and at least one upper wiring layer with one or more via interconnect and wiring structures located above the second wiring layer. The one or more via interconnect and wiring structures partially including a first metal material and remaining portions with a conductive material over the first metal material. A skip via passes through the second wiring layer and extends to the one or more wiring structures of the first wiring layer. The skip via partially includes the metal material and remaining portions of the skip via includes the conductive material over the first metal material.Type: GrantFiled: May 18, 2018Date of Patent: February 25, 2020Assignee: GLOBALFOUNDRIES INC.Inventors: Sean Xuan Lin, Xunyuan Zhang, Shao Beng Law, James Jay McMahon
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Patent number: 10541140Abstract: A process for metalizing a through silicon via feature in a semiconductor integrated circuit device, the process including, during the filling cycle, reversing the polarity of circuit for an interval to generate an anodic potential at said metalizing substrate and desorb leveler from the copper surface within the via, followed by resuming copper deposition by re-establishing the surface of the copper within the via as the cathode in the circuit, thereby yielding a copper filled via feature.Type: GrantFiled: January 26, 2012Date of Patent: January 21, 2020Assignee: MACDERMID ENTHONE INC.Inventors: Thomas B. Richardson, Joseph A. Abys, Wenbo Shao, Chen Wang, Vincent Paneccasio, Jr., Cai Wang, Xuan Lin, Theodore Antonellis
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Patent number: 10456426Abstract: An egg chalaza hydrolysate, a method for preparing the same and a usage of the same are revealed. An egg chalaza is hydrolyzed by an enzyme to get a hydrolysate solution. The hydrolysate solution is filtered and lyophilized to get an egg chalaza hydrolysate. The egg chalaza hydrolysate includes leucine, arginine, phenylalanine, valine, and lysine. The egg chalaza hydrolysate can reduce fat accumulation and oxidative stress in livers. Thus the egg chalaza hydrolysate is applied to prepare a composition for liver protection.Type: GrantFiled: July 25, 2017Date of Patent: October 29, 2019Assignee: National Taiwan UniversityInventors: Yi-Chen Chen, Yu-Xuan Lin
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Patent number: RE47630Abstract: An approach for forming a semiconductor device is provided. In general, the device is formed by providing a metal layer, a cap layer over the metal layer, and an ultra low k layer over the cap layer. A via is then formed through the ultra low k layer and the cap layer. Once the via is formed, a barrier layer (e.g., cobalt (Co), tantalum (Ta), cobalt-tungsten-phosphide (CoWP), or other metal capable of acting as a copper (CU) diffusion barrier) is selectively applied to a bottom surface of the via. A liner layer (e.g., manganese (MN) or aluminum (AL)) is then applied to a set of sidewalls of the via. The via may then be filled with a subsequent metal layer (with or without a seed layer), and the device may the then be further processed (e.g., annealed).Type: GrantFiled: October 26, 2016Date of Patent: October 1, 2019Assignee: GLOBALFOUNDRIES INC.Inventors: Larry Zhao, Ming He, Xunyuan Zhang, Sean Xuan Lin
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Patent number: RE49202Abstract: An electrolytic plating method and composition for electrolytically plating Cu onto a semiconductor integrated circuit substrate having submicron-sized interconnect features. The composition comprises a source of Cu ions and a suppressor compound comprising polyether groups. The method involves superfilling by rapid bottom-up deposition at a superfill speed by which Cu deposition in a vertical direction from the bottoms of the features to the top openings of the features is substantially greater than Cu deposition on the side walls.Type: GrantFiled: July 9, 2018Date of Patent: September 6, 2022Assignee: MacDermid Enthone Inc.Inventors: Vincent Paneccasio, Jr., Xuan Lin, Paul Figura, Richard Hurtubise
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Patent number: RE49820Abstract: An approach for forming a semiconductor device is provided. In general, the device is formed by providing a metal layer, a cap layer over the metal layer, and an ultra low k layer over the cap layer. A via is then formed through the ultra low k layer and the cap layer. Once the via is formed, a barrier layer (e.g., cobalt (Co), tantalum (Ta), cobalt-tungsten-phosphide (CoWP), or other metal capable of acting as a copper (CU) diffusion barrier) is selectively applied to a bottom surface of the via. A liner layer (e.g., manganese (MN) or aluminum (AL)) is then applied to a set of sidewalls of the via. The via may then be filled with a subsequent metal layer (with or without a seed layer), and the device may the then be further processed (e.g., annealed).Type: GrantFiled: August 31, 2019Date of Patent: January 30, 2024Assignee: GlobalFoundries U.S. Inc.Inventors: Larry Zhao, Ming He, Xunyuan Zhang, Sean Xuan Lin