Abstract: An apparatus comprises a circuit for producing a channel gain control signal, and an amplifier for amplifying a signal of interest in response to the channel gain control signal, wherein the channel gain control signal is generated from a channel state signal that is not derived from the signal of interest.

Abstract: A data storage system in which multiple readback signals are resolved is provided. The data storage system includes a data storage medium configured to store servo marks and data marks. The data storage medium has tracks that are divided into sectors. An array of heads is configured to interact with the data storage medium. A demodulation circuit receives servo signals obtained by at least some heads of the array of heads and computes a resultant servo signal, which is used to adjust a position of the array of heads over the storage medium.

Abstract: Disclosed herein are systems and methods for detecting a signal to provide a detected data sequence, comprising providing a plurality of candidate data sequences, computing baseline wander estimates associated with respective ones of the candidate data sequences, comparing a signal to each of the respective ones of the candidate data sequences, wherein the comparisons are compensated by corresponding ones of the baseline wander estimates, and choosing, based on the comparisons, one of the plurality of candidate data sequences to be the detected data sequence.

Abstract: A method and apparatus for channel coding useful for recording channel and other communications applications. The proposed channel coding method is actualized via structured set partition (SSP) in conjunction with multilevel coding (MLC) and offers performance gains over conventional coding schemes with comparable complexity at the bit-error rate (BER) level as well as the sector failure rate (SFR) level.

Abstract: A method and apparatus for channel coding useful for recording channel and other communications applications. The proposed channel coding method is actualized via structured set partition (SSP) in conjunction with multilevel coding (MLC) and offers performance gains over conventional coding schemes with comparable complexity at the bit-error rate (BER) level as well as the sector failure rate (SFR) level.

Abstract: A channel detector has an anchor points inserter, a desired signal calculator, a distance calculator and a data detector. The anchor points inserter is adapted to choose values of expected transition locations for transition shifts within a received signal and to insert anchor points corresponding to the chosen values within a bit detection interval. The desired signal calculator is coupled to the anchor points inserter and is adapted to estimate desired signals corresponding to transition location information from the anchor points inserter. The distance calculator is coupled to the desired signal calculator and is adapted to generate a distance calculator output based on distances between the received signal and each of the desired signals. The data detector is coupled to the distance calculator and is adapted to identify a bit sequence corresponding to a desired signal having a minimum distance from the received signal.

Abstract: A storage device has a storage medium, a plurality of read-write mechanisms, a quality monitoring and book-keeping unit and a scheduling unit. The plurality of read-write mechanisms is coupled to the storage medium. The quality monitoring and book-keeping unit is coupled to the plurality of read-write mechanisms and is adapted to monitor at least one performance parameter associated with each read-write mechanism during operation. The scheduling unit is coupled to the quality monitoring and book-keeping unit. The scheduling unit is adapted to rank each of the plurality of read-write mechanisms according to the at least one performance parameter and to responsively schedule use of a read-write mechanism according to its rank.

Abstract: A parallel channel timing recovery circuit. The parallel timing recovery circuit comprises multiple prefilters receiving parallel channel outputs and providing prefilter outputs. Multiple sampling filters receive the prefilter outputs and provide multiple discrete time signal samples. A self-timing circuit has multiple inputs receiving the multiple discrete time signal samples. The self-timing circuit provides a sampling control output to the sampling filters. The sampling control output is based on a composite of the multiple discrete time signal samples. Each of the sampling filters generates a discrete time signal sample based on the sampling control output and the prefilter outputs.

Abstract: An apparatus comprises a ferroelectric storage medium, and a transducer for reading data from the ferroelectric storage medium and for writing data to the ferroelectric storage medium, wherein the transducer includes a substrate and a probe coupled to the substrate, wherein the probe includes a conductive element and a bilayer structure causing the probe to bend toward the ferroelectric storage medium.

Abstract: A method of reading a data block from a sector of a recording media is described. The data block from the sector of the recording channel is decoded with an ECC decoder (first trial). The data block is re-decoded (second trial) using an adjusted timing recovery block that is adjusted based on the decoded data block, if the number of errors exceeded an error correction capability of the ECC decoder on the first trial. In one embodiment, the data block is reread from the same sector of the recording channel using the adjusted timing recovery block that is adjusted based on the re-decoded data block. The data block is subsequently jointly decoded with the waveforms obtained from the second trial by a possibly modified sequence detector, if the number of errors exceeded the error correction capability of the ECC decoder during the second trial.

Abstract: A system for pattern dependent equalization has an equalizer bank and a detector. The equalizer bank has a plurality of equalizers, which are each tuned to a selected data pattern. The detector may be a standard sequence detector or a modified Viterbi detector, which calculates the branch metric using a pattern dependent equalized output and a pattern-dependent target. A method of decoding data uses a pattern dependent equalizer bank. The pattern dependent equalizer bank processes a segment of a bit sequence to produce an equalized pattern-dependent output for each equalizer in parallel. The detector then detects the bit sequence using the branch metric calculation to select the smallest accumulated path metric.