Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to enhance the drought tolerance attribute of wheat plants. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and then infused to the soil in which the wheat seeds are planted; the solution can also be sprayed to the leaf surface of young wheat plants. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, for applying to the soil around the wheat plants and for spraying to leaf surface of young wheat plants.

Abstract: A display panel includes a display module and an anti-glare layer. The display module has a pixel density PPI, and the display module includes an upper substrate. The anti-glare layer is over the display module. A top surface of the anti-glare layer has a plurality of microstructures, and the microstructures have a root mean square slope R?q. A thickness L from a bottom of the upper substrate of the display module to a top of the anti-glare layer complies with a following relational expression: L > 0.001 * PPI R ? ? ? q .

Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to improve the efficacy of fertilizer usage and absorption by wheat plants. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and then infused to the fertilized soil in which the wheat seeds are planted and grown. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, for applying to the soil around the wheat plants.

Abstract: The present invention provides a spin-orbit torque magnetoresistive memory structure, which comprises a first conductive layer, a magnetic tunneling junction (MTJ) layer, a channel layer, and a second conductive layer stacked sequentially. The MTJ layer is disposed on the first conductive layer. The channel layer is disposed on the MTJ layer. The second conductive layer is disposed on the channel layer. These structures are fabricated sequentially using lithography. By forming the MTJ layer before the channel layer, redeposition of the metal of the channel layer on the MTJ layer can be avoided.

Abstract: A light emitting panel includes: a substrate, a plurality of light emitting units arranged on the substrate, a diffuse reflective layer provided on the substrate and defining a plurality of openings, the light emitting units respectively positioned corresponding to the openings, and an encapsulating adhesive layer covering the light emitting units, the diffuse reflective layer and the openings on the substrate. In the light emitting panel, the vertical thickness of the encapsulating adhesive layer on the diffuse reflective layer is greater than 40 ?m.

Abstract: An electronic device includes a first substrate, a second substrate disposed opposite to the first substrate, and an electrochromic layer disposed between the first base and the second base. The first substrate includes a first base, a trace, a dielectric layer and an electrode. The dielectric layer is disposed on the first base and covers the trace. The electrode is disposed on the dielectric layer, and is electrically connected to the trace through a contact window of the dielectric layer. The trace includes a first mesh conductive pattern. The first mesh conductive pattern of the trace partially overlaps with the electrode.

Abstract: An electronic device includes a first base, a plurality of electrodes, a plurality of traces, an insulating layer, a second base and an electrochromic layer. The electrodes are disposed on the first base. Each electrode includes a mesh conductive pattern and a transparent conductive pattern. The mesh conductive pattern has a plurality of mesh lines and a plurality of meshes defined by the mesh lines. The transparent conductive pattern covers the mesh lines and the meshes, and is electrically connected to the mesh conductive pattern. The traces are disposed on the first base, and are electrically connected to the electrodes respectively. The insulating layer is disposed on the first base, and at least covers the traces. The second base is disposed opposite to the first base.

Abstract: A ferroelectric random access memory (FeRAM) cell may include an oxide insertion layer between the electron barrier layer and the metal glue layer of the source/drain regions of the FeRAM cell. The oxide insertion layer may improve the thermal stability of the electron barrier layer and minimize or prevent dissociation and/or out-diffusion of the electron barrier layer at high processing temperatures. Thus, the oxide insertion layer may enable the metal glue layer to be formed over the electron barrier layer with low surface roughness, which may enable increased adhesion between the metal glue layer and the source/drain electrodes of the source/drain regions. In this way, the oxide insertion layer may enable low electrical resistance to be achieved for the FeRAM cell and/or may reduce the likelihood of failures in the FeRAM cell, among other examples.

Abstract: An image displacement device includes a first grating and a second grating. The first grating has a first surface and a second surface opposite the first surface, the first surface receives image beams, and the image beams leave the first grating by the second surface. The second grating is disposed downstream from the first grating in a light path and has a third surface and a fourth surface opposite the third surface. The third surface receives the image beams, and the image beams leave the second grating by the fourth surface. The image beams are projected to form a plane image comprised of pixels, each pixel is displaced in a direction by the image displacement device, and a displacement of each pixel is smaller than five times a width of one pixel.

Abstract: A brightness compensation device includes a panel, a heat detector, a memory, and a processor. he processor is configured to perform the following steps: at a specific grayscale of the red grayscale data, the green grayscale data, or the blue grayscale data, adjusting a turn-on time data of a luminous signal according to the first temperature data; adjusting the red grayscale data, the green grayscale data, or the blue grayscale data according to a brightness relation or the sheet to obtain a red updating grayscale data, a green updating grayscale data, or a blue updating grayscale data; and when it is determined that the second temperature data is the same as the first temperature data, outputting or storing the red updating grayscale data, the green updating grayscale data, or the blue updating grayscale data.

Abstract: One or more semiconductor processing tools may deposit one or more tantalum nitride layers on an upper surface of a copper interconnect and within a via. The one or more semiconductor processing tools may deposit an adhesion layer on an upper surface of the one or more tantalum nitride layers and within the via.

Abstract: A magnetic tunnel junction (MTJ) element is provided. The MTJ element includes a hard bias layer, a reference layer disposed over the hard bias layer, a tunnel barrier layer disposed over the reference layer, a free layer disposed over the tunnel barrier layer, and a diffusion barrier layer disposed over the free layer wherein the diffusion barrier layer comprises an amorphous and nonmagnetic film of a form X-Z, where X is Fe or Co and Z is Hf, Y, or Zr. The MTJ element in accordance with the present disclosure exhibits a low resistance desired for a low-power write operation, and a high TMR coefficient desired for a low bit-error-rate (BER) read operation.

Abstract: An electronic device having a light emitting region includes a base, a data line disposed on the base, a driving element disposed on the base, a light emitting element disposed on the base and corresponding to the light emitting region, an optical sensing element configured to sense a light and generate a signal, and a signal line electrically connected to the optical sensing element and configured to transmit the signal. At least a portion of the data line is corresponding to the light emitting region. The signal line is overlapped with the data line.

Abstract: A brightness compensation device includes a panel, a heat detector, a memory, and a processor. he processor is configured to perform the following steps: at a specific grayscale of the red grayscale data, the green grayscale data, or the blue grayscale data, adjusting a turn-on time data of a luminous signal according to the first temperature data; adjusting the red grayscale data, the green grayscale data, or the blue grayscale data according to a brightness relation or the sheet to obtain a red updating grayscale data, a green updating grayscale data, or a blue updating grayscale data; and when it is determined that the second temperature data is the same as the first temperature data, outputting or storing the red updating grayscale data, the green updating grayscale data, or the blue updating grayscale data.

Abstract: A magnetic tunnel junction (MTJ) element is provided. The MTJ element includes a buffer layer, a seed layer disposed over the buffer layer, a first ferromagnetic layer disposed over the seed layer, a tunnel barrier layer disposed over the first ferromagnetic layer and a second ferromagnetic layer disposed over the tunnel barrier layer. The seed layer includes a Cobalt (Co)-based film. The buffer layer includes cobalt (Co) and hafnium (Hf). The buffer layer is alloyed with chromium and has chromium content up to 20 at. %. The MTJ element in accordance with the present disclosure exhibits a low resistance desired for a low-power write operation, and a high TMR coefficient desired for a low bit-error-rate (BER) read operation.

Abstract: A display device comprising a plurality of ordinary pixels, an auxiliary pixel, a frame and a driving chip is provided. The auxiliary pixel includes a plurality of first color sub-pixels. The frame is configured to define an active area in a non-rectangular shape. The plurality of ordinary pixels and the auxiliary pixel are arranged in the active area. The driving chip is configured to receive display data, wherein the display data includes a first color grayscale value configured to assign first target luminance of first color light of the auxiliary pixel. The driving chip is configured to generate one or more processed first color grayscale values configured to assign the luminance of the plurality of first color sub-pixels, according to the first color grayscale value, and the sum of the luminance of the plurality of first color sub-pixels is substantially equal to the first target luminance.

Abstract: One or more semiconductor processing tools may deposit one or more tantalum nitride layers on an upper surface of a copper interconnect and within a via. The one or more semiconductor processing tools may deposit an adhesion layer on an upper surface of the one or more tantalum nitride layers and within the via. The one or more semiconductor processing tools may deposit tungsten on an upper surface of the adhesion layer and within the via for via interconnection of the magnetic tunnel junction to the copper interconnect.

Abstract: A magnetic tunnel junction (MTJ) element is provided. The MTJ element includes a reference layer, a tunnel barrier layer disposed over the reference layer, a free layer disposed over the tunnel barrier layer, and a diffusion barrier layer disposed over the free layer. The MTJ element in accordance with the present disclosure exhibits a low resistance desired for a low-power write operation, and a high TMR coefficient desired for a low bit-error-rate (BER) read operation.

Abstract: A display device includes first and second pixel circuits, first and second gate lines, and first and second transmission lines. The first pixel circuit emits light according to a data signal, and is charged according to a first gate signal. The second pixel circuit emits light according to the data signal, and is charged according to a second gate signal. The first gate line is located between the first second pixel circuits, and provides the first gate signal. The second gate line provides the second gate signal. The first transmission line provides the second gate signal to the second gate line. The second transmission line is located between the first transmission line and the second pixel circuit, crosses over the second gate line, and provides the first gate signal to the first gate line.

Abstract: An electric motor with double stators includes a first stator, a first stator and a rotor assembly. The rotor assembly is located between the first stator and the second stator in a radial direction. The rotor assembly includes a rotor body, a plurality of first rotor slots, a plurality of second rotor slots, a plurality of first magnets, and a plurality of second magnets. A first air gap is formed between the rotor body and the first stator, and a second air gap is formed between the rotor body and the second stator. The material of the first magnets is different to the material of the second magnets, and any position of the first magnets is different to any position of the second magnets.