Abstract: A pixel array substrate including a substrate, pixel structures, and transfer lines is provided. The pixel structures are disposed on the substrate. Each pixel structure includes a data line, a gate line, an active device, and a pixel electrode. The active device is electrically connected to the data line and the gate line. The pixel electrode is electrically connected to the active device. The pixel electrode defines alignment domains. The alignment domains have different alignment directions. The transfer lines are arranged in a first direction. Gate lines of the pixel structures are arranged in a second direction. The first direction and the second direction are interlaced. The transfer lines are electrically connected to the gate lines. The pixel structures include a first pixel structure. The transfer lines include a first transfer line. The first transfer line overlaps a boundary between the alignment domains of the first pixel structure.

Abstract: A display panel includes pixels and a first conductive element. Each pixel includes a first signal line, a second signal line, a third signal line, a first switch, a second switch, a third switch, a first pixel electrode, a second pixel electrode, a first capacitor, a second capacitor, a third capacitor, and an insulating layer. The first signal lines are arranged in a first direction. Orthogonal projections of a first electrode of a second capacitor of a first pixel, a first electrode of a third capacitor of the first pixel, and a first contact window of an insulating layer of the first pixel on a first substrate are arranged in the first direction. The first conductive element is electrically connected to a second electrode of the third capacitor of the first pixel and a second electrode of the second capacitor of the first pixel through the first contact window.

Abstract: A micro-structure transfer system may include a printhead and a pressure control device to control a pressure of fluid coupled with the printhead. The pressure control device forms a meniscus of fluid at a number of nozzles defined within the printhead to pick up a number of micro-structures. A printhead for transferring micro-structures includes a number of fluid chambers, a number of nozzles defined in an orifice plate through which fluid may exit the chambers, and a pressure control device to control a pressure of fluid within each of the chambers. The pressure control device forms a meniscus of the fluid at a number of nozzles defined within the printhead to pick up a number of micro-structures.

Abstract: A pixel structure includes a scan line, a data line, a reference voltage line, a first transistor, a second transistor, a third transistor, a first pixel electrode and a second pixel electrode. The reference voltage line is separated from the data line and intersected with the scan line. A first electrode of the second transistor, a second electrode of the second transistor and a first electrode of the third transistor have straight line portions overlapped with a second semiconductor pattern of the second transistor and a third semiconductor pattern of the third transistor. Both ends of each of the straight line portions are located outside a normal projection region of a first semiconductor pattern of the first transistor, a normal projection region of the second semiconductor pattern of the second transistor and a normal projection region of the third semiconductor pattern of the third transistor.

Abstract: A pixel array substrate includes pixel structures. Each pixel structure includes a first pixel electrode, a second pixel electrode, a first data line, a second data line, and a scan line. The first pixel electrode and the second pixel electrode are sequentially arranged in a first direction and respectively have a first side and a second side opposite to each other. The pixel structures include first and second pixel structures. A first data line of each first pixel structure is located at the first side, and a second data line of each first pixel structure is located at the second side. A first data line of each second pixel structure is located at the second side; a second data line of each second pixel structure is located at the first side. The first and second pixel structures are sequentially arranged in the first direction to form a first pixel series.

Abstract: A display panel includes a plurality of sub-pixel structures and a plurality of transfer elements. The sub-pixel structures include a plurality of first sub-pixel structures. A data line of each of the first sub-pixel structures is disposed adjacent to a corresponding transfer element, and a scan line of each of the first sub-pixel structures is electrically connected to the corresponding transfer element. The first sub-pixel structures include a plurality of first-type sub-pixel structures and a plurality of second-type sub-pixel structures. When the display panel displays a grayscale picture, each of the first-type sub-pixel structures has first brightness, each of the second-type sub-pixel structures has second brightness. The first brightness is less than the second brightness. A total number of the first sub-pixel structures of the display panel is A, a number of the first-type sub-pixel structures in the first sub-pixel structures is a, and 50%<(a/A)<100%.

Abstract: A vehicle radar device includes a first antenna unit, a second antenna unit, at least one computing unit and at least one circuit board. The first antenna unit and the second antenna unit are communicatively connected to the at least one computing unit. The at least one circuit board includes a first board portion and a second board portion. The first antenna unit is a circuit board type and disposed on the first board portion. The second antenna unit is a circuit board type and disposed on the second board portion. The at least one computing unit disposed on at least one of the first board portion and the second board portion. When an angle between the first board portion and the second board portion is P12, and the following condition is satisfied: 80 degrees?P12?130 degrees.

Abstract: An electronic device includes a substrate, multiple transversal signal lines, a first vertical signal line, a second vertical signal line, a shielding wire, and multiple pixel structures. The first vertical signal line is intersected with the transversal signal lines. The second vertical signal line is intersected with the transversal signal lines and connected to one of the transversal signal lines. An orthogonal projection of the shielding wire on the substrate is located between an orthogonal projection of the first vertical signal line and an orthogonal projection of the second vertical signal line on the substrate. One of the pixel structures is surrounded by a corresponding one of the transversal signal lines and the second vertical signal line and includes an active device. A gate and a source of the active device is electrically connected to the corresponding one transversal signal line and the first vertical signal line respectively.

Abstract: A display panel including sub pixels, a plurality of first and second scan lines, a plurality of first and second data lines, a plurality of first and second auxiliary lines and first conductive vias is provided. The sub pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. The second rows are electrically connected to the first and second scan lines in alternation and are electrically connected to the first and second data lines in alternation. Each first auxiliary line includes a first portion electrically connected to a corresponding first scan line and a second portion spaced away from the first portion. The second auxiliary lines are respectively located between two adjacent first rows. Each second scan line is electrically connected to a corresponding first scan line through at least one second auxiliary line.

Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.

Abstract: A display apparatus including data lines, first gate lines, pixel structures, second gate lines, and first common lines is provided. The data lines are arranged in a first direction. The first gate lines are arranged in a second direction. The data lines and the second gate lines are arranged in the first direction, and the second gate lines are electrically connected to the first gate lines. The pixel structures are arranged in pixel columns which are arranged in the first direction. Each of the first common lines and the corresponding second gate line are configured between two adjacent pixel columns. The first common line and the corresponding second gate line are configured respectively on the opposite sides of the first gate line which is electrically connected to the corresponding second gate line. The first common line and the corresponding second gate line are structurally separated.

Abstract: A display panel including sub-pixels, first and second scan lines, first and second data lines, and first to fourth auxiliary lines is provided. The sub-pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. Each third auxiliary line is electrically connected to a second auxiliary line and a first auxiliary line electrically connected to a first scan line. Each fourth auxiliary line is electrically connected to a second scan line and a first scan line. There are at least 2n second rows between each third auxiliary line and the first scan line electrically connected thereto, there are at least 2n+1 second rows between each third auxiliary line and the second scan line electrically connected thereto, and n is a positive integer.

Abstract: An electronic device including a substrate, transversal signal lines, a first vertical signal line, a second vertical signal line, and a first shielding vertical line is provided. The transversal signal lines, the first vertical signal line, the second vertical signal line, and the first shielding vertical line are disposed on the substrate. The first vertical signal line and the second vertical signal line are intersected with the transversal signal lines. The second vertical signal line is connected to one of the transversal signal lines. An orthogonal projection of the first shielding vertical line on the substrate is between an orthogonal projection of the first vertical signal line on the substrate and an orthogonal projection of the second vertical signal line on the substrate.

Abstract: A pixel array substrate includes a substrate, a plurality of data lines, a plurality of scan lines, a plurality of sub-pixels, and a first and a second auxiliary lines. The plurality of sub-pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. The first auxiliary line and the plurality of scan lines belong to a first conductive layer. The second auxiliary line and the plurality of data lines belong to a second conductive layer. The first auxiliary line is located between two scan lines. A first end of the first auxiliary line is connected to one of the two scan lines. A second end of the first auxiliary line is separated from the other one of the two scan lines. The second auxiliary line is electrically connected to the first auxiliary line at the second end through a conductive via.

Abstract: A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.

Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.

Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.

Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.

Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.

Abstract: A warrant recording system includes a setting apparatus and a tire pressure detector. The setting apparatus is connected with the internet for acquiring a standard time. The setting apparatus writes the acquired standard time into the tire pressure detector, such that an initial timestamp is recorded in the tire pressure detector. Therefore, the setting apparatus automatically inputs a warrant period into the tire pressure detector, thus assuring the accurate record of the initial time point of the warrant period.