Patents by Inventor Yafeng Li
Yafeng Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240071331Abstract: A multiplexed display panel and device and a driving method for the multiplexed display panel are provided. At the moment when a switching switch is turned on, a potential of a fanout line corresponding to a data line connected to sub-pixels, into which an data signal is input, is adjusted to the same level as a potential of the data line as much as possible, and a potential difference between each fanout line and the corresponding data line is relatively small at the moment when the switching switch is turned on, so that an instantaneous current at this moment is greatly reduced without causing relatively large jump of the potential of the data line, a common electrode and back-plated indium tin oxide (ITO) greatly fluctuate, and then the surface noise generated by the display panel is turned on is greatly reduced.Type: ApplicationFiled: December 20, 2021Publication date: February 29, 2024Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.Inventors: Jian TAO, Shuai FENG, Yafeng LI, Zhong PENG, Jian HE
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Publication number: 20240038113Abstract: The present application discloses a display panel and a display device. The display panel includes a plurality of multiplexing drive modules, a plurality of drive branches and M drive buses. By electrically connecting one drive bus to N drive branches, the number of used drive buses can be reduced, thereby reducing the number of output channels of a drive signal source. Sine the number of used drive buses is reduced, the multiplexing drive modules can complete transmission of a frame of data signals using a less number of times of time-divisional parts for switching on transistors.Type: ApplicationFiled: September 29, 2021Publication date: February 1, 2024Applicant: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Yong WANG, Yafeng LI
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Publication number: 20240038780Abstract: The present application sets forth an array substrate and a display terminal. The array substrate includes an underlay, a light shielding layer disposed on the underlay, an active layer disposed on the light shielding layer, and a connection element disposed on the active layer. The light shielding layer includes light shielding portions spaced from one another. The active layer includes active portions spaced from one another. The active portions correspond to the light shielding portions. Furthermore, adjacent two active portions are electrically connected through a bridge element. A toughness of the bridge element is greater than a toughness of the active portion.Type: ApplicationFiled: December 17, 2021Publication date: February 1, 2024Applicant: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Chi Zhang, Yun Xiang, Jian Tao, Yafeng Li
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Patent number: 11741872Abstract: A GOA circuit and a display panel are provided. The GOA circuit includes a first pull-down module for pulling down a voltage level of a current-stage gate driving signal, a second pull-down module for pulling down a voltage level of the first node, a third pull-down module for pulling down a voltage level of the second node, and a fourth pull-down module for pulling down the voltage level of the current-stage gate driving signal. The GOA circuit raises the effect of pulling down the current-stage gate driving signal.Type: GrantFiled: June 23, 2020Date of Patent: August 29, 2023Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Jian Tao, Yue Wang, Yafeng Li
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Publication number: 20230103641Abstract: A GOA circuit and a display panel are provided. The GOA circuit includes a first pull-down module for pulling down a voltage level of a current-stage gate driving signal, a second pull-down module for pulling down a voltage level of the first node, a third pull-down module for pulling down a voltage level of the second node, and a fourth pull-down module for pulling down the voltage level of the current-stage gate driving signal. The GOA circuit raises the effect of pulling down the current-stage gate driving signal.Type: ApplicationFiled: June 23, 2020Publication date: April 6, 2023Inventors: Jian TAO, Yue WANG, Yafeng LI
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Patent number: 11315512Abstract: A gate driver on array (GOA) circuit is provided. The GOA circuit includes a plurality of cascading GOA units. One of the GOA unit includes: a scan control module, an anti-backfill module connected to a constant high-level signal and the scan control module, a cascading reset module, and a gate signal output module. Base on functions of prior art solution, the provided GOA circuit of the disclosure reduces two types of signal to simplify signal traces at the bezel to realize a narrow bezel design.Type: GrantFiled: March 24, 2020Date of Patent: April 26, 2022Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd.Inventors: Jian Tao, Yafeng Li, Bo Yang
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Patent number: 11275282Abstract: The present application provides a liquid crystal display panel and a display device. Invalid pixels of the liquid crystal display panel include a test pixel. In this structure, when no tests are required, the test pixel is in an off state, and there is no voltage difference between a pixel electrode and a common electrode to cause rotation of liquid crystals. When a test is required, the test pixel is in an on state, and the pixel electrode is disconnected from the common electrode to cause a voltage difference, so that the liquid crystals are normally rotated.Type: GrantFiled: January 9, 2020Date of Patent: March 15, 2022Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Jian Tao, Yafeng Li
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Patent number: 11262458Abstract: Various embodiments of the present technology generally relate to Global Navigation Satellite Systems (GNSS). More specifically, the embodiments of the present technology relate to a smart antenna module resistant to Radio Frequency Interference (RFI) saturation for dual-frequency GNSS receivers. In some embodiments, a dynamically configured antenna module architecture can be for a dual-band (or multi-frequency) GNSS receiver that can adapt to different RFI conditions by performing corresponding working modes. For example, some embodiments of the smart antenna can measure (e.g., using a power detector) the power of an incoming multi-frequency signal to determine when the multifrequency signal is saturated. Then, using control logic the smart antenna can determine which frequency in the multi-frequency signal is usable and isolate (e.g. using radio frequency components) a frequency that is not saturated. A position estimate can then be generated based on the isolated multi-frequency signal.Type: GrantFiled: April 4, 2019Date of Patent: March 1, 2022Assignee: The Regents of the University of Colorado, a body corporateInventors: Dennis M. Akos, Nagaraj Channarayapatna Shivaramaiah, Yafeng Li
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Publication number: 20210405480Abstract: The present application provides a liquid crystal display panel and a display device. Invalid pixels of the liquid crystal display panel include a test pixel. In this structure, when no tests are required, the test pixel is in an off state, and there is no voltage difference between a pixel electrode and a common electrode to cause rotation of liquid crystals. When a test is required, the test pixel is in an on state, and the pixel electrode is disconnected from the common electrode to cause a voltage difference, so that the liquid crystals are normally rotated.Type: ApplicationFiled: January 9, 2020Publication date: December 30, 2021Applicant: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Jian TAO, Yafeng LI
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Publication number: 20210407451Abstract: A gate driver on array (GOA) circuit is provided. The GOA circuit includes a plurality of cascading GOA units. One of the GOA unit includes: a scan control module, an anti-backfill module connected to a constant high-level signal and the scan control module, a cascading reset module, and a gate signal output module. Base on functions of prior art solution, the provided GOA circuit of the disclosure reduces two types of signal to simplify signal traces at the bezel to realize a narrow bezel design.Type: ApplicationFiled: March 24, 2020Publication date: December 30, 2021Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.Inventors: Jian Tao, Yafeng Li, Bo Yang
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Publication number: 20210124206Abstract: The invention provides a TFT array substrate and LCD panel. the TFT array substrate comprises a first metal layer, a first interlayer insulating layer, a second metal layer, a second interlayer insulating layer and a third metal layer sequentially disposed above the substrate. The first, second and third metal layers comprise a plurality of first, second and third fanout lines in the fanout line area, respectively; two of the first, second, and third fanout lines are connected to the data lines, and the other is connected with the touch line; because the first interlayer insulating layer is disposed between the first and second fanout lines, and the second interlayer insulating layer is disposed between the third and second fanout lines, the first, second and third fanout lines can overlap, which can effectively reduce the fanout line area and help to achieve a narrow border.Type: ApplicationFiled: September 27, 2018Publication date: April 29, 2021Inventors: Yafeng Li, Jinfang Wu
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Patent number: 10803809Abstract: Disclosed are a gate driving circuit, a driving method thereof, and a display device which comprises the gate driving circuit. In the gate driving circuit, the Qn node in the nth stage circuit is precharged when an output signal of a Qn?1 node in a previous stage driving circuit and an output signal of a Qn+1 node in a next stage driving circuit are both in a high-level state. Both the Qn?1 node and the Qn+1 node are at low levels when the gate driving circuit is in an All Gate On display state, and thus a possibility of current leakage from the Qn node can be substantially reduced.Type: GrantFiled: December 29, 2016Date of Patent: October 13, 2020Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventor: Yafeng Li
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Publication number: 20200320949Abstract: The invention provides a GOA circuit. The first node control module of the GOA circuit provided by the invention comprises a tenth TFT, an eleventh TFT and a twelfth TFT of N-type TFTs, when the voltage of the first node is high, the gate-to-source voltage difference of the twelfth TFT is the threshold voltage thereof, so that the drain-source voltage difference of the eleventh TFT is also the threshold voltage of the twelfth TFT, thereby making the resistance between the drain of the tenth TFT and the first node is extremely large, which can avoid the impact of leakage current generated by the tenth TFT on the voltage of the first node when the noise and coupling in the second node occurs, and to ensure the normal output of the scan signal.Type: ApplicationFiled: September 27, 2018Publication date: October 8, 2020Inventors: Yafeng Li, Jinfang Wu
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Patent number: 10796656Abstract: The invention provides a GOA circuit. The first node control module of the GOA circuit provided by the invention comprises a tenth TFT, an eleventh TFT and a twelfth TFT of N-type TFTs, when the voltage of the first node is high, the gate-to-source voltage difference of the twelfth TFT is the threshold voltage thereof, so that the drain-source voltage difference of the eleventh TFT is also the threshold voltage of the twelfth TFT, thereby making the resistance between the drain of the tenth TFT and the first node is extremely large, which can avoid the impact of leakage current generated by the tenth TFT on the voltage of the first node when the noise and coupling in the second node occurs, and to ensure the normal output of the scan signal.Type: GrantFiled: September 27, 2018Date of Patent: October 6, 2020Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Yafeng Li, Jinfang Wu
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Patent number: 10714323Abstract: The invention generally relates to zero volt mass spectrometry probes and systems. In certain embodiments, the invention provides a system including a mass spectrometry probe including a porous material, and a mass spectrometer (bench-top or miniature mass spectrometer). The system operates without an application of voltage to the probe. In certain embodiments, the probe is oriented such that a distal end faces an inlet of the mass spectrometer. In other embodiments, the distal end of the probe is 5 mm or less from an inlet of the mass spectrometer.Type: GrantFiled: February 20, 2019Date of Patent: July 14, 2020Assignee: Purdue Research FoundationInventors: Robert Graham Cooks, Michael Stanley Wleklinski, Soumabha Bag, Yafeng Li
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Patent number: 10714509Abstract: The present disclosure provides a display panel including a display area and a non-display area, a base substrate, a plurality of thin film transistors, a plurality of touch signal lines, a first test signal line area, an array substrate row driving circuit, a second test signal line area, a ground line area and an insulating layer. The thin film transistor includes a gate, a gate insulating layer, a source and a drain. The non-display area includes a first side and a second side; the array substrate row driving circuit respectively forms a first gap and a second gap with the first test signal line area and the second test signal line area, an orthographic projection of the ground line area on the base substrate is in the projection of the second test signal line area in the base substrate. The present disclosure also provides a display device.Type: GrantFiled: December 21, 2017Date of Patent: July 14, 2020Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Yafeng Li, Jinfang Wu
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Patent number: 10657918Abstract: Disclosed is a gate driving circuit and a display device, which belongs to the technical field of displaying, and resolves a technical problem that a signal transmitted between cascaded gate driving circuits is easily attenuated in the prior art. The gate driving circuit includes a precharging unit circuit, an output unit circuit, and a compensation charging unit circuit; the output unit circuit includes a first reference point and a first clock signal line; and the precharging unit circuit is configured to input a high level to the first reference point before an output period.Type: GrantFiled: December 30, 2016Date of Patent: May 19, 2020Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventor: Yafeng Li
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Patent number: 10657919Abstract: Disclosed are a gate driving circuit and a driving method thereof, and a display device using the driving circuit. In the gate driving circuit, a Qn node in a nth-stage circuit is precharged when a Qn?1 node output signal in a previous-stage driving circuit and a Qn+1 node output signal in a next-stage driving circuit are both at high levels, and thus stability of a Gn output end in the nth-stage circuit can be greatly improved. Meanwhile, a first transistor and a second transistor are connected in series, and a third transistor and a fourth transistor are connected in series.Type: GrantFiled: December 29, 2016Date of Patent: May 19, 2020Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventor: Yafeng Li
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Patent number: 10600380Abstract: A scanning driving circuit includes a scanning-level-signal-generation module and a scanning-signal-output-module. The scanning-level-signal-generation module is configured to input an (N?1)th stage scanning signal, an (N+1)th stage scanning signal, and a reset signal, generate a scanning level signal based on the (N?1)th stage scanning signal, the (N+1)th stage scanning signal, and the reset signal, and hold the scanning level signal. The scanning-signal-output-module, connected to the scanning-level-signal-generation module, is configured to input a clock signal, and configured to output a scanning signal based in the scanning level signal and the clock signal.Type: GrantFiled: April 18, 2017Date of Patent: March 24, 2020Assignee: Wuhan China Star Optoeelectronics Technology Co., Ltd.Inventors: Mang Zhao, Yafeng Li
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Publication number: 20190385552Abstract: Disclosed is a gate driving circuit and a display device, which belongs to the technical field of displaying, and resolves a technical problem that a signal transmitted between cascaded gate driving circuits is easily attenuated in the prior art. The gate driving circuit includes a precharging unit circuit, an output unit circuit, and a compensation charging unit circuit; the output unit circuit includes a first reference point and a first clock signal line; and the precharging unit circuit is configured to input a high level to the first reference point before an output period.Type: ApplicationFiled: December 30, 2016Publication date: December 19, 2019Inventor: Yafeng LI