Patents by Inventor Yajun Wei

Yajun Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210229998
    Abstract: The present disclosure relates to the field of carbon materials, in particular to an amorphous carbon material and a preparation method and an application thereof. The amorphous carbon material has the following characteristics: (1) a true density ? of the amorphous carbon material and a interlayer spacing d002 obtained by powder X-Ray Diffraction (XRD) spectrum analysis satisfy the following relational formula: 100×?×d002?70; (2) the interlayer spacing d002, La and Lc of the amorphous carbon material obtained by powder XRD spectrum analysis satisfy the following relational formula: Lc×d002?0.58, and 100×(Lc/La2)×d0023?0.425, wherein ? is denoted by the unit of g/cm3, each of d002, Lc and La is denoted by the unit of nm. The amorphous carbon material prepared by the present disclosure has desirable heat transfer performance and can provide high battery capacity.
    Type: Application
    Filed: August 13, 2018
    Publication date: July 29, 2021
    Inventors: Guanghong PAN, Wenbin LIANG, Kun TANG, Yajun TIAN, Danmiao KANG, Chunting DUAN, Libin KANG, Chang WEI
  • Publication number: 20210226214
    Abstract: The present disclosure relates to the field of carbon materials, in particular to an amorphous carbon material and a preparation method and an use thereof. The amorphous carbon material has the following characteristics: (1) the true density ? of the amorphous carbon material and the interlayer spacing d002 obtained by powder XRD spectrum analysis satisfy the relational formula: 100×?×d002?70; (2) the interlayer spacing d002, La and Lc satisfy the following relational formula: Lc×d002?0.58; and 100×(Lc/La2)×d0023?0.425; (3) the amorphous carbon material contains 0.001-2% of a silicon component and 0.001-2% of an aluminum component, based on the total mass of the amorphous carbon material. The amorphous carbon material prepared by the present disclosure has desirable heat transfer performance and can provide high battery capacity.
    Type: Application
    Filed: August 13, 2018
    Publication date: July 22, 2021
    Inventors: Guanghong PAN, Wenbin LIANG, Kun TANG, Yajun TIAN, Danmiao KANG, Chunting DUAN, Libin KANG, Chang WEI
  • Publication number: 20210217790
    Abstract: A direct bonding method for infrared focal plane arrays, includes steps of depositing a thin adhesion layer on infrared radiation detecting material, removing a portion of the thin adhesion layer with a chemical-mechanical polishing process, forming a bonding layer at a bonding interface, and bonding the infrared radiation detecting material to a silicon wafer with the thin adhesion layer as a bonding layer. The thin adhesion layer may include SiOx, where x ranges between 1.0 and 2.0. The thickness of the thin adhesion layer to form the bonding layer is 500 angstrom or less.
    Type: Application
    Filed: March 9, 2021
    Publication date: July 15, 2021
    Applicant: L3 Cincinnati Electronics Corporation
    Inventors: Steven ALLEN, Michael GARTER, Robert JONES, Joseph MEINERS, Yajun WEI, Darrel ENDRES
  • Patent number: 10978508
    Abstract: A direct bonding method for infrared focal plane arrays, includes steps of depositing a thin adhesion layer on infrared radiation detecting material, removing a portion of the thin adhesion layer with a chemical-mechanical polishing process, forming a bonding layer at a bonding interface, and bonding the infrared radiation detecting material to a silicon wafer with the thin adhesion layer as a bonding layer. The thin adhesion layer may include SiOx, where x ranges between 1.0 and 2.0. The thickness of the thin adhesion layer to form the bonding layer is 500 angstrom or less.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: April 13, 2021
    Assignee: L3 CINCINNATI ELECTRONICS CORPORATION
    Inventors: Steven Allen, Michael Garter, Robert Jones, Joseph Meiners, Yajun Wei, Darrel Endres
  • Publication number: 20210082992
    Abstract: Methods of fabricating multicolor, stacked detector devices and focal plane arrays are disclosed. In one embodiment, a method of fabricating a stacked multicolor device includes forming a first detector by depositing a first detector structure on a first detector substrate, and depositing a first ground plane on the first detector structure, wherein the first ground plane is transmissive to radiation in a predetermined spectral band. The method further includes bonding an optical carrier wafer to the first ground plane, removing the first detector substrate, and forming a second detector. The second detector is formed by depositing a second detector structure on a second detector substrate, and depositing a second ground plane on the second detector structure. The method further includes depositing a dielectric layer on one of the first detector structure and the second ground plane, bonding the first detector to the second detector, and removing the second detector substrate.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 18, 2021
    Applicant: L3 CINCINNATI ELECTRONICS CORPORATION
    Inventors: Yajun Wei, Daniel Chmielewski, Nansheng Tang, Darrel Endres, Michael Garter, Mark Greiner
  • Publication number: 20210082991
    Abstract: Multicolor, stacked detector devices, focal plane arrays including multicolor, stacked detector devices, and methods of fabricating the same are disclosed. In one embodiment, a stacked multicolor detector device includes a first detector and a second detector. The first detector includes a first detector structure and a first ground plane adjacent the first detector structure. The second detector includes a second detector structure and a second ground plane adjacent the second detector structure. At least one of the first ground plane and the second ground plane is transmissive to radiation in a predetermined spectral band. The first detector and the second detector are in a stacked relationship.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 18, 2021
    Applicant: L3 CINCINNATI ELECTRONICS CORPORATION
    Inventors: Daniel Chmielewski, Yajun Wei, Nansheng Tang, Darrel Endres, Michael Garter, Mark Greiner
  • Patent number: 10886325
    Abstract: Focal plane arrays and infrared detector device having a transparent common ground structure and methods of their fabrication are disclosed. In one embodiment, a front-side illuminated infrared detector device includes a contact layer and a detector structure adjacent to the contact layer. The detector structure is capable of absorbing radiation. The front-side illuminated infrared detector device further includes a common ground structure adjacent the detector structure, wherein the common ground structure is transmissive to radiation having a wavelength in a predetermined spectral band, and the common ground structure has a bandgap that is wider than a bandgap of the detector structure. The front-side illuminated infrared detector device further includes an optical layer adjacent the common ground structure.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: January 5, 2021
    Assignee: L3 CINCINNATI ELECTRONICS CORPORATION
    Inventors: Yajun Wei, Steven Allen, Michael Garter, Mark Greiner, David Forrai, Darrel Endres, Robert Jones
  • Patent number: 10714531
    Abstract: Focal plane arrays and infrared detector device having a transparent common ground structure and methods of their fabrication are disclosed. In one embodiment, a front-side illuminated infrared detector device includes a contact layer and a detector structure adjacent to the contact layer. The detector structure is capable of absorbing radiation. The front-side illuminated infrared detector device further includes a common ground structure adjacent the detector structure, wherein the common ground structure is transmissive to radiation having a wavelength in a predetermined spectral band, and the common ground structure has a bandgap that is wider than a bandgap of the detector structure. The front-side illuminated infrared detector device further includes an optical layer adjacent the common ground structure.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: July 14, 2020
    Assignee: L3 Cincinnati Electronics Corporation
    Inventors: Yajun Wei, Steven Allen, Michael Garter, Mark Greiner, David Forrai, Darrel Endres
  • Publication number: 20200119063
    Abstract: A direct bonding method for infrared focal plane arrays, includes steps of depositing a thin adhesion layer on infrared radiation detecting material, removing a portion of the thin adhesion layer with a chemical-mechanical polishing process, forming a bonding layer at a bonding interface, and bonding the infrared radiation detecting material to a silicon wafer with the thin adhesion layer as a bonding layer. The thin adhesion layer may include SiOx, where x ranges between 1.0 and 2.0. The thickness of the thin adhesion layer to form the bonding layer is 500 angstrom or less.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 16, 2020
    Inventors: Steven ALLEN, Michael GARTER, Robert JONES, Joseph MEINERS, Yajun WEI, Darrel ENDRES
  • Patent number: 10170653
    Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: January 1, 2019
    Assignee: L3 CINCINNATI ELECTRONICS CORPORATION
    Inventor: Yajun Wei
  • Patent number: 10170675
    Abstract: A light emitting diode (LED) structure has semiconductor layers, including a p-type layer, an active layer, and an n-type layer. The p-type layer has a bottom surface, and the n-type layer has a top surface through which light is emitted. Portions of the p-type layer and active layer are etched away to expose the n-type layer. The surface of the LED is patterned with a photoresist, and copper is plated over the exposed surfaces to form p and n electrodes electrically contacting their respective semiconductor layers. There is a gap between the n and p electrodes. To provide mechanical support of the semiconductor layers between the gap, a dielectric layer is formed in the gap followed by filling the gap with a metal. The metal is patterned to form stud bumps that substantially cover the bottom surface of the LED die, but do not short the electrodes. The substantially uniform coverage supports the semiconductor layer during subsequent process steps.
    Type: Grant
    Filed: July 29, 2017
    Date of Patent: January 1, 2019
    Assignee: LUMILEDS LLC
    Inventors: Jipu Lei, Yajun Wei, Alexander H. Nickel, Stefano Schiaffino, Daniel Alexander Steigerwald
  • Patent number: 10121921
    Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: November 6, 2018
    Assignee: L3 CINCINNATI ELECTRONICS CORPORATION
    Inventor: Yajun Wei
  • Patent number: 10121922
    Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: November 6, 2018
    Assignee: L3 CINCINNATI ELECTRONICS CORPORATION
    Inventor: Yajun Wei
  • Publication number: 20180294301
    Abstract: Focal plane arrays and infrared detector device having a transparent common ground structure and methods of their fabrication are disclosed. In one embodiment, a front-side illuminated infrared detector device includes a contact layer and a detector structure adjacent to the contact layer. The detector structure is capable of absorbing radiation. The front-side illuminated infrared detector device further includes a common ground structure adjacent the detector structure, wherein the common ground structure is transmissive to radiation having a wavelength is a predetermined spectral band, and the common ground structure has a bandgap that is wider than a bandgap of the detector structure. The front-side illuminated infrared detector device further includes an optical layer adjacent the common ground structure.
    Type: Application
    Filed: May 4, 2018
    Publication date: October 11, 2018
    Applicant: L3 Cincinnati Electronics Corporation
    Inventors: Yajun Wei, Steven Allen, Michael Garter, Mark Greiner, David Forrai, Darrel Endres, Robert Jones
  • Publication number: 20180294309
    Abstract: Focal plane arrays and infrared detector device having a transparent common ground structure and methods of their fabrication are disclosed. In one embodiment, a front-side illuminated infrared detector device includes a contact layer and a detector structure adjacent to the contact layer. The detector structure is capable of absorbing radiation. The front-side illuminated infrared detector device further includes a common ground structure adjacent the detector structure, wherein the common ground structure is transmissive to radiation having a wavelength is a predetermined spectral band, and the common ground structure has a bandgap that is wider than a bandgap of the detector structure. The front-side illuminated infrared detector device further includes an optical layer adjacent the common ground structure.
    Type: Application
    Filed: May 4, 2018
    Publication date: October 11, 2018
    Applicant: L3 Cincinnati Electronics Corporation
    Inventors: Yajun Wei, Steven Allen, Michael Garter, Mark Greiner, David Forrai, Darrel Endres
  • Publication number: 20180076345
    Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.
    Type: Application
    Filed: November 9, 2017
    Publication date: March 15, 2018
    Applicant: L-3 Communications Cincinnati Electronics Corporation
    Inventor: Yajun Wei
  • Publication number: 20180069140
    Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.
    Type: Application
    Filed: November 9, 2017
    Publication date: March 8, 2018
    Applicant: L-3 Communications Cincinnati Electronics Corporation
    Inventor: Yajun Wei
  • Patent number: 9887307
    Abstract: Diode barrier infrared detector devices and superlattice barrier structures are disclosed. In one embodiment, a diode barrier infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a barrier layer adjacent to the absorber layer, and a second contact layer adjacent to the barrier layer. The barrier layer includes a diode structure formed by a p-n junction formed within the barrier layer. The barrier layer may be such that there is substantially no barrier to minority carrier holes. In another embodiment, a diode barrier infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, a barrier layer adjacent to the absorber layer, and a diode structure adjacent to the barrier layer. The diode structure includes a second contact layer.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: February 6, 2018
    Assignee: L-3 COMMUNICATIONS CINCINNATI ELECTRONICS CORPORATION
    Inventor: Yajun Wei
  • Publication number: 20180019370
    Abstract: A light emitting diode (LED) structure has semiconductor layers, including a p-type layer, an active layer, and an n-type layer. The p-type layer has a bottom surface, and the n-type layer has a top surface though which light is emitted. A copper layer has a first portion electrically connected to and opposing the bottom surface of the p-type layer. A dielectric wall extends through the copper layer to isolate a second portion of the copper layer from the first portion. A metal shunt electrically connects the second portion of the copper layer to the top surface of the n-type layer. P-metal electrodes electrically connect to the first portion, and n-metal electrodes electrically connect to the second portion, wherein the LED structure forms a flip chip. Other embodiments of the methods and structures are also described.
    Type: Application
    Filed: July 31, 2017
    Publication date: January 18, 2018
    Inventors: Jipu Lei, Kwong-Hin Henry Choy, Yajun Wei, Stefano Schiaffino, Daniel Alexander Steigerwald
  • Publication number: 20170373235
    Abstract: A light emitting diode (LED) structure has semiconductor layers, including a p-type layer, an active layer, and an n-type layer. The p-type layer has a bottom surface, and the n-type layer has a top surface through which light is emitted. Portions of the p-type layer and active layer are etched away to expose the n-type layer. The surface of the LED is patterned with a photoresist, and copper is plated over the exposed surfaces to form p and n electrodes electrically contacting their respective semiconductor layers. There is a gap between the n and p electrodes. To provide mechanical support of the semiconductor layers between the gap, a dielectric layer is formed in the gap followed by filling the gap with a metal. The metal is patterned to form stud bumps that substantially cover the bottom surface of the LED die, but do not short the electrodes. The substantially uniform coverage supports the semiconductor layer during subsequent process steps.
    Type: Application
    Filed: July 29, 2017
    Publication date: December 28, 2017
    Inventors: Jipu Lei, Yajun Wei, Alexander H. Nickel, Stefano Schiaffino, Daniel Alexander Steigerwald