Abstract: The invention discloses an information processing method, the method including: obtaining by the first sensor a first movement input of a first operating body located on the side of the frame structural body and a second movement input of a second operating body located on the side of the frame structural body; determining whether the first movement input and the second movement input satisfy a predetermined condition, wherein the predetermined condition is that a movement direction of the first operating body and a movement direction of the second operating body are consistent with respect to the sensing area; generating a control instruction when the first movement input and the second movement input satisfy the predetermined condition; and controlling a display interface on the display screen in response to the control instruction.

Abstract: The present disclosure provides information processing methods and electronic devices in view of the problem in the conventional technology that accuracy of adjusting parameters via voice input is low. The information processing method is applied in an electronic device comprising an output unit.

Abstract: An insulation detection circuit suitable for detecting an insulation status between a high voltage power and a low voltage power of a vehicle is disclosed. The circuit includes a first energy storage unit, a second energy storage unit, a constant current unit, and a detection unit. The first energy storage unit is coupled to the high voltage power. The second energy storage unit is coupled between the first energy storage unit and the low voltage power. The constant current unit is coupled between the first energy storage unit and the second energy storage unit. The detection unit is coupled to the second energy storage unit for detecting a current change of the second energy storage unit. When the detection unit detects that current flowing through the second energy storage unit is smaller than a predetermined value, a detection signal representing that the insulation status is abnormal is outputted.

Abstract: A host computer and a method for managing pulse-width modulation (PWM) include detecting a signal of a powerGD port. The management system further includes confirming a first state according to a first signal of the powerGD port. The management system further includes enabling the PWM port if the first state is in a power-on state, and disabling the PWM port if the first state is a power-off state.

Abstract: The present invention relates a method of fabricating a piezoelectric device through micromachining piezoelectric-on-silicon wafer. The wafers are constructed so that piezoelectric layer is a single wafer having a thin layer from 5 to 50 ?m.

Abstract: A system and a method for virtual serial port management include setting a virtual universal asynchronous receiver/transmitter (VUART) and a software multiplexer (MUX) and setting the VUART to perform functions corresponding to different values of the software MUX. The method further includes receiving commands sent to the server regularly and assigning a first predetermined value to the software MUX when the received command is not an Intelligent platform management interface (IPMI) command. The management method further includes assigning a second predetermined value to the software MUX when the received command is the IPMI command but not a serial over LAN (SOL) command, and assigning a third predetermined value to the software MUX when the received command is the SOL command.

Abstract: This invention relates to a rotary ultrasound imaging system comprising a control device, an ultrasound probe head and a rotary motor device, wherein the rotary motor device receives ultrasound signals sent from the ultrasound probe head, and outputs the received ultrasound signals to the control device through a 360-degree rotation; and the ultrasound probe head comprises a housing with an installation groove which is provided therein with an ultrasound transducer with a concave focusing surface. Since the concave focusing surface is directly formed on the ultrasound transducer, focusing of the rotary ultrasound imaging system is realized without addition of extra components (e.g. lens). Therefore lateral resolution and performance are improved. Furthermore, since the output shaft of the rotary motor of the rotary ultrasound imaging system is configured as a hollow shaft, ultrasound signals from the ultrasound transducer may be sent to the control device through a path of 360-degree rotation.

Abstract: A spindle motor component of hard disk with composite coating layer and a composite coating method hereof. The spindle motor component of hard disk includes a motor component base (1) and the composite coating layer which is coated on the base (1). The composite coating layer consists of an electrodepositing coating layer (2) and a spraying coating layer (3). The composite coating method includes a step of coating the electrodepositing coating layer (2) on the surface of the motor component base (1) and coating the spraying coating layer (3) on the electrodepositing coating layer (2), wherein the weight ratio of tin in the electrodepositing coating layer (2) is between 60 ppm to 300 ppm and the weight ratio of tin in the spraying coating layer (3) is no more than 50 ppm.

Abstract: A computer having a BIOS recovery function includes a baseboard management controller (BMC) circuit, a main control circuit, a switching module and a BIOS chip. The switching module is connected to the BMC circuit and the main control circuit. The BIOS chip stores BIOS programs for the computer and is selectively connected to the BMC circuit and main control circuit by the switching module. When the BIOS programs are corrupted, the switching module selects the BMC circuit to communicate with the BIOS chip. New BIOS programs can be sent to the BIOS chip to update the corrupted BIOS programs.

Abstract: A system and a method for virtual serial port management include setting a virtual universal asynchronous receiver/transmitter (VUART) and a software multiplexer (MUX) and setting the VUART to perform functions corresponding to different values of the software MUX. The method further includes receiving commands sent to the server regularly and assigning a first predetermined value to the software MUX when the received command is not an Intelligent platform management interface (IPMI) command. The management method further includes assigning a second predetermined value to the software MUX when the received command is the IPMI command but not a serial over LAN (SOL) command, and assigning a third predetermined value to the software MUX when the received command is the SOL command.

Abstract: A host computer and a method for managing pulse-width modulation (PWM) include detecting a signal of a powerGD port. The management system further includes confirming a first state according to a first signal of the powerGD port. The management system further includes enabling the PWM port if the first state is in a power-on state, and disabling the PWM port if the first state is a power-off state.

Abstract: A spindle motor component of hard disk with composite coating layer and a composite coating method hereof. The spindle motor component of hard disk includes a motor component base (1) and the composite coating layer which is coated on the base (1). The composite coating layer consists of an electrodepositing coating layer (2) and a spraying coating layer (3). The composite coating method includes a step of coating the electrodepositing coating layer (2) on the surface of the motor component base (1) and coating the spraying coating layer (3) on the electrodepositing coating layer (2), wherein the weight ratio of tin in the electrodepositing coating layer (2) is between 60 ppm to 300 ppm and the weight ratio of tin in the spraying coating layer (3) is no more than 50 ppm.

Abstract: A computer-implemented method to decode a digital signal includes following steps. A micro control unit (MCU) receives a digital signal. The MCU reads a low voltage period of the digital signal and stores a time duration of the low voltage period into a first register as a value TL. The MCU reads next high voltage period of the digital signal and stores a time duration of the high voltage period into a second register as a value TH. The MCU reads the value TL of the first register and the value TH of the second register, and computes a ratio TR=TH/TL. The MCU compares the ratio TR with two predetermined values M and N, if TR=M, the decoded result is a logical “1.” If TR=N, the decoded result is a logical “0.

Abstract: A computer-implemented method to decode a digital signal includes following steps. A micro control unit (MCU) receives a digital signal. The MCU reads a low voltage period of the digital signal and stores a time duration of the low voltage period into a first register as a value TL. The MCU reads next high voltage period of the digital signal and stores a time duration of the high voltage period into a second register as a value TH. The MCU reads the value TL of the first register and the value TH of the second register, and computes a ratio TR=TH/TL. The MCU compares the ratio TR with two predetermined values M and N, if TR=M, the decoded result is a logical “1.” If TR=N, the decoded result is a logical “0.

Abstract: An apparatus for adjusting a pixel clock frequency based on a phase locked loop (PLL) includes: a pixel clock generator (11) for generating an actual pixel clock having an actual frequency; a division frequency counter (12) for dividing the actual pixel clock into several pixel clocks having different frequency ranges by means of multiplying the actual frequency of the actual pixel clock by a multiplier; a reference frequency counter (13) for dividing the actual pixel clock by means of lowering the actual frequency of the actual pixel clock, and generating a reference frequency; a reactive frequency counter (14) for dividing the actual pixel clock by means of heightening the actual frequency of the actual pixel clock, and generating a reactive frequency; a PLL circuit (16) for integrating the reference frequency and the reactive frequency to generate a required pixel clock having a required frequency. A related method is also disclosed.

Abstract: A system for checking basic input output system read only memory (BIOS ROM) data includes a keyboard, a display, a computer host, and a checking device. The computer host has a BIOS ROM installed therein. The checking device includes: a data dividing module for dividing the BIOS ROM data into a plurality of sections; a data obtaining module for capturing BIOS ROM data from one or more sections, and for counting a check datum; a data checking module for comparing the check datum with a standard datum, and for determining whether the two data are equal; and a checking result outputting module for outputting the checking results.

Abstract: The present invention relates a method of fabricating a piezoelectric device through micromachining piezoelectric-on-silicon wafer. The wafers are constructed so that piezoelectric layer is a single wafer having a thin layer from 5 to 50 ?m.

Abstract: An exemplary debugging system (2) for a liquid crystal display device (26) includes a host computer (22). The host computer includes a graphics card (220), a driver layer (225), and an application layer (226). The application layer includes a graphical user interface, and the driver layer includes a plurality of drivers to drive the graphics card. The host computer is configured for storing chip data of a scaler chip (260) of the liquid crystal display device, reading and writing the scaler chip via the graphics card, and displaying corresponding chip data on the liquid crystal display device via the graphical user interface such that the corresponding chip data can be revised in a debugging process of the liquid crystal display device.

Abstract: A video graphics array color signal generator is provided. The signal generator includes an FPGA (field program gate array) device (1), a PROM (programmable read only memory) (2), a PLL (phase locked loop) circuit (3), a D/A (digital/analog) convertor (4) connected with the FPGA device, a VGA (video graphics array) interface (5), a pixel clock generator (6) which generates pixel clocks continuously at a frequency, and a keyboard (7) which provides operating buttons for users.

Abstract: An exemplary testing system for liquid crystal displays includes a host (1) and a liquid crystal display (2). The host includes a display card (10) having a memory (105). Plural reference data according to a plurality of timing control modes are stored in the memory. The display card controls the liquid crystal display to display testing images by transmitting horizontal synchronization signals, vertical synchronization signals, red signals, green signals, and blue signals to the liquid crystal display using one of the timing control modes.