Abstract: A system and method for automatically upgrading the firmware of a display without user interaction, wherein a new version of firmware is downloaded and stored at a host computer. The host computer monitors all communications between the host computer and an external source to determine when new or updated firmware has been uploaded. If the host computer includes a graphic card, the display is checked to determine whether it is active. If the display is active, communication over a communication cable located between the host computer and display is established, and the new version of firmware is uploaded to memory located in the display. The host computer forwards the firmware over the communication cable as at least one signal component, such as data and clock signals, which is transmitted from a graphic card located in the host computer to a graphic processor located in the display.

Abstract: A video graphic array colorful signal generator is provided. The signal generator includes a FPGA (field program gate array) device (1), a PROM (programmable read only memory) (2), a PLL (phase locked loop) circuit (3), a D/A (digital/analog) convertor (4) connected with the FPGA device, a VGA (video graphic array) interface (5), a pixel clock generator (6) which generates pixel clock continuously at a frequency, and a keyboard (7) which provides operating buttons for users.

Abstract: An apparatus for adjusting a pixel clock frequency based on a phase locked loop (PLL) includes: a pixel clock generator (11) for generating an actual pixel clock having an actual frequency; a division frequency counter (12) for dividing the actual pixel clock into several pixel clocks having different frequency ranges by means of multiplying the actual frequency of the actual pixel clock by a multiplier; a reference frequency counter (13) for dividing the actual pixel clock by means of lowering the actual frequency of the actual pixel clock, and generating a reference frequency; a reactive frequency counter (14) for dividing the actual pixel clock by means of heightening the actual frequency of the actual pixel clock, and generating a reactive frequency; a PLL circuit (16) for integrating the reference frequency and the reactive frequency to generate a required pixel clock having a required frequency. A related method is also disclosed.

Abstract: A system for checking BIOS ROM data is disclosed. The system includes a keyboard (10), a display (20), a computer host (30), and a checking device (40). The computer host (30) has a BIOS ROM (301) installed therein. The checking device (40) includes: a data dividing module (400) for dividing the BIOS ROM data into a plurality of sections; a data obtaining module (401) for capturing BIOS ROM data from one or more sections, and for counting a check datum; a data checking module (402) for comparing the check datum with a standard datum, and for determining whether the two data are equal; and a checking result outputting module (403) for outputting the checking results. A related method is also disclosed.

Abstract: A system for automatically adjusting computer system times via a COM port includes one or more computers (1) to be adjusted, and a time loading apparatus (2). Each computer includes: a setting module (10) for determining whether there is a new settings; a request generating module (11) for generating a time obtaining request, and transmitting the time obtaining request to the time loading apparatus; a searching module (13) for searching a time difference value of a destination in a time difference table; a converting module (14) for converting a current time received from the time loading apparatus into a system time of the destination, and converting the format of the current time into a stored time format if the current time format is different from the stored time format; and a system time adjusting module (15) for adjusting the system time of the computer. A related method is also disclosed.