Abstract: Embodiments include Multiple Gate Field-Effect Transistors (MuGFETs) and methods of forming them. In an embodiment, a structure includes a substrate, a fin, masking dielectric layer portions, and a raised epitaxial lightly doped source/drain (LDD) region. The substrate includes the fin. The masking dielectric layer portions are along sidewalls of the fin. An upper portion of the fin protrudes from the masking dielectric layer portions. A first spacer is along a sidewall of a gate structure over a channel region of the fin. A second spacer is along the first spacer. The raised epitaxial LDD region is on the upper portion of the fin, and the raised epitaxial LDD region adjoins a sidewall of the first spacer and is disposed under the second spacer. The raised epitaxial LDD region extends from the upper portion of the fin in at least two laterally opposed directions and a vertical direction.

Abstract: An intestinal barrier sleeve release system includes a tubular housing having a first opening at one end and a second opening at the other end. A tubular sleeve to be released is disposed in the housing. A release body connected to the one end of the tubular sleeve is disposed at the first opening of the housing and is made of a material that can be dissolved and absorbed in human intestines. An inner sheath, a middle sheath and an outer sheath are sequentially set and move relative to each other. The inner sheath and the middle sheath are operated to move axially, the release body is disengaged from the housing, and the tubular sleeve moves out of the housing and is released at a specified position of the human intestines.

Abstract: Embodiments include Multiple Gate Field-Effect Transistors (MuGFETs) and methods of forming them. In an embodiment, a structure includes a substrate, a fin, masking dielectric layer portions, and a raised epitaxial lightly doped source/drain (LDD) region. The substrate includes the fin. The masking dielectric layer portions are along sidewalls of the fin. An upper portion of the fin protrudes from the masking dielectric layer portions. A first spacer is along a sidewall of a gate structure over a channel region of the fin. A second spacer is along the first spacer. The raised epitaxial LDD region is on the upper portion of the fin, and the raised epitaxial LDD region adjoins a sidewall of the first spacer and is disposed under the second spacer. The raised epitaxial LDD region extends from the upper portion of the fin in at least two laterally opposed directions and a vertical direction.

Abstract: A semiconductor device includes a substrate, a fin structure and an isolation layer formed on the substrate and adjacent to the fin structure. The semiconductor device includes a gate structure formed on at least a portion of the fin structure and the isolation layer. The semiconductor device includes an epitaxial layer including a strained material that provides stress to a channel region of the fin structure. The epitaxial layer has a first region and a second region, in which the first region has a first doping concentration of a first doping agent and the second region has a second doping concentration of a second doping agent. The first doping concentration is greater than the second doping concentration. The epitaxial layer is doped by ion implantation using phosphorous dimer.

Abstract: Representative methods of manufacturing memory devices include forming a transistor with a gate disposed over a workpiece, and forming an erase gate with a tip portion extending towards the workpiece. The transistor includes a source region and a drain region disposed in the workpiece proximate the gate. The erase gate is coupled to the gate of the transistor.

Abstract: A semiconductor device includes a substrate, a gate disposed over the substrate, a source/drain disposed in the substrate at two sides of the gate, and an insulating layer disposed over sidewalls of the gate and at least a portion of a surface of the source/drain. In some embodiments, the insulating layer includes a first side facing the gate or the source, and includes a second side opposite to the first side. The insulating layer includes dopants, and a concentration of the dopants is reduced from the second side to the first side of the insulating layer.

Abstract: Feature descriptor matching described herein may include receiving a first input image and a second input image. A feature detector may detect features from the first and second input images. A descriptor extractor may learn local feature descriptors from the features of the first and second input images based on a feature descriptor matching model trained using a ground truth data set. The descriptor extractor may determine a listwise mean average precision (mAP) rank of a pool of candidate image patches from the second input image with respect to a queried image patch from the first input image based on the feature descriptor matching model, the first set of local feature descriptors, and the second set of local feature descriptors. The descriptor matcher may generate a geometric transformation between the first input image and the second input image based on the listwise mAP and a convolutional neural network.

Abstract: A multilayer circuit board comprises an inner circuit unit having at least one solder portion, and at least one outer circuit board coupled with the inner circuit unit. The inner circuit unit connects with the outer circuit board by an insulation colloid. At least one side of the inner circuit unit does not extend to edges of the multilayer circuit board. The at least one outer circuit board forms at least one through-hole and at least one conductive hole. The at least one conductive hole which is internally-plated with copper extends from the at least one outer circuit board to the inner circuit unit. A method of manufacturing the multilayer circuit board is also disclosed.

Abstract: A multilayer circuit board comprises an inner circuit unit having at least one solder portion, and at least one outer circuit board coupled with the inner circuit unit. The inner circuit unit connects with the outer circuit board by an insulation colloid. At least one side of the inner circuit unit does not extend to edges of the multilayer circuit board. The at least one outer circuit board forms at least one through-hole and at least one conductive hole. The at least one conductive hole which is internally-plated with copper extends from the at least one outer circuit board to the inner circuit unit. A method of manufacturing the multilayer circuit board is also disclosed.

Abstract: A method of manufacturing an embedded flexible circuit board includes: providing a first circuit substrate comprising at least one welding pad which is further to carry on surface treatment on the at least one welding pad to form a protective layer; providing at least one embedded middle body including a base a thin-film resistor formed onto the base, and a conducting resin, the conducting resin formed onto the thin-film resistor and being opposite from the base; fitting the embedded middle body onto the at least one welding pad through the conducting resin, and electronically connecting the thin-film resistor and the at least one welding pad through the conducting resin; removing the base; and forming a second circuit substrate at a side of the first circuit substrate where the thin-film resistor attached on, thereby the thin-film resistor sandwiched between the first circuit substrate and the second circuit substrate.

Abstract: Systems and techniques for sign based localization are provided herein. Sign based localization may be achieved by capturing an image of an operating environment around a vehicle, extracting one or more text candidates from the image, detecting one or more line segments within the image, defining one or more quadrilateral candidates based on one or more of the text candidates, one or more of the line segments, and one or more intersections of respective line segments, determining one or more sign candidates for the image based on one or more of the quadrilateral candidates and one or more of the text candidates, matching one or more of the sign candidates against one or more reference images, and determining a location of the vehicle based on a match between one or more of the sign candidates and one or more of the reference images.

Abstract: The present disclosure relates to a backlight module. The backlight module is configured for use in a transparent display device and comprises: an optical splitter; and a light source arranged at a side of the optical splitter and emitting light towards the optical splitter. The optical splitter is configured to split light emitted from the light source into a first light beam and a second light beam, wherein the first light beam is configured for supplying backlight, and the second light beam is configured for illuminating background behind the optical splitter. The present disclosure also relates to a transparent display device, comprising the above described backlight module; as well as an array substrate and a color film substrate arranged in front of the backlight module.

Abstract: The present invention provides a webpage pre-reading method, apparatus and a smart terminal device. The webpage pre-reading method includes: acquiring information of one or more users accessing multiple webpages within a first period of time; determining click paths through each of which a second webpage is clicked and entered from a first webpage and the number of clicks thereof; determining a first confidence value of each click path; generating a first pre-reading list including the click paths based on the first confidence values; and querying for a click path of a currently browsed webpage from the first pre-reading list so as to pre-read data of a corresponding target webpage to be browsed.

Abstract: In an approach for converging a cloud computing environment and a mobile device into an integrated environment, a processor receives a request to complete a computing task on a first device. A processor identifies capabilities of the first device. A processor monitors resource utilization on the first device. A processor determines that the computing task should be offloaded based, at least in part, on the capabilities of the first device and resource utilization on the first device. A processor offloads the computing task. A processor receives a result of the computing task.

Abstract: In an approach for converging a cloud computing environment and a mobile device into an integrated environment, a processor receives a request to complete a computing task on a first device, wherein the computing task requires a physical sensor. A processor determines that the computing task should be offloaded from the first device to a second device based, at least in part, on the first device lacking the physical sensor and the second device having the physical sensor. A processor offloads the computing task from the first device to the second device. A processor receives a result of the computing task from the second device.

Abstract: A method of manufacturing an embedded flexible circuit board includes: providing a first circuit substrate comprising at least one welding pad; providing at least one embedded middle body including a base a thin-film resistor formed onto the base, and a conducting resin, the conducting resin formed onto the thin-film resistor and being opposite from the base; fitting the embedded middle body onto the at least one welding pad through the conducting resin, and electronically connecting the thin-film resistor and the at least one welding pad through the conducting resin; removing the base; and forming a second circuit substrate at a side of the first circuit substrate where the thin-film resistor attached on, thereby the thin-film resistor sandwiched between the first circuit substrate and the second circuit substrate. An embedded flexible circuit board made by the method is also provided.

Abstract: A multilayer circuit board comprises an inner circuit board, a tin layer, at least one outer circuit board, and a solder mask. The inner circuit board comprises at least one first mounting region and at least one second mounting region. The tin layer is formed on a surface of the inner circuit board except the first mounting region connecting the outer circuit board. The outer circuit board comprises at least one first opening to expose the first mounting region and at least one second opening to expose a portion of the tin layer covering the second mounting region. The inner circuit board, the tin layer, and the outer circuit board together form a middle structure. The solder mask covers the middle structure except the portion and the first mounting region. A treatment layer is formed on the first mounting region.

Abstract: In order to reduce computation time and cost involved with detecting and diagnosing a fault in a system, simplified representations of components of the system are used to estimate valid intervals for state variables at the components. Generic failure rules are configured to compare the estimated valid intervals to related intervals for the same state variables, from either observations or propagations, for overlap. Failure output vectors are generated based on the comparison, and the failure output vectors are compared to diagnostic matrices to determine a source of the fault.