Patents by Inventor Yang Xiao

Yang Xiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190088722
    Abstract: A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.
    Type: Application
    Filed: November 8, 2018
    Publication date: March 21, 2019
    Inventors: YU-DAN ZHAO, QUN-QING LI, XIAO-YANG XIAO, GUAN-HONG LI, YUAN-HAO JIN, SHOU-SHAN FAN
  • Publication number: 20190084904
    Abstract: A method for producing hydrocarbons and hydrogen from methane. The method includes packing a catalyst comprising platinum, bismuth and a support material into a reactor; introducing a reactant mixture containing methane into the reactor such that the reactant mixture containing methane is in close contact with the reactant mixture; and heating the reactant mixture containing methane to a temperature for a period of time.
    Type: Application
    Filed: September 19, 2018
    Publication date: March 21, 2019
    Applicant: Purdue Research Foundation
    Inventors: Arvind Varma, Yang Xiao
  • Publication number: 20190082341
    Abstract: Embodiments of the present invention provide a data transmission method, apparatus, and system. The method is applied to a data transmission system. The data transmission system includes a system platform and a terminal device. A method performed by the system platform includes: determining, based on a type of the terminal device and a type of data generated by the terminal device, a data transmission rule of the data generated by the terminal device; and sending a data transmission message to the terminal device, where the data transmission message carries the data transmission rule, so that the terminal device sends, to the system platform based on the data transmission rule, the data corresponding to the data transmission rule. Massive data can be effectively prevented from being transmitted to the system platform by configuring the data transmission rule, and data with a high priority can be preferentially processed, to improve system performance.
    Type: Application
    Filed: November 13, 2018
    Publication date: March 14, 2019
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jing Li, Yang Xiao
  • Patent number: 10217833
    Abstract: A thin film transistor includes a gate, an insulating medium layer and a Schottky diode. The Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode is located on the surface of the insulating medium layer and includes a first metal layer and a second metal layer. The second electrode is located on the surface of the insulating medium layer and includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure includes a nano-scale semiconductor structure.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: February 26, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
  • Patent number: 10199513
    Abstract: A Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode includes a first metal layer and a second metal layer. The second electrode includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure is a nano-scale semiconductor structure.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: February 5, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
  • Patent number: 10193091
    Abstract: A Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode includes a first metal layer and a second metal layer. The second electrode includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure includes a carbon nanotube structure.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: January 29, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
  • Patent number: 10192930
    Abstract: A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and an n-type carbon nanotube thin film transistor stacked on one another. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: January 29, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Qun-Qing Li, Xiao-Yang Xiao, Guan-Hong Li, Yuan-Hao Jin, Shou-Shan Fan
  • Publication number: 20190028429
    Abstract: A method and an apparatus for keeping network address translation mapping alive are provided. The method includes: receiving, by a network address translation NAT device, a probe request sent by an internal network device; sending a probe response to the internal network device, where the probe response carries indication information, and the indication information indicates that the internal network device does not actively initiate a heartbeat message to keep network address translation mapping alive; allocating at least two public network addresses to the internal network device from an address resource pool, and using in each time period of a subsequent session process between the internal network device and an external network device, one of the at least two public network addresses as a current active address in the time period, to map the private network address of the internal network device to the current active address.
    Type: Application
    Filed: September 26, 2018
    Publication date: January 24, 2019
    Inventors: Yan LIU, Yang XIAO
  • Patent number: 10177199
    Abstract: A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: January 8, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Qun-Qing Li, Xiao-Yang Xiao, Guan-Hong Li, Yuan-Hao Jin, Shou-Shan Fan
  • Publication number: 20180348090
    Abstract: A vertical high-speed testing device for a spiral seal of a cone bit bearing is provided. The device includes an upper fixed plate, a liquid cylinder, a cone, a spiral sleeve, a shaft and a lower fixed plate. The spiral sleeve is in threaded connection to the cone. Both the cone and the spiral sleeve are sheathed on the shaft. Sealing threads are provided on an inner surface of the spiral sleeve, and there is a clearance between the sealing threads and the shaft. By the testing device of the present invention, a spiral seal structure for a cone bit bearing is simulated, and the cone drives the spiral sleeve to rotate; and the sand draining performance of the spiral seal is tested by measuring the time required to drain sand-containing medium, so that the smooth production and application of spiral seal products can be assured.
    Type: Application
    Filed: September 15, 2017
    Publication date: December 6, 2018
    Inventors: Yi Zhou, Yueming Zheng, Yang Xiao, Xia Wang, Tong Xu, Yuxing Huang, Yi Tang, Bin Tan
  • Publication number: 20180348082
    Abstract: A horizontal high-speed testing device for a spiral seal of a cone bit bearing is provided. The device comprises a shaft, a spiral sleeve and a cone. The spiral sleeve is in threaded connection to the cone. Sealing threads are provided on an inner diameter of the spiral sleeve. Both the spiral sleeve and the cone are sheathed on the shaft. By the testing device of the present invention, a spiral seal structure for a cone bit bearing is simulated, and the cone drives the spiral sleeve to rotate; the sand draining performance of the spiral seal can be tested in two ways, i.e., by measuring the time required to drain the sand-containing liquid and by measuring the weight of drained sand, so that the smooth production and application of spiral seal products can be assured.
    Type: Application
    Filed: September 15, 2017
    Publication date: December 6, 2018
    Inventors: Yi Zhou, Yueming Zheng, Yang Xiao, Tong Xu, Xia Wang, Yi Tang, Song Peng, Yuxing Huang, Bin Tan
  • Publication number: 20180301546
    Abstract: A method of making a thin film transistor, the method including: forming a gate insulating layer on a gate electrode; placing a semiconductor layer on the gate insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises one nanowire; forming one opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, the conductive film layer is divided into two regions, one region is used as a source electrode, the other region is used as a drain electrode.
    Type: Application
    Filed: December 22, 2017
    Publication date: October 18, 2018
    Inventors: MO CHEN, QUN-QING LI, LI-HUI ZHANG, XIAO-YANG XIAO, JIN ZHANG, SHOU-SHAN FAN
  • Publication number: 20180301543
    Abstract: A method of making a thin film transistor, the method including: providing an insulating layer on a semiconductor substrate, forming a semiconductor layer on the insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, wherein the nanowire structure comprises a nanowire; forming an opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, and the conductive film layer is divided into two regions by the nano-scaled channel, one region is used as a source electrode, and the other region is used as a drain electrode; forming a gate electrode on the semiconductor substrate.
    Type: Application
    Filed: December 22, 2017
    Publication date: October 18, 2018
    Inventors: MO CHEN, QUN-QING LI, LI-HUI ZHANG, XIAO-YANG XIAO, JIN ZHANG, SHOU-SHAN FAN
  • Publication number: 20180301340
    Abstract: A method of making nano-scaled channel, the method including: locating a first photoresist layer, a nanowire structure, and a second photoresist layer on a surface of a substrate, and the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises an nanowire; forming an opening in the first photoresist layer and the second photoresist layer to expose a portion of the surface of the substrate to form an exposed surface, wherein a part of the nanowire is exposed and suspended in the opening, and both ends of the nanowire are sandwiched between the first photoresist layer and the second photoresist layer; and depositing a thin film layer on the exposed surface of the substrate using the a nanowire as a mask, wherein the thin film layer defines a nano-scaled channel corresponding to the at least one nanowire.
    Type: Application
    Filed: December 22, 2017
    Publication date: October 18, 2018
    Inventors: MO CHEN, QUN-QING LI, LI-HUI ZHANG, XIAO-YANG XIAO, JIN ZHANG, SHOU-SHAN FAN
  • Publication number: 20180219044
    Abstract: A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and an n-type carbon nanotube thin film transistor stacked on one another. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.
    Type: Application
    Filed: March 21, 2018
    Publication date: August 2, 2018
    Inventors: YU-DAN ZHAO, QUN-QING LI, XIAO-YANG XIAO, GUAN-HONG LI, YUAN-HAO JIN, SHOU-SHAN FAN
  • Publication number: 20180212033
    Abstract: A thin film transistor includes a gate, an insulating medium layer and a Schottky diode. The Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode is located on the surface of the insulating medium layer and includes a first metal layer and a second metal layer. The second electrode is located on the surface of the insulating medium layer and includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure includes a nano-scale semiconductor structure.
    Type: Application
    Filed: December 19, 2017
    Publication date: July 26, 2018
    Inventors: YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, YUAN-HAO JIN, TIAN-FU ZHANG, QUN-QING LI
  • Publication number: 20180212069
    Abstract: A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating substrate. The semiconducting structure is nano-scale semiconductor structure. The second electrode is located on the second end.
    Type: Application
    Filed: December 19, 2017
    Publication date: July 26, 2018
    Inventors: YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, YUAN-HAO JIN, TIAN-FU ZHANG, QUN-QING LI
  • Publication number: 20180212173
    Abstract: A thin film transistor includes a gate electrode, a insulating medium layer and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating medium layer. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating medium layer. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.
    Type: Application
    Filed: December 19, 2017
    Publication date: July 26, 2018
    Inventors: YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, YUAN-HAO JIN, TIAN-FU ZHANG, QUN-QING LI
  • Publication number: 20180212171
    Abstract: A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating substrate. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.
    Type: Application
    Filed: December 19, 2017
    Publication date: July 26, 2018
    Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
  • Publication number: 20180212070
    Abstract: A Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode includes a first metal layer and a second metal layer. The second electrode includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure is a nano-scale semiconductor structure.
    Type: Application
    Filed: December 19, 2017
    Publication date: July 26, 2018
    Inventors: YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, YUAN-HAO JIN, TIAN-FU ZHANG, QUN-QING LI