Patents by Inventor Yasuharu Hosaka

Yasuharu Hosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220319866
    Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, an oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The second insulating film comprises a silicon oxynitride film. When excess oxygen is added to the second insulating film by oxygen plasma treatment, oxygen can be efficiently supplied to the oxide semiconductor film.
    Type: Application
    Filed: June 17, 2022
    Publication date: October 6, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Masami JINTYOU, Junichi KOEZUKA, Takashi HAMOCHI, Yasuharu HOSAKA
  • Patent number: 11430817
    Abstract: A novel semiconductor device in which a metal film containing copper (Cu) is used for a wiring, a signal line, or the like in a transistor including an oxide semiconductor film is provided. The semiconductor device includes an oxide semiconductor film having conductivity on an insulating surface and a conductive film in contact with the oxide semiconductor film having conductivity. The conductive film includes a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti).
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: August 30, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Yukinori Shima, Masami Jintyou, Takashi Hamochi, Satoshi Higano, Yasuharu Hosaka, Toshimitsu Obonai
  • Publication number: 20220246731
    Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 4, 2022
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Yukinori SHIMA, Junichi KOEZUKA, Kenichi OKAZAKI
  • Patent number: 11404285
    Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, an oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The second insulating film comprises a silicon oxynitride film. When excess oxygen is added to the second insulating film by oxygen plasma treatment, oxygen can be efficiently supplied to the oxide semiconductor film.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: August 2, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masami Jintyou, Junichi Koezuka, Takashi Hamochi, Yasuharu Hosaka
  • Publication number: 20220216243
    Abstract: A peeling method at low cost with high mass productivity is provided. A resin layer having a thickness greater than or equal to 0.1 ?m and less than or equal to 3 ?m is formed over a formation substrate using a photosensitive and thermosetting material, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, the resin layer is irradiated with light using a linear laser device, and the transistor and the formation substrate are separated from each other. A first region and a second region which is thinner than the first region or an opening can be formed in the resin layer. In the case of forming a conductive layer functioning as an external connection terminal or the like to overlap with the second region or the opening of the resin layer, the conductive layer is exposed.
    Type: Application
    Filed: March 23, 2022
    Publication date: July 7, 2022
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Satoru IDOJIRI, Kenichi OKAZAKI, Hiroki ADACHI, Daisuke KUBOTA
  • Publication number: 20220187645
    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.
    Type: Application
    Filed: December 27, 2021
    Publication date: June 16, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuharu HOSAKA, Yukinori SHIMA, Kenichi OKAZAKI, Shunpei YAMAZAKI
  • Publication number: 20220181492
    Abstract: A circuit capable of high-speed operation and a pixel are integrally formed over the same substrate. A first metal oxide film, a first metal film, and an island-shaped first resist mask are formed over a first insulating layer. An island-shaped first metal layer and an island-shaped first oxide semiconductor layer are formed and a part of a top surface of the first insulating layer is exposed; then, the first resist mask is removed. A second metal oxide film, a second metal film, and an island-shaped second resist mask are formed over the first metal layer and the first insulating layer. An island-shaped second metal layer and an island-shaped second oxide semiconductor layer are formed; then, the second resist mask is removed. The first metal layer and the second metal layer are removed.
    Type: Application
    Filed: November 23, 2021
    Publication date: June 9, 2022
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Mitsuo MASHIYAMA, Kenichi OKAZAKI
  • Publication number: 20220149205
    Abstract: In a transistor that includes an oxide semiconductor, a change in electrical characteristics is suppressed and the reliability is improved. A semiconductor device that includes a transistor is provided. The transistor includes a first conductive film that functions as a first gate electrode, a first gate insulating film, a first oxide semiconductor film that includes a channel region, a second gate insulating film, and a second oxide semiconductor film and a second conductive film that function as a second gate electrode. The second oxide semiconductor film includes a region higher in carrier density than the first oxide semiconductor film. The second conductive film includes a region in contact with the first conductive film.
    Type: Application
    Filed: January 27, 2022
    Publication date: May 12, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuharu HOSAKA, Yukinori SHIMA, Masataka NAKADA, Masami JINTYOU
  • Patent number: 11329166
    Abstract: In a transistor that includes an oxide semiconductor, a change in electrical characteristics is suppressed and the reliability is improved. A semiconductor device that includes a transistor is provided. The transistor includes a first conductive film that functions as a first gate electrode, a first gate insulating film, a first oxide semiconductor film that includes a channel region, a second gate insulating film, and a second oxide semiconductor film and a second conductive film that function as a second gate electrode. The second oxide semiconductor film includes a region higher in carrier density than the first oxide semiconductor film. The second conductive film includes a region in contact with the first conductive film.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: May 10, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Yukinori Shima, Masataka Nakada, Masami Jintyou
  • Publication number: 20220127713
    Abstract: A metal oxide film with high electrical characteristics is provided. A metal oxide film with high reliability is provided. The metal oxide film contains indium, M (M is aluminum, gallium, yttrium, or tin), and zinc. In the metal oxide film, distribution of interplanar spacings d determined by electron diffraction by electron beam irradiation from a direction perpendicular to a film surface of the metal oxide film has a first peak and a second peak. The top of the first peak is positioned at greater than or equal to 0.25 nm and less than or equal to 0.30 nm, and the top of the second peak is positioned at greater than or equal to 0.15 nm and less than or equal to 0.20 nm. The distribution of the interplanar spacings d is obtained from a plurality of electron diffraction patterns of a plurality of regions of the metal oxide film. The electron diffraction is performed using an electron beam with a beam diameter of greater than or equal to 0.3 nm and less than or equal to 10 nm.
    Type: Application
    Filed: February 10, 2020
    Publication date: April 28, 2022
    Inventors: Toshimitsu OBONAI, Yasuharu HOSAKA, Kenichi OKAZAKI, Masahiro TAKAHASHI, Tomonori NAKAYAMA, Tomosato KANAGAWA, Shunpei YAMAZAKI
  • Patent number: 11316016
    Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: April 26, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Yukinori Shima, Junichi Koezuka, Kenichi Okazaki
  • Patent number: 11309181
    Abstract: To provide a sputtering apparatus capable of forming a semiconductor film in which impurities such as hydrogen or water are reduced. The sputtering apparatus is capable of forming a semiconductor film and includes a deposition chamber, a gas supply device connected to the deposition chamber, a gas refining device connected to the gas supply device, a vacuum pump for evacuating the deposition chamber, a target disposed in the deposition chamber, and a cathode disposed to face the target. The gas supply device is configured to supply at least one of an argon gas, an oxygen gas, and a nitrogen gas. The partial pressure of hydrogen molecules is lower than or equal to 0.01 Pa and the partial pressure of water molecules is lower than or equal to 0.0001 Pa in the deposition chamber.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: April 19, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiro Watanabe, Takuya Handa, Yasuharu Hosaka, Kenichi Okazaki, Shunpei Yamazaki
  • Patent number: 11296132
    Abstract: A peeling method at low cost with high mass productivity is provided. A resin layer having a thickness greater than or equal to 0.1 ?m and less than or equal to 3 ?m is formed over a formation substrate using a photosensitive and thermosetting material, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, the resin layer is irradiated with light using a linear laser device, and the transistor and the formation substrate are separated from each other. A first region and a second region which is thinner than the first region or an opening can be formed in the resin layer. In the case of forming a conductive layer functioning as an external connection terminal or the like to overlap with the second region or the opening of the resin layer, the conductive layer is exposed.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: April 5, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Satoru Idojiri, Kenichi Okazaki, Hiroki Adachi, Daisuke Kubota
  • Patent number: 11271098
    Abstract: To provide a semiconductor device with favorable electrical characteristics. To provide a method for manufacturing a semiconductor device with high productivity. To reduce the temperatures in a manufacturing process of a semiconductor device. An island-like oxide semiconductor layer is formed over a first insulating film; a second insulating film and a first conductive film are formed in this order, covering the oxide semiconductor layer; oxygen is supplied to the second insulating film through the first conductive film; a metal oxide film is formed over the second insulating film in an atmosphere containing oxygen; a first gate electrode is formed by processing the metal oxide film; a third insulating film is formed, covering the first gate electrode and the second insulating film; and first heat treatment is performed. The second insulating film and the third insulating film each include oxide. The highest temperature in the above steps is 340° C. or lower.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: March 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Takahiro Iguchi, Masami Jintyou, Takashi Hamochi, Junichi Koezuka
  • Publication number: 20220013667
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a metal oxide layer, a conductive layer, and an insulating region. The first insulating layer covers a top surface and a side surface of the semiconductor layer, and the conductive layer is positioned over the first insulating layer. The metal oxide layer is positioned between the first insulating layer and the conductive layer, and an end portion of the metal oxide layer is positioned on an inner side than an end portion of the conductive layer. The insulating region is positioned adjacent to the metal oxide layer and positioned between the first insulating layer and the conductive layer. Furthermore, the semiconductor layer includes a first region, a pair of second regions, and a pair of third regions.
    Type: Application
    Filed: October 21, 2019
    Publication date: January 13, 2022
    Inventors: Masataka NAKADA, Takahiro IGUCHI, Yasuharu HOSAKA, Takumi SHIGENOBU
  • Publication number: 20220013545
    Abstract: Provided is a semiconductor device with high capacitance while the aperture ratio is increased or a semiconductor device whose manufacturing cost is low. The semiconductor device includes a transistor, a first insulating film, and a capacitor including a second insulating film between a pair of electrodes. The transistor includes a gate electrode, a gate insulating film in contact with the gate electrode, a first oxide semiconductor film overlapping with the gate electrode, and a source electrode and a drain electrode electrically connected to the first oxide semiconductor film. One of the pair of electrodes of the capacitor includes a second oxide semiconductor film. The first insulating film is over the first oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is between the first insulating film and the second insulating film.
    Type: Application
    Filed: September 23, 2021
    Publication date: January 13, 2022
    Inventors: Kenichi OKAZAKI, Masami JINTYOU, Takahiro IGUCHI, Yasuharu HOSAKA, Junichi KOEZUKA, Hiroyuki MIYAKE, Shunpei YAMAZAKI
  • Patent number: 11209710
    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: December 28, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Yukinori Shima, Kenichi Okazaki, Shunpei Yamazaki
  • Publication number: 20210343843
    Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
    Type: Application
    Filed: July 8, 2021
    Publication date: November 4, 2021
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Toshimitsu Obonai, Yukinori Shima, Masami Jintyou, Daisuke Kurosaki, Takashi Hamochi, Junichi Koezuka, Kenichi Okazaki, Shunpei Yamazaki
  • Publication number: 20210278922
    Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.
    Type: Application
    Filed: May 11, 2021
    Publication date: September 9, 2021
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Masami JINTYOU, Yasuharu HOSAKA, Naoto GOTO, Takahiro IGUCHI, Daisuke KUROSAKI, Junichi KOEZUKA
  • Patent number: 11069796
    Abstract: A semiconductor layer containing a metal oxide is formed, a gate insulating layer containing an oxide is formed over the semiconductor layer, and a metal oxide layer is formed over the gate insulating layer. Heat treatment is performed after the metal oxide layer is formed, and the metal oxide layer is removed after the heat treatment is performed. After the metal oxide layer is removed, a gate electrode overlapping with part of the semiconductor layer is formed over the gate insulating layer. Then, a first element is supplied through the gate insulating layer to a region of the semiconductor layer that does not overlap with the gate electrode. Examples of the first element include phosphorus, boron, magnesium, aluminum, and silicon. The steps performed after the metal oxide layer is removed are each preferably performed at a temperature lower than or equal to the temperature of the heat treatment.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: July 20, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Kenichi Okazaki, Masataka Nakada, Yasuharu Hosaka