Patents by Inventor Yasuhiro Kimura

Yasuhiro Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240387201
    Abstract: Provided is a semiconductor manufacturing apparatus that is capable of, while holding one surface of the wafer, grinding the holding surface of a wafer. A semiconductor manufacturing apparatus includes a first main surface holding unit that comes into contact with a center portion of a first main surface of a wafer in plan view and holds the wafer, and a first grinding unit that rotates about a rotation axis that overlaps a center of the wafer in plan view and extends in a direction perpendicular to the first main surface, and that grinds an outer periphery that is a region surrounding the center portion of the first main surface in contact with the outer periphery of the first main surface.
    Type: Application
    Filed: March 28, 2024
    Publication date: November 21, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hirofumi OKI, Yasuhiro KIMURA, Shigehisa YAMAMOTO, Shinya AKAO
  • Publication number: 20240353351
    Abstract: A semiconductor inspection apparatus includes a defect detection unit and a control unit. The defect detection unit inspects a first main surface of a semiconductor wafer including an SiC crystal having the first main surface and a second main surface and inclined at an off angle in a predetermined direction to detect a first defect which is a crystal defect included in the first main surface, and inspects the second main surface to detect a second defect which is a crystal defect included in the second main surface. The control unit controls the defect detection unit to inspect an inspection region that is a partial region of the second main surface of the semiconductor wafer when the defect detection unit detects the second defect. The inspection region is determined based on the detected position of the first defect, and the thickness and the off angle of the semiconductor wafer.
    Type: Application
    Filed: February 1, 2024
    Publication date: October 24, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuyo NAKAMURA, Hirofumi OKI, Yasuhiro KIMURA, Shinichiro KATSUKI
  • Patent number: 10964785
    Abstract: The object of the present invention is to enhance the device yield of SiC epitaxial wafers. The SiC epitaxial wafer includes a drift layer which is a SiC epitaxial layer. The drift layer has a film thickness of 18 ?m or more and 350 ?m or less and has arithmetic average roughness of 0.60 nm or more and 3.00 nm or less, and the impurity concentration thereof is 1×1014/cm3 or more and 5×1015/cm3 or less.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: March 30, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yoichiro Mitani, Yasuhiro Kimura, Akihito Ono
  • Patent number: 10950435
    Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: March 16, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Akihito Ohno, Takuma Mizobe, Yasuhiro Kimura, Yoichiro Mitani
  • Patent number: 10910218
    Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: February 2, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Akihito Ohno, Takuma Mizobe, Yasuhiro Kimura, Yoichiro Mitani
  • Patent number: 10858757
    Abstract: An epitaxial substrate includes a single-crystal substrate of silicon carbide, and an epitaxial layer of silicon carbide disposed on the single-crystal substrate. The epitaxial layer includes a first epitaxial layer disposed on the single-crystal substrate, a second epitaxial layer disposed on the first epitaxial layer, and a third epitaxial layer disposed on the second epitaxial layer. The first epitaxial layer has a basal-plane-dislocation conversion rate of less than 95%. The second epitaxial layer has a basal-plane-dislocation conversion rate of more than 98%.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: December 8, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takanori Tanaka, Shigehisa Yamamoto, Yu Nakamura, Yasuhiro Kimura, Shuhei Nakata, Yoichiro Mitani
  • Patent number: 10837447
    Abstract: [Object] To efficiently supply lubricant oil to a bearing member with a simple mechanism. [Solving Means] A vacuum pump includes a first housing, a second housing, a rotor shaft, a lubricant oil-stirring plate, and a bearing member. The second housing is attached to the first housing and forms a space that stores lubricant oil together with the first housing. The rotor shaft passes through the first housing. The lubricant oil-stirring plate is housed in the space and is attached to the rotor shaft. The bearing member is fixed to the first housing and rotatably supports the rotor shaft. The first housing includes a supply port that enables lubricant oil to be supplied to the bearing member. The second housing includes an inner-wall upper portion which the lubricant oil stirred by the lubricant oil-stirring plate hits against. The inner-wall upper portion of the second housing includes a recess portion that enables the lubricant oil to move above the supply port.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: November 17, 2020
    Assignee: ULVAC, INC.
    Inventors: Yasuhiro Kimura, Shinnosuke Tokuhira, Hideaki Inoue, Kenji Machiya
  • Publication number: 20200271120
    Abstract: A vacuum pump according to an embodiment of the present invention includes a pump main body, a first temperature sensor, a motor, and a control unit. The pump main body includes a rotary shaft and a metal casing portion. The first temperature sensor is attached to the casing portion and detects a temperature of the casing portion. The motor includes a rotor core including a permanent magnet and attached to the rotary shaft, a stator core including a plurality of coils, and a can that houses the rotor core. The control unit includes a driving circuit and a correcting circuit. The driving circuit supplies the plurality of coils with a driving signal for rotating the motor on a basis of a pre-set induced voltage constant. The correcting circuit corrects the induced voltage constant on a basis of an output of the first temperature sensor.
    Type: Application
    Filed: June 20, 2018
    Publication date: August 27, 2020
    Inventors: Yasuhiro KIMURA, Kenji MACHIYA, Shinnosuke TOKUHIRA, Hideaki INOUE
  • Publication number: 20200240412
    Abstract: [Object] To efficiently supply lubricant oil to a bearing member with a simple mechanism. [Solving Means] A vacuum pump includes a first housing, a second housing, a rotor shaft, a lubricant oil-stirring plate, and a bearing member. The second housing is attached to the first housing and forms a space that stores lubricant oil together with the first housing. The rotor shaft passes through the first housing. The lubricant oil-stirring plate is housed in the space and is attached to the rotor shaft. The bearing member is fixed to the first housing and rotatably supports the rotor shaft. The first housing includes a supply port that enables lubricant oil to be supplied to the bearing member. The second housing includes an inner-wall upper portion which the lubricant oil stirred by the lubricant oil-stirring plate hits against. The inner-wall upper portion of the second housing includes a recess portion that enables the lubricant oil to move above the supply port.
    Type: Application
    Filed: May 30, 2018
    Publication date: July 30, 2020
    Inventors: Yasuhiro KIMURA, Shinnosuke TOKUHIRA, Hideaki INOUE, Kenji MACHIYA
  • Patent number: 10707075
    Abstract: A semiconductor wafer includes a silicon carbide substrate having a first carrier concentration, a carrier concentration transition layer, and an epitaxial layer provided on the carrier concentration transition layer, the epitaxial layer having a second carrier concentration, and the second carrier concentration being lower than the first carrier concentration. The carrier concentration transition layer has a concentration gradient in the thickness direction. The carrier concentration decreases as the film thickness increases from an interface between a layer directly below the carrier concentration transition layer and the carrier concentration transition layer, and the carrier concentration decreases at a lower rate of decrease as the film thickness of the carrier concentration transition layer increases.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: July 7, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Akihito Ohno, Takuma Mizobe, Masashi Sakai, Yasuhiro Kimura, Yoichiro Mitani, Takashi Kanazawa
  • Publication number: 20200144053
    Abstract: A semiconductor wafer includes a silicon carbide substrate having a first carrier concentration, a carrier concentration transition layer, and an epitaxial layer provided on the carrier concentration transition layer, the epitaxial layer having a second carrier concentration, and the second carrier concentration being lower than the first carrier concentration. The carrier concentration transition layer has a concentration gradient in the thickness direction. The carrier concentration decreases as the film thickness increases from an interface between a layer directly below the carrier concentration transition layer and the carrier concentration transition layer, and the carrier concentration decreases at a lower rate of decrease as the film thickness of the carrier concentration transition layer increases.
    Type: Application
    Filed: November 28, 2016
    Publication date: May 7, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi HAMANO, Akihito OHNO, Takuma MIZOBE, Masashi SAKAI, Yasuhiro KIMURA, Yoichiro MITANI, Takashi KANAZAWA
  • Publication number: 20200066847
    Abstract: The object of the present invention is to enhance the device yield of SiC epitaxial wafers. The SiC epitaxial wafer includes a drift layer which is a SiC epitaxial layer. The drift layer has a film thickness of 18 ?m or more and 350 ?m or less and has arithmetic average roughness of 0.60 nm or more and 3.00 nm or less, and the impurity concentration thereof is 1×1014/cm3 or more and 5×1015/cm3 or less.
    Type: Application
    Filed: January 18, 2018
    Publication date: February 27, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoichiro MITANI, Yasuhiro KIMURA, Akihito ONO
  • Patent number: 10559508
    Abstract: A method for manufacturing an SiC substrate includes: performing a CMP treatment on an SiC substrate; after the CMP treatment, capturing an image of a surface of the SiC substrate to detect a scratch; determining the SiC substrate as a good article when a length L of the scratch having a contrast value equal to or larger than a threshold value is not more than ?(D/2)2/A×F/100, wherein the scratch having the contrast value equal to or larger than the threshold value in the image serves as a starting point of an epitaxial defect, a diameter of the SiC substrate is represented by D, a length of a long side of a device chip to be formed on the SiC substrate is represented by A, and an allowable defective rate caused by scratches is represented by F.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: February 11, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Yasuhiro Kimura
  • Publication number: 20200020528
    Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.
    Type: Application
    Filed: April 6, 2017
    Publication date: January 16, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi HAMANO, Akihito OHNO, Takuma MIZOBE, Yasuhiro KIMURA, Yoichiro MITANI
  • Publication number: 20190355629
    Abstract: A method for manufacturing an SiC substrate includes: performing a CMP treatment on an SiC substrate; after the CMP treatment, capturing an image of a surface of the SiC substrate to detect a scratch; determining the SiC substrate as a good article when a length L of the scratch having a contrast value equal to or larger than a threshold value is not more than ?(D/2)2/A×F/100, wherein the scratch having the contrast value equal to or larger than the threshold value in the image serves as a starting point of an epitaxial defect, a diameter of the SiC substrate is represented by D, a length of a long side of a device chip to be formed on the SiC substrate is represented by A, and an allowable defective rate caused by scratches is represented by F.
    Type: Application
    Filed: December 4, 2018
    Publication date: November 21, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventor: Yasuhiro Kimura
  • Publication number: 20190145021
    Abstract: An epitaxial substrate includes a single-crystal substrate of silicon carbide, and an epitaxial layer of silicon carbide disposed on the single-crystal substrate. The epitaxial layer includes a first epitaxial layer disposed on the single-crystal substrate, a second epitaxial layer disposed on the first epitaxial layer, and a third epitaxial layer disposed on the second epitaxial layer. The first epitaxial layer has a basal-plane-dislocation conversion rate of less than 95%. The second epitaxial layer has a basal-plane-dislocation conversion rate of more than 98%.
    Type: Application
    Filed: May 9, 2017
    Publication date: May 16, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takanori TANAKA, Shigehisa YAMAMOTO, Yu NAKAMURA, Yasuhiro KIMURA, Shuhei NAKATA, Yoichiro MITANI
  • Publication number: 20170040166
    Abstract: A manufacturing method for manufacturing a silicon carbide epitaxial wafer includes: introducing a cleaning gas into a growth furnace to remove dendrite-like polycrystal of silicon carbide attached to an inner wall of the growth furnace; after introducing the cleaning gas, bringing a silicon carbide substrate in the growth furnace; and growing a silicon carbide epitaxial layer on the silicon carbide substrate by introducing a processing gas into the growth furnace to manufacture a silicon carbide epitaxial wafer, wherein the cleaning gas having fluid energy of 1.6E?4 [J] or higher is introduced into the growth furnace.
    Type: Application
    Filed: April 5, 2016
    Publication date: February 9, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akihito OHNO, Masashi SAKAI, Yoichiro MITANI, Takahiro YAMAMOTO, Yasuhiro KIMURA, Takuma MIZOBE, Nobuyuki TOMITA
  • Patent number: 9564315
    Abstract: A manufacturing method for manufacturing a silicon carbide epitaxial wafer includes: introducing a cleaning gas into a growth furnace to remove dendrite-like polycrystal of silicon carbide attached to an inner wall of the growth furnace; after introducing the cleaning gas, bringing a silicon carbide substrate in the growth furnace; and growing a silicon carbide epitaxial layer on the silicon carbide substrate by introducing a processing gas into the growth furnace to manufacture a silicon carbide epitaxial wafer, wherein the cleaning gas having fluid energy of 1.6E-4 [J] or higher is introduced into the growth furnace.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: February 7, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Masashi Sakai, Yoichiro Mitani, Takahiro Yamamoto, Yasuhiro Kimura, Takuma Mizobe, Nobuyuki Tomita
  • Patent number: 8549388
    Abstract: According to one embodiment, a controller controls writing into and reading from a storage apparatus that includes a first data-storage unit and a second data-storage unit. The second data-storage unit stores user data and parity data of the user data. The first data-storage unit stores the parity data. The controller includes a parity updating unit and a parity writing unit. When parity data is updated, the parity updating unit writes the updated parity data into the first data-storage unit. When a certain requirement is satisfied, the parity writing unit reads the parity data written in the first data-storage unit, and writes the parity data thus read into the second data-storage unit.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: October 1, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Fukutomi, Hiroshi Yao, Shinichi Kanno, Shigehiro Asano, Toshikatsu Hida, Yasuhiro Kimura
  • Patent number: 8463986
    Abstract: A plurality of free-block management lists for respectively managing a logical block with a same bank number, a same chip number, and a same plane number as a free block, and a free block selecting unit that selects a required number of free-block management lists from the free-block management lists to obtain a free block from the selected free-block management lists are provided.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Yamazaki, Yasuhiro Kimura, Hiroshi Yao