Patents by Inventor Yasuo Koike
Yasuo Koike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10049049Abstract: A disclosed information processing method is executed in a distributed processing system that processes data by plural information processing apparatuses. And the information processing method includes: obtaining, by a first information processing apparatus of the plural information processing apparatuses and from a second information processing apparatus that manages relations among data, identification information of first data that has a predetermined relation with second data and identification information of an information processing apparatus that manages the first data, upon detecting access to the second data managed by the first information processing apparatus; reading out, by the first information processing apparatus, the first data, upon determining that the information processing apparatus that manages the first data corresponds to the first information processing apparatus; and loading, by the first information processing apparatus, the first data into a cache.Type: GrantFiled: September 21, 2015Date of Patent: August 14, 2018Assignee: FUJITSU LIMITEDInventors: Yasuo Koike, Kazuhisa Fujita, Toshiyuki Maeda, Tadahiro Miyaji, Tomonori Furuta, Fumiaki Itou
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Publication number: 20180197751Abstract: An epitaxial silicon wafer includes a silicon wafer consisting of a COP region in which a nitrogen concentration is 1×108?3×109 atoms/cm3, and an epitaxial silicon film formed on the silicon wafer. When heat treatment for evaluation is applied, a density of BMD formed inside the silicon wafer is 1×108?3×109 atoms/cm3 over the entire radial direction of the silicon wafer. An average density of the BMD formed in an outer peripheral region of the silicon wafer which is a 1-10 mm range separated inward from an outermost periphery thereof is lower than the average density of the BMD formed in a center region. A variation in the BMD density in the outer peripheral region is 3 or less, and a residual oxygen concentration in the outer peripheral region is 8×1017 atoms/cm3 or more.Type: ApplicationFiled: January 6, 2017Publication date: July 12, 2018Applicant: SUMCO CORPORATIONInventors: Yasuo KOIKE, Tomokazu KATANO, Toshiaki ONO
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Patent number: 10020203Abstract: An epitaxial silicon wafer includes a silicon wafer consisting of a COP region in which a nitrogen concentration is 1×1012?1×1013 atoms/cm3, and an epitaxial silicon film formed on the silicon wafer. When heat treatment for evaluation is applied, a density of BMD formed inside the silicon wafer is 1×108?3×109 atoms/cm3 over the entire radial direction of the silicon wafer. An average density of the BMD formed in an outer peripheral region of the silicon wafer which is a 1-10 mm range separated inward from an outermost periphery thereof is lower than the average density of the BMD formed in a center region. A variation in the BMD density in the outer peripheral region is 3 or less, and a residual oxygen concentration in the outer peripheral region is 8×1017 atoms/cm3 or more.Type: GrantFiled: January 6, 2017Date of Patent: July 10, 2018Assignee: SUMCO CORPORATIONInventors: Yasuo Koike, Tomokazu Katano, Toshiaki Ono
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Patent number: 9483523Abstract: An information processing apparatus includes a receiving unit that receives an access request for data from one of a plurality of information processing apparatuses in a distributed processing system in which the information processing apparatuses execute a process in a distributed manner, a query issuing unit that issues, when the access request for the data is received by the receiving unit, a query to each of the information processing apparatuses as to whether the data is stored in a page cache managed by an operating system on each of the information processing apparatuses, and a responding unit that makes a response to the access request, the response specifying, as an access destination, an information processing apparatus that has responded to the query issued by the query issuing unit.Type: GrantFiled: January 14, 2013Date of Patent: November 1, 2016Assignee: FUJITSU LIMITEDInventors: Akira Ochi, Yasuo Koike, Toshiyuki Maeda, Tomonori Furuta, Fumiaki Itou, Tadahiro Miyaji, Kazuhisa Fujita
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Patent number: 9460150Abstract: An information processing apparatus includes a receiving unit that receives an access request for data from one of a plurality of information processing apparatuses in a distributed processing system in which the information processing apparatuses execute a process in a distributed manner, a query issuing unit that issues, when the access request for the data is received by the receiving unit, a query to each of the information processing apparatuses as to whether the data is stored in a page cache managed by an operating system on each of the information processing apparatuses, and a responding unit that makes a response to the access request, the response specifying, as an access destination, an information processing apparatus that has responded to the query issued by the query issuing unit.Type: GrantFiled: January 14, 2013Date of Patent: October 4, 2016Assignee: FUJITSU LIMITEDInventors: Akira Ochi, Yasuo Koike, Toshiyuki Maeda, Tomonori Furuta, Fumiaki Itou, Tadahiro Miyaji, Kazuhisa Fujita
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Publication number: 20160179432Abstract: Each of a plurality of, as many as three or more, processes is executed by one of a first virtual machine and a second virtual machine, and each of the first and second virtual machines executes at least one of the processes. At the execution of each of the processes, a virtual memory unit corresponding to the process is referred to. Based on ranks each assigned in advance to one of the processes, a processor changes an assignment destination of a physical memory area currently assigned to each of virtual memory units, except for a virtual memory unit corresponding to a last-rank process, to a virtual memory unit corresponding to a next-rank process following a process corresponding to a virtual memory unit to which the physical memory area is currently assigned.Type: ApplicationFiled: November 4, 2015Publication date: June 23, 2016Applicant: FUJITSU LIMITEDInventors: Hideyuki Niwa, Yasuo Koike, Kazuhisa Fujita, TOSHIYUKI MAEDA, Tadahiro Miyaji, Tomonori Furuta, Fumiaki ITOU, Isao Nunoichi
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Patent number: 9319245Abstract: An information processing device having any of hash values associated with a hash space based on distribution hash information. The device acquires access information to an information processing device as a target, the access information being transmitted from another information processing device on the basis of first distribution hash information using the hash value in the hash space between first devices belonging to one of groups divided according to a sequence in terms of the magnitudes of the hash values associated with the hash space, stores second distribution hash information using the hash value in the hash space pertaining to a second device belonging to the group to which the first device belongs, searches second distribution hash information for a second device corresponding to the hash value generated from the access information, and transmits access information to the retrieved second device by the searching.Type: GrantFiled: December 13, 2013Date of Patent: April 19, 2016Assignee: FUJITSU LIMITEDInventors: Yasuo Koike, Kazuhisa Fujita, Toshiyuki Maeda, Akira Ochi
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Publication number: 20160011980Abstract: A disclosed information processing method is executed in a distributed processing system that processes data by plural information processing apparatuses. And the information processing method includes: obtaining, by a first information processing apparatus of the plural information processing apparatuses and from a second information processing apparatus that manages relations among data, identification information of first data that has a predetermined relation with second data and identification information of an information processing apparatus that manages the first data, upon detecting access to the second data managed by the first information processing apparatus; reading out, by the first information processing apparatus, the first data, upon determining that the information processing apparatus that manages the first data corresponds to the first information processing apparatus; and loading, by the first information processing apparatus, the first data into a cache.Type: ApplicationFiled: September 21, 2015Publication date: January 14, 2016Applicant: FUJITSU LIMITEDInventors: Yasuo KOIKE, Kazuhisa FUJITA, Toshiyuki MAEDA, Tadahiro MIYAJI, Tomonori FURUTA, Fumiaki ITOU
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Patent number: 9197715Abstract: An information processing apparatus includes a memory; and a processor to execute a process including: adding an identifier based on a reception order to an access request indicating a transmission request or a reception request of a block of data received from a client terminal; retrieving, from among information processing apparatus which is included in a distribution-type network which distributes transmitting and receiving processing of a data, an information of the information processing apparatus which processes an access request added with the identifier which is scheduled to be added; storing, in the memory, the information of the information processing apparatus in association with the identifier which is scheduled to be added; and replying the information, which is stored in association with the identifier in the memory when the identifier is added to an access request, to the client terminal.Type: GrantFiled: December 13, 2012Date of Patent: November 24, 2015Assignee: FUJITSU LIMITEDInventors: Yasuo Koike, Daisuke Shimabayashi, Shinji Yamabiraki
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Patent number: 9021208Abstract: An information processing device includes a memory and a processor coupled to the memory, wherein the processor executes a process comprising selecting data included in a same file as deletion target data from the memory when deleting the data cached in the memory at the caching from the memory and deleting the deletion target data and the data selected at the selecting, from the memory.Type: GrantFiled: January 25, 2013Date of Patent: April 28, 2015Assignee: Fujitsu LimitedInventors: Akira Ochi, Yasuo Koike, Toshiyuki Maeda, Tomonori Furuta, Fumiaki Itou, Tadahiro Miyaji, Kazuhisa Fujita
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Patent number: 8920560Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.Type: GrantFiled: November 2, 2007Date of Patent: December 30, 2014Assignee: Sumco CorporationInventors: Yasuo Koike, Toshiaki Ono, Naoki Ikeda, Tomokazu Katano
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Publication number: 20140188833Abstract: An information processing device having any of hash values associated with a hash space based on distribution hash information. The device acquires access information to an information processing device as a target, the access information being transmitted from another information processing device on the basis of first distribution hash information using the hash value in the hash space between first devices belonging to one of groups divided according to a sequence in terms of the magnitudes of the hash values associated with the hash space, stores second distribution hash information using the hash value in the hash space pertaining to a second device belonging to the group to which the first device belongs, searches second distribution hash information for a second device corresponding to the hash value generated from the access information, and transmits access information to the retrieved second device by the searching.Type: ApplicationFiled: December 13, 2013Publication date: July 3, 2014Applicant: FUJITSU LIMITEDInventors: Yasuo KOIKE, Kazuhisa FUJITA, Toshiyuki MAEDA, Akira OCHI
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Patent number: 8601901Abstract: To realize a practical structure capable of increasing the number of frictional engagement sections between members that are relatively displaced in response to adjustment of a front-rear position of a steering wheel, in a portion of a front end section of an outer column 11b that opposes to an intermediate section of an adjustment bolt 17a, there is formed a slit 33 that is long in the axial direction of this outer column 11b, and in a portion of the intermediate section of the adjustment bolt 17a that opposes to this outer column 11b, there is provided a pressing member 37, this pressing member 37 pressing the outer circumferential surface of the outer column 11b radially inward, with the rotation of the adjustment bolt 17a, and when fixing the front-rear position, with the rotation of the adjustment bolt 17a, a pair of supporting plate sections 23, which constitute a nipping (fixed) bracket 22a, nipping a nipped (movable) bracket 24a, and at the same time, the pressing member 37 bringing the inner circumfeType: GrantFiled: June 5, 2009Date of Patent: December 10, 2013Assignee: NSK Ltd.Inventors: Toru Ishii, Yasuo Koike
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Patent number: 8411263Abstract: A method of evaluating a silicon wafer includes obtaining first surface distribution information indicating an surface distribution of photoluminescence intensity on a surface of a silicon wafer; after obtaining the first surface distribution information, subjecting the silicon wafer to a thermal oxidation treatment, and then obtaining second surface distribution information indicating an surface distribution of photoluminescence intensity on the surface of the silicon wafer; obtaining difference information for the first surface distribution information and third surface distribution information, with the third surface distribution information having been obtained by correcting the second surface distribution information with a correction coefficient of less than 1; and based on the difference information obtained, evaluating an evaluation item selected from the group consisting of absence or presence of oxygen precipitates and surface distribution of oxygen precipitates in the silicon wafer being evaluated.Type: GrantFiled: April 30, 2012Date of Patent: April 2, 2013Assignee: Sumco CorporationInventors: Shin Uchino, Masataka Hourai, Yasuo Koike, Ryuji Ohno
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Publication number: 20120293793Abstract: A method of evaluating a silicon wafer includes obtaining first surface distribution information indicating an surface distribution of photoluminescence intensity on a surface of a silicon wafer; after obtaining the first surface distribution information, subjecting the silicon wafer to a thermal oxidation treatment, and then obtaining second surface distribution information indicating an surface distribution of photoluminescence intensity on the surface of the silicon wafer; obtaining difference information for the first surface distribution information and third surface distribution information, with the third surface distribution information having been obtained by correcting the second surface distribution information with a correction coefficient of less than 1; and based on the difference information obtained, evaluating an evaluation item selected from the group consisting of absence or presence of oxygen precipitates and surface distribution of oxygen precipitates in the silicon wafer being evaluated.Type: ApplicationFiled: April 30, 2012Publication date: November 22, 2012Applicant: SUMCO CORPORATIONInventors: Shin UCHINO, Masataka HOURAI, Yasuo KOIKE, Ryuji OHNO
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Patent number: 8231852Abstract: It is possible to provide a silicon wafer that as well as being free of COPs and dislocation clusters, has defects (grown-in defects including silicon oxides), which are not overt in an as-grown state, such as OSF nuclei and oxygen precipitate nuclei existing in the PV region, to be vanished or reduced, by adopting a method for producing a silicon wafer, the method comprising the steps of: growing a single crystal silicon ingot by the Czochralski method; cutting a silicon wafer out of the ingot; subjecting the wafer to an RTP at 1,250° C. or more for 10 seconds or more in an oxidizing atmosphere; and removing a grown-in defect region including silicon oxides in the vicinity of wafer surface layer after the RTP.Type: GrantFiled: May 14, 2010Date of Patent: July 31, 2012Assignee: Sumco CorporationInventors: Wataru Itou, Takashi Nakayama, Shigeru Umeno, Hiroaki Taguchi, Yasuo Koike
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Publication number: 20120191645Abstract: An information processing apparatus includes an execution response unit that executes an operation command and sends results of the execution to a process execution apparatus, a first result update unit that, upon receiving a determination command when the information processing apparatus is operating normally, updates the information processing apparatus with the results of the execution sent by the execution response unit and that transmits the results of the execution to copy apparatuses, a second result update unit that, upon receiving the determination command when operation of the information processing apparatus is abnormal, transmits an abnormality notification to the copy apparatuses, and a determination transmission unit that, upon being notified of the update using the results of the execution from the copy apparatuses that have received the results of the execution transmitted from the first result update unit, notifies the process execution apparatus of the determination of the operation command.Type: ApplicationFiled: December 20, 2011Publication date: July 26, 2012Applicant: FUJITSU LIMITEDInventors: Yasuo Koike, Daisuke Shimabayashi, Kenji Iino
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Patent number: 8201017Abstract: According to an aspect of the embodiment, a message queuing unit of the message processing apparatus stores received messages. A message reception control unit receives a notification of destinations of messages, extracts only the messages for current processes based on a process control table recording current or standby of processes, and transmits the messages to corresponding applications as current processes. On the other hand, the message reception control unit does not transmit the messages to the applications as standby processes.Type: GrantFiled: June 29, 2009Date of Patent: June 12, 2012Assignee: Fujitsu LimitedInventors: Yasuo Koike, Tamaki Tanaka, Shoji Yamamoto
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Patent number: 7846253Abstract: The present invention can provide a silicon semiconductor substrate used for and epitaxial wafer, in which uniform and high-level gettering ability is obtained irrespective of slicing positions from a silicon single crystal while generation of epitaxial defects can be suppressed, by doping carbon or carbon along with nitrogen during a pulling process of a CZ method or by performing appropriate heat treatment prior to the epitaxial process. Therefore, a crystal production yield can remarkably be improved because a permissible upper limit (concentration margin) of an oxygen concentration which is restricted by formation of a ring-shaped OSF region can be higher and also an excellent gettering ability is exhibited, while allowing an epitaxial wafer to be produced wherein epitaxial defects attributable to substrate crystal defects are not formed.Type: GrantFiled: October 26, 2007Date of Patent: December 7, 2010Assignee: Sumco CorporationInventor: Yasuo Koike
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Publication number: 20100294072Abstract: To realize a practical structure capable of increasing the number of frictional engagement sections between members that are relatively displaced in response to adjustment of a front-rear position of a steering wheel, in a portion of a front end section of an outer column 11b that opposes to an intermediate section of an adjustment bolt 17a, there is formed a slit 33 that is long in the axial direction of this outer column 11b, and in a portion of the intermediate section of the adjustment bolt 17a that opposes to this outer column 11b, there is provided a pressing member 37, this pressing member 37 pressing the outer circumferential surface of the outer column 11b radially inward, with the rotation of the adjustment bolt 17a, and when fixing the front-rear position, with the rotation of the adjustment bolt 17a, a pair of supporting plate sections 23, which constitute a nipping (fixed) bracket 22a, nipping a nipped (movable) bracket 24a, and at the same time, the pressing member 37 bringing the inner circumfeType: ApplicationFiled: June 5, 2009Publication date: November 25, 2010Applicant: NSK Ltd.Inventors: Toru Ishii, Yasuo Koike