Patents by Inventor Yasuo Koike

Yasuo Koike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100290971
    Abstract: It is possible to provide a silicon wafer that as well as being free of COPs and dislocation clusters, has defects (grown-in defects including silicon oxides), which are not overt in an as-grown state, such as OSF nuclei and oxygen precipitate nuclei existing in the PV region, to be vanished or reduced, by adopting a method for producing a silicon wafer, the method comprising the steps of: growing a single crystal silicon ingot by the Czochralski method; cutting a silicon wafer out of the ingot; subjecting the wafer to an RTP at 1,250° C. or more for 10 seconds or more in an oxidizing atmosphere; and removing a grown-in defect region including silicon oxides in the vicinity of wafer surface layer after the RTP.
    Type: Application
    Filed: May 14, 2010
    Publication date: November 18, 2010
    Inventors: Wataru Itou, Takashi Nakayama, Shigeru Umeno, Hiroaki Taguchi, Yasuo Koike
  • Patent number: 7740702
    Abstract: A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11×1017-17×1017 atoms/cm3 (OLD ASTM) and within a range of 1×1016-15×1016 atoms/cm3 (NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1×104-5×106 counts/cm2, when a heat treatment is carried out at a temperature of 500-1000° C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100° C.-1380° C. for 1 to 10 hours.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: June 22, 2010
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventor: Yasuo Koike
  • Publication number: 20100083031
    Abstract: According to an aspect of the embodiment, a message queuing unit of the message processing apparatus stores received messages. A message reception control unit receives a notification of destinations of messages, extracts only the messages for current processes based on a process control table recording current or standby of processes, and transmits the messages to corresponding applications as current processes. On the other hand, the message reception control unit does not transmit the messages to the applications as standby processes.
    Type: Application
    Filed: June 29, 2009
    Publication date: April 1, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Yasuo Koike, Tamaki Tanaka, Shoji Yamamoto
  • Publication number: 20090282420
    Abstract: When a message is transmitted from a storing application of a process requesting server, a message queuing server stores the message in a queue. When storing the message in the queue, the message queuing server transmits information regarding this message to an extracting application of a process performing server, thereby controlling a linkage operation between the storing application of the process requesting server and the extracting application of the process performing server.
    Type: Application
    Filed: July 20, 2009
    Publication date: November 12, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Kazuhisa Fujita, Shoji Yamamoto, Yasuo Koike, Tamaki Tanaka, Kazuya Uesugi
  • Patent number: 7582357
    Abstract: The present invention can provide a silicon semiconductor substrate used for and epitaxial wafer, in which uniform and high-level gettering ability is obtained irrespective of slicing positions from a silicon single crystal while generation of epitaxial defects can be suppressed, by doping carbon or carbon along with nitrogen during a pulling process of a CZ method or by performing appropriate heat treatment prior to the epitaxial process. Therefore, a crystal production yield can remarkably be improved because a permissible upper limit (concentration margin) of an oxygen concentration which is restricted by formation of a ring-shaped OSF region can be higher and also an excellent gettering ability is exhibited, while allowing an epitaxial wafer to be produced wherein epitaxial defects attributable to substrate crystal defects are not formed.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: September 1, 2009
    Assignee: Sumco Corporation
    Inventor: Yasuo Koike
  • Publication number: 20080286565
    Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.
    Type: Application
    Filed: November 2, 2007
    Publication date: November 20, 2008
    Inventors: Yasuo Koike, Toshiaki Ono, Naoki Ikeda, Tomokazu Katano
  • Publication number: 20080108207
    Abstract: The present invention can provide a silicon semiconductor substrate used for and epitaxial wafer, in which uniform and high-level gettering ability is obtained irrespective of slicing positions from a silicon single crystal while generation of epitaxial defects can be suppressed, by doping carbon or carbon along with nitrogen during a pulling process of a CZ method or by performing appropriate heat treatment prior to the epitaxial process. Therefore, a crystal production yield can remarkably be improved because a permissible upper limit (concentration margin) of an oxygen concentration which is restricted by formation of a ring-shaped OSF region can be higher and also an excellent gettering ability is exhibited, while allowing an epitaxial wafer to be produced wherein epitaxial defects attributable to substrate crystal defects are not formed.
    Type: Application
    Filed: October 26, 2007
    Publication date: May 8, 2008
    Inventor: Yasuo Koike
  • Publication number: 20070101925
    Abstract: A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11×1017-17×1017 atoms/cm3 (OLD ASTM) and within a range of 1×1016-15×1016 atoms/cm3 (NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1×104-5×106 counts/cm2, when a heat treatment is carried out at a temperature of 500-1000° C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100° C-1380° C for 1 to 10 hours.
    Type: Application
    Filed: December 22, 2006
    Publication date: May 10, 2007
    Inventor: Yasuo Koike
  • Publication number: 20070089666
    Abstract: The present invention can provide a silicon semiconductor substrate used for and epitaxial wafer, in which uniform and high-level gettering ability is obtained irrespective of slicing positions from a silicon single crystal while generation of epitaxial defects can be suppressed, by doping carbon or carbon along with nitrogen during a pulling process of a CZ method or by performing appropriate heat treatment prior to the epitaxial process. Therefore, a crystal production yield can remarkably be improved because a permissible upper limit (concentration margin) of an oxygen concentration which is restricted by formation of a ring-shaped OSF region can be higher and also an excellent gettering ability is exhibited, while allowing an epitaxial wafer to be produced wherein epitaxial defects attributable to substrate crystal defects are not formed.
    Type: Application
    Filed: October 20, 2006
    Publication date: April 26, 2007
    Inventor: Yasuo Koike
  • Publication number: 20070068311
    Abstract: There is provided a steering apparatus having a vehicle-body-mounted bracket mountable in a vehicle body, a steering shaft to which a steering wheel is attached, a column which is supported by the vehicle-body-mounted bracket so that a tilt position thereof is adjustable, rotatably supports the steering shaft and a clamp unit that clamps the column to the vehicle-body-mounted bracket through a tilt friction plate at a desired tilt position and a connection member connecting the tilt friction plate with the vehicle-body-mounted bracket. When an impact force, whose magnitude is equal to or more than a predetermined value, acts at a collision, connection of the tilt friction plate to the vehicle-body-mounted bracket is canceled, so that the column moves together with the tilt friction plate in a tilt direction relative to the vehicle-body-mounted bracket.
    Type: Application
    Filed: September 7, 2006
    Publication date: March 29, 2007
    Inventors: Mitsuo Shimoda, Tomoyuki Tsunoda, Yasuo Koike
  • Patent number: 7160385
    Abstract: A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11×1017–17×1017 atoms/cm3 (OLD ASTM) and within a range of 1×1016–15×1016 atoms/cm3 (NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1×104–5×106 counts/cm2, when a heat treatment is carried out at a temperature of 500–1000° C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100° C.–1380° C. for 1 to 10 hours.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: January 9, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventor: Yasuo Koike
  • Patent number: 6853426
    Abstract: The present invention materializes a liquid-crystal display element and a liquid-crystal display device which promise superior display performance, in which the surface of an alignment film formed on a substrate member has been subjected to rubbing in the state the surface potential of a rubbing roller has been controlled by bringing a charge control member made to have the same potential as the potential of the substrate member into contact with the rubbing roller, to keep any foreign matter from adhering to the alignment film surface.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: February 8, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Koike, Hayami Tabira, Takashi Inoue, Hirotaka Imayama, Masateru Morimoto
  • Publication number: 20040166684
    Abstract: A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11×1017-17×1017 atoms/cm3 (OLD ASTM) and within a range of 1×1016-15×1016 atoms/cm3 (NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1×104-5×106 counts/cm2, when a heat treatment is carried out at a temperature of 500-1000° C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100° C.-1380° C. for 1 to 10 hours.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 26, 2004
    Inventor: Yasuo Koike
  • Patent number: 6753048
    Abstract: A material for a liquid-crystal alignment film which comprises as a first polyamide a C3 to C10 alkyl ester of a polyamic acid whose acid anhydride residual group is any of: and as a second polyamide a C3 to C10 alkyl ester of a polyamic acid whose acid anhydride residual group is: is provided. The use of this material materializes a liquid-crystal alignment film having a high pre-tilt angle of molecules to the substrate, and having superiority in respect of electrical properties such as voltage holding ratio and residual DC voltage, adherence to substrates, printability, and step-covering properties.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: June 22, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Nobuhito Katsumura, Haruhiko Kikawa, Takashi Inoue, Masahiro Yamada, Yasuo Koike, Nobuhiko Fukuoka, Hiromu Terao
  • Patent number: 6720040
    Abstract: A material for a liquid-crystal alignment film which comprises as a first polyamide a C3 to C10 alkyl ester of a polyamic acid whose acid anhydride residual group is any of: and as a second polyamide a C3 to C10 alkyl ester of a polyamic acid whose acid anhydride residual group is: is provided. The use of this material materializes a liquid-crystal alignment film having a high pre-tilt angle of molecules to the substrate, and having superiority in respect of electrical properties such as voltage holding ratio and residual DC voltage, adherence to substrates, printability, and step-covering properties.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: April 13, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Nobuhito Katsumura, Haruhiko Kikawa, Takashi Inoue, Masahiro Yamada, Yasuo Koike, Nobuhiko Fukuoka, Hiromu Terao
  • Patent number: 6709957
    Abstract: The invention relates to a method of producing epitaxial wafers for the manufacture of high integration density devices capable of showing stable gettering effect. Specifically, it provides (1) a method of producing epitaxial wafers which comprises subjecting a silicon wafer sliced from a single crystal ingot grown by doping with not less than 1×1013 atoms/cm3 of nitrogen to 15 minutes to 4 hours of heat treatment at a temperature not lower than 700° C. but lower than 900° C. and then to epitaxial growth treatment. It is desirable that the above single crystal ingot have an oxygen concentration of not less than 11×1017 atoms/cm3. Further, (2) the above heat treatment is desirably carried out prior to the step of mirror polishing of silicon wafers. Furthermore, (3) it is desirable that the pulling rate be not increased in starting tail formation as compared with the pulling rate of the body in growing the above single crystal ingot.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: March 23, 2004
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Eiichi Asayama, Yasuo Koike, Tadami Tanaka, Toshiaki Ono, Masataka Horai, Hideshi Nishikawa
  • Patent number: 6641888
    Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016−5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer. The present invention provides an epitaxial wafer for a large-scale integrated device having no defects in a device-active region and having an excellent gettering effect without performance of an extrinsic or intrinsic gettering treatment.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: November 4, 2003
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Eiichi Asayama, Masataka Horai, Shigeru Umeno, Shinsuke Sadamitsu, Yasuo Koike, Kouji Sueoka, Hisashi Katahama
  • Patent number: 6599816
    Abstract: A method is designed to manufacture a silicon epitaxial wafer exhibiting sufficient gettering capability from the initial stage of the device process. Specifically, the method is to manufacture the silicon wafer with a nitrogen concentration of at least 1×1012 atoms/cm3 and an oxygen concentration of 10˜18×1017 atoms/cm3 by annealing at a temperature of 800˜1,100° C. after epitaxial growth treatment, satisfying the following equation (a), t≧33−((T−800)/100)  (a) wherein T(° C.) is temperature, and t(hr) is time, thereby manufacturing a high yield semiconductor device.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: July 29, 2003
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Kouji Sueoka, Masanori Akatsuka, Yasuo Koike
  • Publication number: 20030108686
    Abstract: A material for a liquid-crystal alignment film which comprises as a first polyamide a C3 to C10 alkyl ester of a polyamic acid whose acid anhydride residual group is any of: 1
    Type: Application
    Filed: September 27, 2002
    Publication date: June 12, 2003
    Inventors: Nobuhito Katsumura, Haruhiko Kikawa, Takashi Inoue, Masahiro Yamada, Yasuo Koike, Nobuhiko Fukuoka, Hiromu Terao
  • Publication number: 20030021914
    Abstract: A material for a liquid-crystal alignment film which comprises as a first polyamide a C3 to C10 alkyl ester of a polyamic acid whose acid anhydride residual group is any of: 1
    Type: Application
    Filed: September 12, 2001
    Publication date: January 30, 2003
    Inventors: Nobuhito Katsumura, Haruhiko Kikawa, Takashi Inoue, Masahiro Yamada, Yasuo Koike, Nobuhiko Fukuoka, Hiromu Terao