Patents by Inventor Yasuo Shima

Yasuo Shima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8150342
    Abstract: An internal operation of RF IC is adjusted so that the level of an RF transmitter signal is substantially stopped from rising, or made to descend in course of ramp-up of the RF transmitter signal. This adjustment is enabled by ramp-up adjustment data Last 4 symbols contained in preamble data precedent to real transmission data transmitted after completion of ramp-up. The ramp-up adjustment data and real transmission data are supplied from a baseband LSI. The RF transmitter signal contains phase and amplitude modulation components according to the EDGE system. RF IC includes phase and amplitude modulation control loops PM LP and AM LP. Ramp-up of RF power amplifiers PA1 and PA2 is performed by controlling the gain of the first variable amplifier MVGA included in the AM LP according to ramp information. Thus, unwanted radiation's level is reduced during ramp-up of the RF transmitter signal of the RF power amplifiers.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: April 3, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroaki Matsui, Yasuo Shima, Yasuyuki Kimura, Masahiko Yamamoto
  • Publication number: 20120001315
    Abstract: A semiconductor package includes a print circuit part, a lower chip, an upper chip, a thermal conductivity part, and an encapsulation resin. The lower chip and the upper chip are mounted on the print circuit part through wire bonding connection. The thermal conductivity part efficiently dissipates heat from the chips to the outside of the package. The encapsulation resin entirely seals the package while exposing the thermal conductivity part. A adhesive sheet is hardened to form a bonding layer between the thermal conductivity part and the upper chip, a bonding layer between the semiconductor chips, and a bonding layer between the semiconductor chip and the wired component. The configuration contributes to miniaturization, high integration, and heat resistance reduction of a semiconductor package using high-heat-generating ICs.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 5, 2012
    Inventors: Chihiro Mochizuki, Hiroshi Kikuchi, Yoichiro Kobayashi, Yasuo Shima
  • Publication number: 20110234263
    Abstract: A driver circuit transmits a signal generated by a signal level generation circuit to a circuit to be measured by transmitting the signal to a output buffer circuit via a circuit (prebuffer circuit) that drives the output buffer circuit and causing the output buffer circuit to drive a transmission line. The driver circuit includes the prebuffer circuit and a replica buffer circuit formed by imitating the prebuffer circuit. The prebuffer circuit and the replica buffer circuit are disposed in parallel. The driver circuit temporarily increases input bias current to be supplied to output-stage transistors of the output buffer circuit on the basis of output current of the replica buffer circuit during transition of an input or output signal.
    Type: Application
    Filed: January 8, 2011
    Publication date: September 29, 2011
    Inventors: Yasuo SHIMA, Katsuya Sonoyama, Yoichiro Kobayashi
  • Patent number: 8002276
    Abstract: A sheet conveyance device includes: a first conveyance member configured to convey a sheet in a first direction; a second conveyance member configured to convey the sheet in a second direction; a guide disposed between the first conveyance member and the second conveyance member, the guide having a curved face configured to guide the sheet conveyed from the first conveyance member to the second conveyance member; and an adjustment member disposed at an inner position of the curvature of the curved face of the guide, the adjustment member being configured to swing to contact with a curved inner face of the sheet guided by the guide in accordance with a contact force applied by the sheet.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: August 23, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Misato Ishikawa, Yasuo Shima, Masaki Takahashi
  • Patent number: 7893989
    Abstract: A camera unit includes a soft substrate on which electrode regions and an image pickup device region are disposed, a driving electrode group disposed on one of the electrode regions, an image pickup device disposed on the image pickup device region, stationary unit frame attaching portions disposed at positions surrounding the image pickup device region, a stationary unit frame attached to the stationary unit frame attaching portions, and movable units disposed in the stationary unit frame. The soft substrate is bent along bending positions between the electrode regions and the image pickup device region, the electrode regions are fixed on sides of the stationary unit frame inwardly thereof, and the image pickup device region is fixed on an end surface of the stationary unit frame toward the movable units.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: February 22, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Koga, Toshikatsu Akiba, Yasuo Shima, Hiroyuki Kayano, Makoto Aoki
  • Patent number: 7683723
    Abstract: A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: March 23, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Yukinori Akamine, Manabu Kawabe, Satoshi Tanaka, Yasuo Shima, Ryoichi Takano
  • Publication number: 20090184461
    Abstract: A sheet conveyance device includes: a first conveyance member configured to convey a sheet in a first direction; a second conveyance member configured to convey the sheet in a second direction; a guide disposed between the first conveyance member and the second conveyance member, the guide having a curved face configured to guide the sheet conveyed from the first conveyance member to the second conveyance member; and an adjustment member disposed at an inner position of the curvature of the curved face of the guide, the adjustment member being configured to swing to contact with a curved inner face of the sheet guided by the guide in accordance with a contact force applied by the sheet.
    Type: Application
    Filed: January 21, 2009
    Publication date: July 23, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Misato Ishikawa, Yasuo Shima, Masaki Takahashi
  • Publication number: 20090127768
    Abstract: A sheet separating device includes: an air blowing unit that is configured to blow air toward a side face of stacked sheets being stacked with a plurality of sheets to separate the sheets by forming an air layer between the sheets; and a sheet pressing unit that is configured to apply a pressing force on the uppermost sheet in the stacked sheets while the uppermost sheet is separated from other sheets, the pressing force having a downward component and a component in a direction along the uppermost sheet.
    Type: Application
    Filed: October 29, 2008
    Publication date: May 21, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuo Shima, Shunsuke Hattori, Hideichi Nakamoto
  • Publication number: 20090026691
    Abstract: A sheet conveying device includes: a pair of first rollers, the first rollers being disposed to oppose circumferential surfaces thereof with each other; a pair of second rollers, the second rollers being disposed to oppose circumferential surfaces thereof with each other; a guide plate that has a sheet conveyance face for guiding a leading edge of a sheet being conveyed in a conveying direction from the pair of first rollers toward the pair of second rollers, the guide plate being formed with one or more holes; and a sound absorbing member that is disposed on a back face of the guide plate, which opposes the sheet conveyance face, the sound absorbing member absorbing a sound transmitted through the hole formed on the guide plate.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 29, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Misato Ishikawa, Akihiko Enamito, Yasuo Shima, Masaki Takahashi
  • Publication number: 20080287079
    Abstract: An internal operation of RF IC is adjusted so that the level of an RF transmitter signal is substantially stopped from rising, or made to descend in course of ramp-up of the RF transmitter signal. This adjustment is enabled by ramp-up adjustment data Last 4 symbols contained in preamble data precedent to real transmission data transmitted after completion of ramp-up. The ramp-up adjustment data and real transmission data are supplied from a baseband LSI. The RF transmitter signal contains phase and amplitude modulation components according to the EDGE system. RF IC includes phase and amplitude modulation control loops PM LP and AM LP. Ramp-up of RF power amplifiers PA1 and PA2 is performed by controlling the gain of the first variable amplifier MVGA included in the AM LP according to ramp information. Thus, unwanted radiation's level is reduced during ramp-up of the RF transmitter signal of the RF power amplifiers.
    Type: Application
    Filed: April 25, 2008
    Publication date: November 20, 2008
    Inventors: Hiroaki MATSUI, Yasuo Shima, Yasuyuki Kimura, Masahiko Yamamoto
  • Publication number: 20080218626
    Abstract: A camera unit includes a soft substrate on which electrode regions and an image pickup device region are disposed, a driving electrode group disposed on one of the electrode regions, an image pickup device disposed on the image pickup device region, stationary unit frame attaching portions disposed at positions surrounding the image pickup device region, a stationary unit frame attached to the stationary unit frame attaching portions, and movable units disposed in the stationary unit frame. The soft substrate is bent along bending positions between the electrode regions and the image pickup device region, the electrode regions are fixed on sides of the stationary unit frame inwardly thereof, and the image pickup device region is fixed on an end surface of the stationary unit frame toward the movable units.
    Type: Application
    Filed: May 19, 2008
    Publication date: September 11, 2008
    Inventors: Akihiro KOGA, Toshikatsu Akiba, Yasuo Shima, Hiroyuki Kayano, Makoto Aoki
  • Patent number: 7391464
    Abstract: A camera unit includes a soft substrate on which electrode regions and an image pickup device region are disposed, a driving electrode group disposed on one of the electrode regions, an image pickup device disposed on the image pickup device region, stationary unit frame attaching portions disposed at positions surrounding the image pickup device region, a stationary unit frame attached to the stationary unit frame attaching portions, and movable units disposed in the stationary unit frame. The soft substrate is bent along bending positions between the electrode regions and the image pickup device region, the electrode regions are fixed on sides of the stationary unit frame inwardly thereof, and the image pickup device region is fixed on an end surface of the stationary unit frame toward the movable units.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: June 24, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Koga, Toshikatsu Akiba, Yasuo Shima, Hiroyuki Kayano, Makoto Aoki
  • Patent number: 7352250
    Abstract: A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: April 1, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Yukinori Akamine, Manabu Kawabe, Satoshi Tanaka, Yasuo Shima, Ryoichi Takano
  • Publication number: 20080030281
    Abstract: A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
    Type: Application
    Filed: October 2, 2007
    Publication date: February 7, 2008
    Inventors: Yukinori Akamine, Manabu Kawabe, Satoshi Tanaka, Yasuo Shima, Ryoichi Takano
  • Publication number: 20070166071
    Abstract: A belt member driving mechanism includes a first roller having a rotation shaft and configured to be rotated in a first direction, a belt member including a belt surface having a predetermined width in a second direction orthogonal to the first direction and configured to be rotated by a driving force from the first roller, a second roller configured to apply a predetermined tension force to the belt member in cooperation with the first roller, and a temperature control unit, including a detection unit which detects an elongation and/or a contraction of the belt surface of the belt member, configured to produce a temperature difference along the second direction of the belt surface of the belt member to reduce the elongation or contraction.
    Type: Application
    Filed: August 28, 2006
    Publication date: July 19, 2007
    Inventor: Yasuo Shima
  • Publication number: 20070104098
    Abstract: An RF signal processing integrated circuit has a first operation mode in which the operation setting of a time slot is executed using one time slot as one setting unit and a second operation mode in which the operation setting of a time slot is executed using plural time slots as one setting unit. In which mode the circuit is set is determined according to bit information contained in an instruction for the initialization, the mode setting, or the time slot setting. It is thus possible to enhance the degree of freedom in the operation setting of a time slot in a mobile communication terminal capable of making communications with the base station by a communication method employing the time-division multiple access (TDMA) method.
    Type: Application
    Filed: November 2, 2006
    Publication date: May 10, 2007
    Inventors: Yasuyuki Kimura, Yasuo Shima, Noriyuki Kurakami
  • Publication number: 20060234668
    Abstract: The communication semiconductor integrated circuit includes serial-signal processing circuits having low-pass filters and variable gain amplifier circuits cascade-connected in series. The low-pass filters constituting the serial-signal processing circuit each include a variable capacitance circuit composed of capacitance elements and switching elements connected in series to the capacitance elements, respectively, and capable of selecting the capacitance elements to change capacitance of the low-pass filter. A reference clock signal is supplied to the circuit containing the low-pass filters upon turning on of a power supply, for example, to determine a deviation of a delay time in the circuit to a design value and on and off states of the switching elements of the variable capacitance circuit are set so that the deviation of the delay time is minimized.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 19, 2006
    Inventors: Takeshi Uchitomi, Takao Okazaki, Sakae Chida, Yasuo Shima, Gary Smith
  • Publication number: 20060220750
    Abstract: A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
    Type: Application
    Filed: January 30, 2006
    Publication date: October 5, 2006
    Inventors: Yukinori Akamine, Manabu Kawabe, Satoshi Tanaka, Yasuo Shima, Ryoichi Takano
  • Patent number: 7095565
    Abstract: In a zoom lens unit, substrate are arranged to be faced to each other and are provided with first driving electrodes used to drive a first movable section and second driving electrodes used to drive a second movable section, respectively. A recessed portion is formed in the first movable section so as to face the second driving electrodes. A recessed portion is also formed in the second movable section so as to face the first driving electrodes. The first and second movable sections can be independently controlled to achieve a zoom operation.
    Type: Grant
    Filed: September 21, 2005
    Date of Patent: August 22, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Koga, Yasuo Shima, Toshikatsu Akiba
  • Publication number: 20060066174
    Abstract: In an electrostatic actuator, stoppers are provided on a driving electrode substrate. Stoppers are provided so that when a first movable section moves in the direction in which a penetrating portion penetrates a stator frame, a gap is created between driving electrodes and a movable-section driving electrode, with the stoppers lying opposite stoppers. This makes it possible to reduce the possibility of destroying the electrostatic actuator even if the movable section is deformed.
    Type: Application
    Filed: September 21, 2005
    Publication date: March 30, 2006
    Inventors: Toshikatsu Akiba, Yasuo Shima, Masayuki Sekimura