Abstract: To provide a light-emitting element with an improved reliability, a light-emitting element with a high current efficiency (or a high quantum efficiency), and a novel dibenzo[f,h]quinoxaline derivative that is favorably used in a light-emitting element which is one embodiment of the present invention. A light-emitting element includes an EL layer between an anode and a cathode. The EL layer includes a light-emitting layer; the light-emitting layer contains a first organic compound having an electron-transport property and a hole-transport property, a second organic compound having a hole-transport property, and a light-emitting substance; the combination of the first organic compound and the second organic compound forms an exciplex; the HOMO level of the first organic compound is lower than the HOMO level of the second organic compound; and a difference between the HOMO level of the first organic compound and the HOMO level of the second organic compound is less than or equal to 0.4 eV.

Abstract: Provided is an interference control system for wireless communication suitable for limiting the total amount of interference to which an interfered-with wireless communicator to be protected is subjected by interfering wireless communicators. A repeater disposed between the interfering wireless communicator and a controller includes a processor and a memory storing a program executed by the processor. The processor acquires registration information including a position and a transmission power for each interfering wireless communicator, and estimates, for each interfering wireless communicator, a terminal range in which there is a likelihood that a terminal wireless communicator communicating with the interfering wireless communicator is present based on the position and the transmission power. The processor transmits a registration application including the terminal range to the control device.

Abstract: A wireless communication management apparatus (100) includes a correction unit (1131), an evaluation unit (1132), and a determination unit (1133). The correction unit (1131) corrects, on the basis of a characteristic of each terminal, an error rate in wireless communication between a base station and the terminal based on wireless environment information collected from one or more terminals configured to wirelessly communicate with the base station. The evaluation unit (1132) evaluates the corrected error rate. The determination unit (1133) determines a modulation/demodulation scheme for each terminal on the basis of the evaluation result of the evaluation unit.

Abstract: An electronic component includes: a first lead frame; a second lead frame that is provided on the first lead frame; a first electronic component that is provided between the first lead frame and the second lead frame; a connection member that is provided between the first lead frame and the second lead frame; and an insulating resin that is filled between the first lead frame and the second lead frame so as to cover the first electronic component and the connection member. A first oxide film is provided on a surface of the first lead frame. A second oxide film is provided on a surface of the second lead frame. The first lead frame and the second lead frame are electrically connected to each other by the connection member.

Abstract: A wireless communication characteristics evaluation method for evaluating wireless communication characteristics of a wireless communication system where a plurality of wireless communication terminals perform communication by transmitting or exchanging signals, the wireless communication characteristics evaluation method including: a step 1 of acquiring power and a band of an interference signal; a step 2 of calculating an interference band rate showing a rate of the band of the interference signal that overlaps with a band of a desired signal; a step 3 of calculating an interference power rate from interference power and the interference band rate and furthermore, calculating steady noise power from the interference power and the interference power rate; a step 4 of determining a real SINR from received power of the desired signal and the steady noise power; and a step 5 of determining wireless communication characteristics of the desired signal from the real SINR.

Abstract: A charging prediction system includes vehicles, a charging station, and a control device including one or more processors and one or more memories. The one or more processors are configured to execute a process. The process includes accumulating, in a storage device, record data that is actual data on a charged vehicle ratio for a first remaining traveling distance of each of the vehicles traveling along a specific traveling road. The process includes deriving, based on the record data, a predicted value of the charged vehicle ratio for each vehicle in a predetermined group including ones of the vehicles currently traveling along the specific traveling road. The process includes deriving a predicted waiting period that is a predicted value of a waiting period to a start of charging at the charging station based on the predicted values of the charged vehicle ratios.

Abstract: A transmitting station (TX) of an embodiment includes first and second radio signal processing units (STA1 and STA2) and a link management unit (LM). The link management unit establishes multi-link with a receiving station by using the first and second radio signal processing units, and manages communication using the multi-link. The link management unit distributes a plurality of data units to the first and second radio signal processing units. The first radio signal processing unit transmits a first data unit group among the plurality of data units to the receiving station, and transmits first information indicating the sequence number of the data unit included in the first data unit group to the receiving station.

Abstract: A wireless apparatus according to one aspect of the present invention includes a reception unit configured to receive, on a frequency channel, a frame including first identification information for identifying the priority level of the frame, and a carrier sensing control unit configured to determine a threshold based on the first identification information, and determine a usage state of the frequency channel based on a comparison between received power of the frame and the determined threshold.

Abstract: A wireless communication management apparatus (100) includes a remaining capacity prediction unit (122) and a time setting unit (123). The remaining capacity prediction unit (122) predicts a remaining capacity (BLafter) of a battery (305) at a time point after a predetermined period has passed in a wireless communication device (300) on which the battery (305) is mounted. The time setting unit (123) sets a condition that the remaining capacity (BLafter) of the battery (305) predicted by the remaining capacity prediction unit (122) is greater than an allowable remaining capacity (BLminreq) and each of an operating time (Ton) and a transmittable time (Ttx) of the wireless communication device (300) falls within the reference range, and sets the operating time (Ton) and the transmittable time (Ttx) of the wireless communication device (300) in a state where the condition is satisfied.

Abstract: A hard disk drive suspension includes a suspension tail configured to electrically connect to a read-write transducer at a distal end and extending in a proximal direction toward a tapered tip at a proximal end, where the tapered tip comprises a decreasing taper that narrows in the proximal direction. Hence, structural overlap among adjacent suspension tails in misalignment scenarios and consequent marginalized electrical connections between the suspension tail and a corresponding flexible printed circuit are inhibited. The most proximal electrical pads of the suspension tail may be configured with a different aspect ratio, or in a fewer number of lines, from other adjacent electrical pads, thereby fitting within the narrowest portion of the tapered tip.

Abstract: A multi-layer ceramic capacitor includes: a ceramic body including ceramic layers laminated along one axial direction, first and second internal electrodes alternately disposed between the ceramic layers, first and second end surfaces to which the first and second internal electrodes are respectively drawn, a first end margin that forms an interval between the first end surface and the second internal electrodes, and a second end margin that forms an interval between the second end surface and the first internal electrodes; and first and second external electrodes that respectively cover the first and second end surfaces and are respectively connected to the first and second internal electrodes, the multi-layer ceramic capacitor satisfying the following relationship: SE?S/400+300, where S (?m) represents an area of the ceramic body and SE (?m) represents a total area of the first and second internal electrodes in cross sections of the first and second end margins.

Abstract: A multi-layer ceramic capacitor includes: a ceramic body including ceramic layers laminated along one axial direction, first and second internal electrodes alternately disposed between the ceramic layers, first and second end surfaces to which the first and second internal electrodes are respectively drawn, a first end margin that forms an interval between the first end surface and the second internal electrodes, and a second end margin that forms an interval between the second end surface and the first internal electrodes; and first and second external electrodes that respectively cover the first and second end surfaces and are respectively connected to the first and second internal electrodes, the multi-layer ceramic capacitor satisfying the following relationship: SE?S/400+300, where S (?m) represents an area of the ceramic body and SE (?m) represents a total area of the first and second internal electrodes in cross sections of the first and second end margins.

Abstract: A multi-layer ceramic capacitor includes: a ceramic body including ceramic layers laminated along one axial direction, first and second internal electrodes alternately disposed between the ceramic layers, first and second end surfaces to which the first and second internal electrodes are respectively drawn, a first end margin that forms an interval between the first end surface and the second internal electrodes, and a second end margin that forms an interval between the second end surface and the first internal electrodes; and first and second external electrodes that respectively cover the first and second end surfaces and are respectively connected to the first and second internal electrodes, the multi-layer ceramic capacitor satisfying the following relationship: SE?S/400+300, where S (?m) represents an area of the ceramic body and SE (?m) represents a total area of the first and second internal electrodes in cross sections of the first and second end margins.

Abstract: A multilayer ceramic capacitor includes: a ceramic multilayer structure having ceramic dielectric layers and internal electrode layers alternately stacked, the internal electrode layers being mainly composed of a transition metal other than an iron group, end edges of the internal electrode layers being alternately exposed to a first end face and a second end face; and a pair of external electrodes provided on the first end face and the second end face, wherein the external electrode includes a base conductive layer that includes glass of less than 7 weight % and is mainly composed of a transition metal other than an iron group or a noble metal, and a first plated film that covers the base conductive layer, has a thickness that is half of a thickness of the base conductive layer or more and is mainly composed of a transition metal other than an iron group.

Abstract: A multi-layer ceramic electronic component includes a multi-layer unit and an external electrode. The multi-layer unit includes an end surface oriented in a first direction, a side surface oriented in a second direction orthogonal to the first direction, a ridge connecting the end surface and the side surface, ceramic layers, and internal electrodes. The multi-layer ceramic electronic component satisfies the following relationships: A/L?0.0142*ln(L)+0.0256, A/T?0.0274*ln(T)+0.0719, B/L?0.0103*ln(L)+0.0281, and B/T?0.0189*ln(T)+0.0707, where A represents a thickness of the external electrode in the second direction at a position adjacent to the ridge on the side surface, B represents a thickness of the external electrode in the first direction at a position adjacent to the ridge on the end surface, L represents a dimension of the multi-layer ceramic electronic component in the first direction, and T represents a dimension of the multi-layer ceramic electronic component in the second direction.

Abstract: A multi-layer ceramic capacitor includes: a ceramic body including ceramic layers laminated along one axial direction, first and second internal electrodes alternately disposed between the ceramic layers, first and second end surfaces to which the first and second internal electrodes are respectively drawn, a first end margin that forms an interval between the first end surface and the second internal electrodes, and a second end margin that forms an interval between the second end surface and the first internal electrodes; and first and second external electrodes that respectively cover the first and second end surfaces and are respectively connected to the first and second internal electrodes, the multi-layer ceramic capacitor satisfying the following relationship: SE?S/400+300, where S (?m) represents an area of the ceramic body and SE (?m) represents a total area of the first and second internal electrodes in cross sections of the first and second end margins.

Abstract: A multi-layer ceramic capacitor includes: a body including first and second end surfaces facing each other in a uniaxial direction, a first internal electrode drawn to the first end surface, a second internal electrode drawn to the second end surface, a capacitance forming unit including the first and second internal electrodes, and first and second end margins; a first external electrode; and a second external electrode, the multi-layer ceramic capacitor having a dimension of 0.4 mm or less in the uniaxial direction, the multi-layer ceramic capacitor satisfying the following condition: R??4.4*ln(S)+2.3, where R (%) represents a proportion of a total dimension of the first and second end margins in the uniaxial direction to a dimension of the body in the uniaxial direction, and S (mm2) represents an area of a cross section of the capacitance forming unit, the cross section being orthogonal to the uniaxial direction.

Abstract: A multi-layer ceramic electronic component includes a multi-layer unit and an external electrode. The multi-layer unit includes an end surface oriented in a first direction, a side surface oriented in a second direction orthogonal to the first direction, a ridge connecting the end surface and the side surface, ceramic layers, and internal electrodes. The multi-layer ceramic electronic component satisfies the following relationships: A/L?0.0142*ln(L)+0.0256, A/T?0.0274*ln(T)+0.0719, B/L?0.0103*ln(L)+0.0281, and B/T?0.0189*ln(T)+0.0707, where A represents a thickness of the external electrode in the second direction at a position adjacent to the ridge on the side surface, B represents a thickness of the external electrode in the first direction at a position adjacent to the ridge on the end surface, L represents a dimension of the multi-layer ceramic electronic component in the first direction, and T represents a dimension of the multi-layer ceramic electronic component in the second direction.

Abstract: A multilayer ceramic capacitor includes: a ceramic multilayer structure having ceramic dielectric layers and internal electrode layers alternately stacked, the internal electrode layers being mainly composed of a transition metal other than an iron group, end edges of the internal electrode layers being alternately exposed to a first end face and a second end face; and at least a pair of external electrodes that are provided on the first face and the second face of the ceramic multilayer structure, wherein the external electrode includes a base conductive layer including ceramic of 5 weight % or less and being mainly composed of a transition metal other than an iron group or a noble metal and a first plated film having a thickness that is half of a thickness of the base conductive layer or more and being mainly composed of a transition metal other than an iron group.

Abstract: A multilayer ceramic capacitor includes: a ceramic multilayer structure having ceramic dielectric layers and internal electrode layers alternately stacked, the internal electrode layers being mainly composed of a transition metal other than an iron group, end edges of the internal electrode layers being alternately exposed to a first end face and a second end face; and a pair of external electrodes provided on the first end face and the second end face, wherein the external electrode includes a base conductive layer that includes glass of less than 7 weight % and is mainly composed of a transition metal other than an iron group or a noble metal, and a first plated film that covers the base conductive layer, has a thickness that is half of a thickness of the base conductive layer or more and is mainly composed of a transition metal other than an iron group.