Abstract: This invention is to improve data retention properties of a nonvolatile memory cell having an ONO film. A first cavity is disposed, in a position between the nitride film serving as a charge storage film and a memory gate and below an end portion of the memory gate, adjacent to the upper oxide film. A second cavity is disposed, in a position between the nitride film and a substrate and below an end portion of the memory gate, adjacent to the bottom oxide film. These cavities are closed with sidewall spacers formed over the substrate along the sidewalls of the memory gate.

Abstract: Provided is a method of manufacturing a semiconductor device having an ONO film composed of a bottom silicon oxide film, a silicon nitride film and a top silicon oxide film over a substrate. The top silicon oxide film of the ONO film is formed in the following manner. A silicon oxide film is formed over the silicon nitride film, and then a hydrogen gas and an oxygen gas are reacted over the silicon nitride film by heating the silicon nitride film (substrate) while reducing the pressure from the atmospheric pressure to grow the silicon oxide film into the top silicon oxide film. According to the present invention, a silicon oxide film having good uniformity and fewer defects can be formed over a silicon-containing underlayer.

Abstract: In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.

Abstract: Provided is a semiconductor device having, over a semiconductor substrate, a control gate electrode and a memory gate electrode which are adjacent to each other and constitute a nonvolatile memory. The height of the memory gate electrode is lower than the height of the control gate electrode. A metal silicide film is formed over the upper surface of the control gate electrode, but not formed over the upper surface of the memory gate electrode. The memory gate electrode has, over the upper surface thereof, a sidewall insulating film made of silicon oxide. This sidewall insulating film is formed in the same step as that for the formation of respective sidewall insulating films over the sidewalls of the memory gate electrode and the control gate electrode. The present invention makes it possible to improve the production yield and performance of the semiconductor device having a nonvolatile memory.

Abstract: A semiconductor device having a non-volatile memory is disclosed, whose disturb defect can be diminished or prevented. A memory cell of the non-volatile memory has a memory gate electrode formed over a main surface of a semiconductor substrate through an insulating film for charge storage. A first side wall is formed on a side face of the memory gate electrode, and at a side face of the first side wall, a second side wall is formed. On an upper surface of an n+-type semiconductor region for source in the memory cell there is formed a silicide layer whose end portion on the memory gate electrode MG side is defined by the second side wall.

Abstract: A memory cell has a control gate electrode disposed on a main surface of a semiconductor substrate through a gate insulating film, an ONO film disposed along a side surface of the control gate electrode and the main surface of semiconductor substrate, a memory gate electrode disposed on a side surface of the control gate electrode and also on the main surface of the semiconductor substrate through the ONO film. The control gate electrode and the memory gate electrode are formed, over the upper portions thereof, with a silicide film and an insulating film formed by oxidation of the surface of the silicide film, respectively.

Abstract: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

Abstract: Memory cells are disposed in plural array form. Select gate electrodes of the memory cells arranged in an X direction are connected to one another by select gate lines respectively. Memory gate electrodes are connected by memory gate lines respectively. The memory gate lines respectively connected to the memory gate electrodes of the memory cells adjacent to one another through source regions interposed therebetween are not electrically connected to one another. Each of the select gate lines has a first portion that extends in the X direction, and a second portion 9b of which one end is connected to the first portion and extends in a Y direction. The memory gate line is formed on its corresponding sidewall of the select gate line with an insulating film interposed therebetween.

Abstract: The invention provides a frequency-stabilized laser and frequency-stabilizing method capable of stabilizing an oscillation frequency of laser beam. A photodetector detects an optical output signal obtained when a reference laser beam transmits through an absorption cell. A third-order differential signal detector generates a third-order differential signal of the optical output signal. A first actuator varies the resonator length. A first driver drives the first actuator. A second actuator varies the resonator length. A second driver drives the second actuator. A first controller controls the first driver based on the optical output signal. A second controller controls the resonator length based on the third-order differential signal using the second actuator. The first actuator and the second actuator are used to control the resonator length to stabilize the oscillation frequency.

Abstract: A semiconductor device has a nonvolatile memory employing a split-gate type memory cell structure, using a nitride film as a charge storage layer. An n-type semiconductor region is formed in a main surface of a semiconductor substrate, and then, a memory gate electrode of a memory cell of a split gate type and a charge storage layer are formed over the semiconductor region. Subsequently, side walls are formed on side surfaces of the memory gate electrode, and a photoresist pattern is formed over the main surface of the semiconductor substrate. The photoresist pattern serves as an etching mask, and a part of the main surface of the semiconductor substrate is removed by etching to form a dent. In the region of the dent, the n-type semiconductor region is removed. Then, a p-type semiconductor region for forming a channel of an nMIS transistor for selecting a memory cell is formed.

Abstract: The degree of integration and the number of rewriting of a semiconductor device having a nonvolatile memory element are improved. A first MONOS nonvolatile-memory-element and a second MONOS nonvolatile-memory-element having a large gate width compared with the first MONOS nonvolatile-memory-element are mounted together on the same substrate, and the first MONOS nonvolatile-memory-element is used for storing program data which is scarcely rewritten, and the second MONOS nonvolatile-memory-element is used for storing processed data which is frequently rewritten.

Abstract: A measuring device used in a manufacturing process of an engine, to determine the volume of a complex shaped combustion chamber precisely and quickly in a dry state. A reference chamber is mounted on a combustion chamber of a engine head block which is placed upside down, cyclic volume variation is differentially produced in the internal space of the reference chamber and the internal space of the combustion chamber by a speaker, the ratio of the magnitude of cyclic pressure variations generated within the two spaces is measured, and the difference in volume between the combustion chamber and a standard vessel, having the reference chamber similarly mounted thereto, is obtained based on the ratio of the magnitude of the pressure variations when the reference chamber is mounted on the combustion chamber and the ratio of the magnitude of pressure variations when the reference chamber is mounted on the standard vessel.

Abstract: Memory cells are disposed in plural array form. Select gate electrodes of the memory cells arranged in an X direction are connected to one another by select gate lines respectively. Memory gate electrodes are connected by memory gate lines respectively. The memory gate lines respectively connected to the memory gate electrodes of the memory cells adjacent to one another through source regions interposed therebetween are not electrically connected to one another. Each of the select gate lines has a first portion that extends in the X direction, and a second portion 9b of which one end is connected to the first portion and extends in a Y direction. The memory gate line is formed on its corresponding sidewall of the select gate line with an insulating film interposed therebetween.

Abstract: For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.

Abstract: A measuring device used in a manufacturing process of an engine, to determine the volume of a complex shaped combustion chamber precisely and quickly in a dry state. A reference chamber is mounted on a combustion chamber of a engine head block which is placed upside down, cyclic volume variation is differentially produced in the internal space of the reference chamber and the internal space of the combustion chamber by a speaker, the ratio of the magnitude of cyclic pressure variations generated within the two spaces is measured, and the difference in volume between the combustion chamber and a standard vessel, having the reference chamber similarly mounted thereto, is obtained based on the ratio of the magnitude of the pressure variations when the reference chamber is mounted on the combustion chamber and the ratio of the magnitude of pressure variations when the reference chamber is mounted on the standard vessel.

Abstract: An outboard motor includes an engine that defines a first exhaust passage section. A housing unit is mounted on an associated watercraft and defines a second exhaust passage section. A support member is mounted on the housing unit and supports the engine above the housing unit. The support member defines third and fourth exhaust passage sections. The third exhaust passage section is wholly defined within the support member and communicates with the first exhaust passage section. The fourth exhaust passage section communicates with the second exhaust passage section. An exhaust unit is detachably coupled with the support member and defines fifth exhaust passage section that communicates with the third and forth exhaust passage sections. At least one catalyzer is disposed in the fifth exhaust passage section of the exhaust unit.

Abstract: A semiconductor device has a nonvolatile memory employing a split-gate type memory cell structure, using a nitride film as a charge storage layer. An n-type semiconductor region is formed in a main surface of a semiconductor substrate, and then, a memory gate electrode of a memory cell of a split gate type and a charge storage layer are formed over the semiconductor region. Subsequently, side walls are formed on side surfaces of the memory gate electrode, and a photoresist pattern is formed over the main surface of the semiconductor substrate. The photoresist pattern serves as an etching mask, and a part of the main surface of the semiconductor substrate is removed by etching to form a dent. In the region of the dent, the n-type semiconductor region is removed. Then, a p-type semiconductor region for forming a channel of an nMIS transistor for selecting a memory cell is formed.

Abstract: A catalyzer arrangement in an outboard motor includes an improved construction that does not require a large space for furnishing a catalyzer having a relatively large volume and that keeps the catalyzer away from the body of water in which the outboard motor is operated. The outboard motor includes an engine having an internal or external exhaust section. A driveshaft housing of the motor is adapted to be mounted on an associated watercraft. An exhaust guide is mounted on the driveshaft housing for supporting the engine. The exhaust guide includes an internal exhaust section coupled to the exhaust section of the engine. An exhaust unit defines an internal exhaust section that is coupled to the exhaust section of the exhaust guide. The exhaust unit includes a catalyzer disposed in its internal exhaust section.

Abstract: A catalyzer arrangement for an engine includes an improved construction that does not require a large space for furnishing a relatively large volume catalyzer. The engine is surrounded by a protective cowling. A cylinder body of the engine has a plurality of cylinder bores spaced apart from each other. The engine also has an exhaust manifold to gather exhaust gases from the respective cylinder bores. An exhaust passage is coupled to the manifold and extends, at least in part, within a space defined between a side surface of the cylinder body and the protective cowling. At least one catalyzer is disposed in the exhaust passage.

Abstract: An outboard motor includes an engine that defines a first exhaust passage section. A housing unit is mounted on an associated watercraft and defines a second exhaust passage section. A support member is mounted on the housing unit and supports the engine above the housing unit. The support member defines third and fourth exhaust passage sections. The third exhaust passage section is wholly defined within the support member and communicates with the first exhaust passage section. The fourth exhaust passage section communicates with the second exhaust passage section. An exhaust unit is detachably coupled with the support member and defines a fifth exhaust passage section that communicates with the third and forth exhaust passage sections. At least one catalyzer is disposed in the fifth exhaust passage section of the exhaust unit.