Abstract: A digital/analogue converter for converting an input n-bit digital code, where n is an integer greater than one, has an n-bit digital input and an output for connection to a load, and includes: an array of (n?1) switched capacitors; and a switching arrangement. In one example embodiment, the switching arrangement is adapted, in a zeroing phase of operation, to connect a first reference voltage to the first plate of at least one capacitor of the array and to connect a second plate of the at least one capacitor to a voltage that, for at least one value of the input digital code, is different from the first reference voltage and is further adapted, in a decoding phase of operation, to enable, dependent on the value of the input digital code, injection of charge into the at least one capacitor. In one example embodiment, the converter may be a bufferless converter having an output for direct connection to a capacitive load.

Abstract: A process for preparing butter milk and/or butter serum, which comprises decreasing the dissolved oxygen concentration of at least one selected from the group consisting of milk, a milk product, butter milk and butter serum, followed by heating, and optionally fractionizing the heated product.

Abstract: An integrated circuit is provided for scan driving that can significantly reduce the chip size. In first region AODD, odd-numbered output pads OUT1, OUT3, . . . OUT173, OUT175, driver circuits DR1, DR3, . . . DR173, DR175, and flip-flops SREG1, SREG3, . . . SREG173, SREG175 in an order corresponding to the order of the odd-numbered scanning lines are each arranged as a column in the X-direction, and, at the same time, output pads OUTi, driver circuits DRi and flip-flops SREGi corresponding to the scanning lines are arranged in the same row in the Y-direction (chip width direction). In second region AEVEN, even-numbered output pads OUT2, OUT4, . . . OUT174, OUT176, driver circuits DR2, DR4, . . . DR174, DR176, and flip-flops SREG2, SREG4, . . .

Abstract: A transistor model for a simulator simulates a resistance between a source region and a drain region with a model equation which has terms representing resistance values corresponding respectively to areas of mutually different impurity concentrations below a gate section in simulating characteristics of a transistor. At least two of the terms each having a threshold parameter indicating a voltage at which a semiconductor element composed of the associated region and regions adjacent to that region changes from an ON state to an OFF state. The threshold parameters of the terms being specified independently from each other. Thus, the characteristics of a transistor having a set of areas of mutually different impurity concentrations below a gate section, inclusive of subthreshold regions which are difficult to evaluate through actual measurement, can be simulated to high accuracy while preserving a good fit with a capacitance model.

Abstract: An occupying area of a digital system signal line driver circuit in an image display device is large and this hinders the miniaturization of the display device. A memory circuit and a D/A converter circuit in the signal line driver circuit are commonly used for n (“n” is a natural number equal to or larger than 2) signal lines. One horizontal scanning period is divided into n periods and the memory circuit and the D/A converter circuit each perform processing for different signal lines during each of the divided periods. Thus, all the signal lines can be driven. Therefore, the number of memory circuits and the number of D/A converter circuits in the signal line driver circuit can be reduced to one n-th in a conventional case.

Abstract: An optically active quaternary ammonium salt compound represented by formula (1), wherein R1 represents a halogen, a C1-8 alkyl which is optionally substituted and which is linear, branched, or cyclic, a C2-8 alkenyl which is optionally substituted, a C2-8 alkynyl which is optionally substituted, a C6-14 aryl which is optionally substituted, a C3-8 heteroaryl which is optionally substituted, a C1-8 alkoxy which is optionally substituted and which is linear, branched, or cyclic, or a C7-16 aralkyl which is optionally substituted; R2 and R21 each independently represents hydrogen, halogen, nitro, a C1-8 alkyl which is optionally substituted and which is linear, branched, or cyclic, a C2-8 alkenyl which is optionally substituted, a C2-8 alkynyl which is optionally substituted, a C6-14 aryl which is optionally substituted, a C1-8 alkoxy which is optionally substituted and which is linear, branched, or cyclic, or a C7-16 aralkyl which is optionally substituted; one of combinations of R1 and R21, and R2 and R

Abstract: An occupying area of a digital system signal line driver circuit in an image display device is large and this hinders the miniaturization of the display device. A memory circuit and a D/A converter circuit in the signal line driver circuit are commonly used for n (“n” is a natural number equal to or larger than 2) signal lines. One horizontal scanning period is divided into n periods and the memory circuit and the D/A converter circuit each perform processing for different signal lines during each of the divided periods. Thus, all the signal lines can be driven. Therefore, the number of memory circuits and the number of D/A converter circuits in the signal line driver circuit can be reduced to one n-th in a conventional case.

Abstract: A food objective for extraction and/or squeezing is charged into a colloid mill or a twin-screw extruder; immediately after and/or while milling, a low-temperature solvent (for example, water or milk of from ?3 to 50° C.) is added; and after treating the food using the extruder, grounds are removed to produce an extract and/or a squeezed liquid.

Abstract: An object of the present invention is to provide a milk-type food and drink including cow's milk packed in a transparent container such as a PET bottle, which does not generate off-flavor due to photoinduction even when the milk-type food and drink is a store-displaying commercial product which is apt to come under the influence of sunlight and fluorescent light. The invention relates to a milk-type food and drink packed in a transparent container which substantially shields light in the wavelength region of 550 to 720 nm, and a process for producing a milk-type food and drink, which comprises packing a milk-type food and drink in a transparent container which substantially shields light in the wavelength region of 550 to 720 nm.

Abstract: The invention relates to a process of producing fermented milk or milk powder, including removing ions from milk, and reducing the dissolved oxygen concentration in the milk, followed by subjecting the milk to a heat treatment, as well as concentrated milk and milk powder with good flavor and an effect of improving physico-chemical properties as a raw food material, which have never been found in conventional concentrated milk and milk powder.

Abstract: A digital/analogue converter for converting an input n-bit digital code, where n is an integer greater than one, has an n-bit digital input and an output for connection to a load, and includes: an array of (n?1) switched capacitors; and a switching arrangement. In one example embodiment, the switching arrangement is adapted, in a zeroing phase of operation, to connect a first reference voltage to the first plate of at least one capacitor of the array and to connect a second plate of the at least one capacitor to a voltage that, for at least one value of the input digital code, is different from the first reference voltage and is further adapted, in a decoding phase of operation, to enable, dependent on the value of the input digital code, injection of charge into the at least one capacitor. In one example embodiment, the converter may be a bufferless converter having an output for direct connection to a capacitive load.

Abstract: A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts.

Abstract: There are provided: a first logic operation circuit which performs a logic operation using a high-amplitude logic signal; a transmission system having a load capacitance; and a low-voltage signal generator which is a step-down level shifter transforming an incoming high-amplitude logic signal from the first logic operation circuit to a low-amplitude logic signal having a lower amplitude than the high-amplitude logic signal for output to the transmission system. In the configuration, the first logic operation circuit operates based on a high-amplitude logic signal, and is therefore free from malfunctions and performs operations at high speed. Further, the transmission system introducing a load capacitance transmits a low-amplitude logic signal and therefore restrains increases in electric power consumption and occurrence of unnecessary radiation.

Abstract: A data signal line drive circuit supplying a video signal to a pixel array performs pseudo tone gradation processing with respect to the video signal that is sent to an n number of data signal lines SL by m (<n) stages of a pseudo tone gradation processing section, and outputs the video signal processed by the pseudo tone gradation processing section identical to the data signal lines SL per m lines when sends the video signals subjected to the pseudo tone gradation processing to the data signal lines SL. By doing this, the drive circuit using the pseudo tone gradation processing is given a simple circuit structure, thereby providing an image display apparatus of a driving circuit integrated type in which the pixel array and the drive circuit are formed on a substrate.

Abstract: A shift register is provided with a shift register section composed of a plurality of stages of flip-flops that operate in synchronization with a clock signal, and level shifters for boosting a start signal lower than a driving voltage and for applying the same to both ends of the shift register section, and the shift register is capable of switching the shift direction in accordance with the switching signal. The foregoing level shifters are current-driving-type level shifters that can operate even in the case where the transistor characteristics are inferior or in the case of fast operations, and that can carry out level shifting even with a start signal having a small amplitude. Furthermore, the foregoing level shifters are provided at both ends of the shift register section, respectively, and one of the same stops operating in accordance with a switching signal, so that consumed power should decrease.

Abstract: There are provided: a first logic operation circuit which performs a logic operation using a high-amplitude logic signal; a transmission system having a load capacitance; and a low-voltage signal generator which is a step-down level shifter transforming an incoming high-amplitude logic signal from the first logic operation circuit to a low-amplitude logic signal having a lower amplitude than the high-amplitude logic signal for output to the transmission system. In the configuration, the first logic operation circuit operates based on a high-amplitude logic signal, and is therefore free from malfunctions and performs operations at high speed. Further, the transmission system introducing a load capacitance transmits a low-amplitude logic signal and therefore restrains increases in electric power consumption and occurrence of unnecessary radiation.

Abstract: It is intended to provide a milk drink obtained by starting with a milk protein-containing powder (skim milk powder, etc.) having a seriously worsened flavor which is free from worsening in the flavor after heating and sustains a flavor comparable to a product obtained by starting with fresh milk or fermented milk alone without using such a starting material as described above. An inert gas such as nitrogen gas is bubbled into a conditioned milk liquor containing a milk protein-containing powder (for example, whole milk powder or defatted milk powder) which is obtained by starting with fresh milk or milk so as to lower the dissolved oxygen concentration in the conditioned milk liquor to 8 ppm or below. Next, the conditioned milk liquor is subjected as such to heat sterilization.

Abstract: An image display device includes two data signal line drive circuits and two scan signal line drive circuits configured differently from each other. Different data signal line drive circuits and scan signal line drive circuit are compatible with different display formats. A display can be produced in the most suitable display format, and power consumption also can be reduced, by switch operating drive circuits according to the kind of input video and environmental conditions. Further, an image can be written over another image by writing video signals to signal lines with a time lag using a plurality of drive circuits; therefore, a superimposed display can be produced without externally processing the video signals. Thus, both a satisfactory image display and low power consumption can be achieved in an image display device.

Abstract: A control signal generating circuit CTL for controlling the writing into pixels PIX instructs a data signal line drive circuit SD2, which is for driving pixels in a non-display area, to write a voltage VB or a voltage VW which are for non-displaying, not only in the first frame but also once in a predetermined number of frames. In other words, the pixels in the display area is refreshed at intervals longer than those in the case of refreshing the pixels in each frame. Thus, even if the mobility of an active element is high and the leak current on the occasion of OFF-state is large, or even if a large amount of electric charge is accumulated because of the photoelectric effect due to the use of a backlight, it is possible to prevent unnecessary displaying on the display area, which is caused because the writing into the pixels in the display area influences on the pixels in the non-display area, and hence it is possible to improve the quality of partial displaying, while restraining the power consumption.

Abstract: An example control signal generating circuit CTL for controlling the writing into pixels PIX instructs a data signal line drive circuit SD2, which is for driving pixels in a non-display area, to write a voltage VB or a voltage VW which are for non-displaying, not only in the first frame but also once in a predetermined number of frames. In other words, the pixels in the display area are refreshed at intervals longer than those in the case of refreshing the pixels in each frame.