Abstract: A fuel cell system includes: a fuel cell stack; a centrifugal compressor that compresses and supplies the oxidant gas to the fuel cell stack; a regulating valve that controls pressure at an outlet of the compressor; and a control unit that controls the compressor and the regulating valve, wherein the control unit determines a rotation speed of the compressor and an open degree of the regulating valve based on a target air flow rate corresponding to a current value instructed to the fuel cell stack, actuates the compressor based on the determined rotation speed, and actuates the regulating valve based on the determined open degree. The control unit executes feedback control to reduce the difference between an actual air flow rate and a target air flow rate by changing the open degree of the regulating valve while maintaining the rotation speed of the compressor.

Abstract: To provide a lens driving apparatus that drives a lens in its optical axis-direction without inclining it, and a lens driving apparatus that drives a bobbin in the optical axis-direction smoothly without increasing the frictional force between a ball arranged between the bobbin and a cover, and the bobbin and cover while maintaining high driving power. The lens driving apparatus comprises the polygonal cylindrical bobbin that houses the lens, the box-shaped cover that receives the bobbin, a drive unit that moves the bobbin in the optical axis-direction of the lens, and a support unit that supports the bobbin.

Abstract: To include first and second data input/output terminals allocated to first and second memory circuit units, respectively, and an address terminal allocated in common to these memory circuit units. When a first chip selection signal is activated, the first memory circuit unit performs a read operation or a write operation via the first data input/output terminal based on an address signal regardless of an operation of the second memory circuit unit. When a second chip selection signal is activated, the second memory circuit unit performs a read operation or a write operation via the second data input/output terminal based on the address signal regardless of an operation of the first memory circuit unit. With this configuration, a wasteful data transfer can be prevented, and the effective data transfer rate can be increased.

Abstract: Conventional surface roughening plating technology cannot always improve the adhesion between a leadframe and a plating film and it depends on the material used for surface roughening plating. Conventional surface roughening technology by etching can only be used for leadframes made of limited materials. Improved adhesion cannot therefore be achieved between a metal member such as leadframe and a sealing resin. A manufacturing method of a semiconductor device according to one embodiment is to carry out resin sealing using a metal member such as leadframe which has been subjected to alloying treatment of a base material and Zn plated on the surface thereof.

Abstract: To enhance the reliability of connection between a semiconductor chip and a metal plate by ensuring sufficiently the thickness of a conductive material interposed between the semiconductor chip and the metal plate. A lead frame is arranged over a jig and a clip frame is arranged over protruding portions provided on the jig. In this state, a heating process (reflow) is performed. In this case, high melting point solders filling first spaces are melted in a state in which the first space is formed between a High-MOS chip and a High-MOS clip and the first space is formed between a Low-MOS chip and a Low-MOS clip. At this time, even when the high melting point solder is melted in the first space, the size (in particular, the height) of the first space does not change and the first space is maintained.

Abstract: A Raman scattered light enhancement device including a waveguide provided in a photonic crystal (20) made of a semiconductor substrate in which holes (20a) are formed. The waveguide has resonant modes with respect to incident light at a plurality of frequencies. A difference in frequency between one resonant mode and another resonant mode is equal to a Raman shift frequency of the semiconductor substrate. A waveguide forming direction with respect to a crystal plane orientation of the semiconductor substrate is set so as to maximize a Raman transition probability which is represented by electromagnetic field distribution of the two resonant modes and a Raman tensor of the semiconductor substrate.

Abstract: To enhance the reliability of connection between a semiconductor chip and a metal plate by ensuring sufficiently the thickness of a conductive material interposed between the semiconductor chip and the metal plate. A lead frame is arranged over a jig and a clip frame is arranged over protruding portions provided on the jig. In this state, a heating process (reflow) is performed. In this case, high melting point solders filling first spaces are melted in a state in which the first space is formed between a High-MOS chip and a High-MOS clip and the first space is formed between a Low-MOS chip and a Low-MOS clip. At this time, even when the high melting point solder is melted in the first space, the size (in particular, the height) of the first space does not change and the first space is maintained.

Abstract: A Raman scattered light enhancement device including a waveguide provided in a photonic crystal (20) made of a semiconductor substrate in which holes (20a) are formed. The waveguide has resonant modes with respect to incident light at a plurality of frequencies. A difference in frequency between one resonant mode and another resonant mode is equal to a Raman shift frequency of the semiconductor substrate. A waveguide forming direction with respect to a crystal plane orientation of the semiconductor substrate is set so as to maximize a Raman transition probability which is represented by electromagnetic field distribution of the two resonant modes and a Raman tensor of the semiconductor substrate.

Abstract: A stereo camera unit includes a camera stay, a pair of lenses fixed to the camera stay, image-capturing devices for receiving light condensed by the lens, and a mount board mounting the image-capturing devices. The mount board is fixed to the camera stay via fastening members such as a screw, whereby the relative position of the lens with respect to the image-capturing device is determined. A metal core substrate having a same metal material as the camera stay in a core layer is employed for the mount board.

Abstract: A semiconductor device featuring a semiconductor chip including a MOSFET and having a first main surface and a second, opposing main surface, a source electrode pad and a gate electrode pad over the first main surface, a drain electrode over the second main surface, a source external terminal and a gate external terminal, each having a first main surface electrically connected to the source electrode pad and gate electrode pad of the chip, respectively, and a drain external terminal having a first main surface and a second, opposing main surface and being electrically connected to the second main surface of the chip, each of the source, gate and drain external terminals having second main surfaces thereof in a same plane, and, in a plan view of the external terminals, the gate external terminal has a portion located between the source and drain external terminals in at least one direction.

Abstract: To include first and second data input/output terminals allocated to first and second memory circuit units, respectively, and an address terminal allocated in common to these memory circuit units. When a first chip selection signal is activated, the first memory circuit unit performs a read operation or a write operation via the first data input/output terminal based on an address signal regardless of an operation of the second memory circuit unit. When a second chip selection signal is activated, the second memory circuit unit performs a read operation or a write operation via the second data input/output terminal based on the address signal regardless of an operation of the first memory circuit unit. With this configuration, a wasteful data transfer can be prevented, and the effective data transfer rate can be increased.

Abstract: To enhance the reliability of connection between a semiconductor chip and a metal plate by ensuring sufficiently the thickness of a conductive material interposed between the semiconductor chip and the metal plate. A lead frame is arranged over a jig and a clip frame is arranged over protruding portions provided on the jig. In this state, a heating process (reflow) is performed. In this case, high melting point solders filling first spaces are melted in a state in which the first space is formed between a High-MOS chip and a High-MOS clip and the first space is formed between a Low-MOS chip and a Low-MOS clip. At this time, even when the high melting point solder is melted in the first space, the size (in particular, the height) of the first space does not change and the first space is maintained.

Abstract: Disclosed is a pointer-type meter with good uniformity of illumination of a display section even when there are few light sources, and with little or no displacement of each member when positioning is performed. A circuit board provided in the pointer-type meter comprises a first light-emitting element (332a) that emits light in a direction towards a first rotary shaft (3110). The pointer-type meter comprises: a first reflecting unit (321) positioned between the circuit board and a display plate (31) and that surrounds part of the circumference of the rotary shaft (3110) and reflects light towards the outer edge of a speed display unit (311); and a second reflecting unit (322) positioned between the circuit board and the display plate (31) and that reflects the light reflected by the first reflecting unit (321) to illuminate the speed display unit (311).

Abstract: A system including a controller and a memory chip. The controller includes first and second selection signal terminals supplying first and second selection signals, respectively, multiple first data terminals and multiple second data terminals. The memory chip includes a semiconductor substrate, third and fourth selection signal terminals provided on the semiconductor substrate and electrically coupled to the first and second selection signal terminals of the controller, respectively. Multiple third data terminals are provided on the semiconductor substrate and electrically coupled to the first data terminals of the controller, respectively. Multiple fourth data terminals are provided on the semiconductor substrate and electrically coupled to the second data terminals of the controller, respectively. The first and third data terminals communicate first data in response to the first selection signal. The second and fourth data terminals communicate second data in response to the second selection signal.

Abstract: A semiconductor device that includes a semiconductor substrate. First and second mode registers are provided on the semiconductor substrate and store information, respectively. First and second circuits are provided on the semiconductor substrate. The first and second circuits have substantially the same configuration. The first and second circuits perform an operation in response to the information of the first and second mode registers, respectively.

Abstract: A semiconductor device featuring a semiconductor chip including a MOSFET and having a first main surface and a second, opposing main surface, a source electrode pad and a gate electrode pad over the first main surface, a drain electrode over the second main surface, a source external terminal and a gate external terminal, each having a first main surface electrically connected to the source electrode pad and gate electrode pad of the chip, respectively, and a drain external terminal having a first main surface and a second, opposing main surface and being electrically connected to the second main surface of the chip, each of the source, gate and drain external terminals having second main surfaces thereof in a same plane, and, in a plan view of the external terminals, the gate external terminal has a portion located between the source and drain external terminals in at least one direction.

Abstract: Conventional surface roughening plating technology cannot always improve the adhesion between a leadframe and a plating film and it depends on the material used for surface roughening plating. Conventional surface roughening technology by etching can only be used for leadframes made of limited materials. Improved adhesion cannot therefore be achieved between a metal member such as leadframe and a sealing resin. A manufacturing method of a semiconductor device according to one embodiment is to carry out resin sealing using a metal member such as leadframe which has been subjected to alloying treatment of a base material and Zn plated on the surface thereof.