Patents by Inventor Yasutoshi Suzuki

Yasutoshi Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5770883
    Abstract: A pair of signal voltages outputted from a bridge circuit composed of plural strain gauges are linearly amplified individually by a pair of amplifiers, whereupon a difference between the pair of signal voltages is detected. The pair of amplifiers are formed respectively in regions that are symmetrical with each other on a chip. As a result, variations in the output characteristics between the amplifiers are decreased.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: June 23, 1998
    Assignee: Nippondenso Co., Ltd.
    Inventors: Koki Mizuno, Hiroshi Okada, Inao Toyoda, Masakazu Kanosue, Yasutoshi Suzuki, Kenichi Yokoyama
  • Patent number: 5761957
    Abstract: A semiconductor pressure sensor includes a diaphragm of an octagonal shape formed on a (110) silicon substrate by anisotropic etching. When a distance between two sides of the diaphragm, which are defined by intersecting lines of a (110) face and a (111) face of the silicon substrate, is represented as L1 and a length of a side of the diaphragm, which is defined by an intersecting line of the (110) face and a (100) face, is represented as L2, the diaphragm is formed so as to satisfy the following relationship:0.65<L2/L1<1.As a result, it is possible to eliminate substantially a non-linear component of the temperature characteristics of an offset voltage generated by the pressure sensor.
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: June 9, 1998
    Assignee: Denso Corporation
    Inventors: Nobukazu Oba, Yasutoshi Suzuki, Inao Toyoda, Masaki Onoue
  • Patent number: 5736061
    Abstract: A semiconductor sensor mount is formed as follows: through holes are formed that penetrate a glass plate; and then the glass plate having the through holes is dipped into hydrofluoric acid etchant to smooth the inner peripheral surfaces of the respective through holes. By etching the inner peripheral surfaces of the respective through holes after the through hole formation, minute roughness and cracks formed on the inner peripheral surfaces are removed, and thereby the areas for adsorbing gas are substantially reduced. That is, vacuums within the through holes can be maintained at a high degree during the anodic bonding, whereby undesirable electric discharge phenomena are prevented even if a relatively high voltage is applied during the anodic bonding. Accordingly, the yield of products can be improved while improving productivity.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: April 7, 1998
    Assignees: Nippondenso Co. Ltd., Iwaki Glass Co., Ltd.
    Inventors: Tsuyoshi Fukada, Yasutoshi Suzuki, Koushu Satoh, Hiroaki Kawashima
  • Patent number: 5701833
    Abstract: In a sewing station, a preceding cloth piece is sewn to a slide fastener chain from a leading end of the preceding cloth piece to a predetermined position short of a trailing end thereof, and the sewing is terminated when it reaches the predetermined position. On the other hand, in a cloth-piece supply station, a succeeding cloth piece is fed at a high speed toward the sewing station to an upstream position spaced a predetermined distance from the trailing end of the preceding cloth piece while being stopped, whereupon the sewing is started when the leading end of the succeeding cloth piece contacts with or nearly contacts with the trailing end of the preceding cloth piece. As a result, the remaining portion of the preceding cloth piece is sewn. These driving timing is sequentially controlled via a control unit based on various detection signals from a plurality of cloth-piece detectors.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: December 30, 1997
    Assignee: YKK Corporation
    Inventor: Yasutoshi Suzuki
  • Patent number: 5619050
    Abstract: A semiconductor acceleration sensor capable of reducing a leakage current and manufacturing method thereof is disclosed. A beam structure is disposed on a silicon substrate. The beam structure has a movable section, and the movable section is disposed spaced at a prescribed distance above silicon substrate. A movable electrode section is formed in one portion of movable section. Fixed electrodes made of an impurity diffusion layer are formed in silicon substrate to correspond to both sides of a movable electrode section. A peripheral circuit is formed in silicon substrate. The beam structure and the peripheral circuit are electrically connected by an electroconductive thin film, made of polysilicon. Then, when a voltage is applied to the beam structure, and a voltage is applied to both fixed electrodes, an inversion layer is formed, and an electrical current flows between the fixed electrodes.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: April 8, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hirofumi Uenoyama, Kenichi Ao, Masakazu Kanosue, Yasutoshi Suzuki, Yukihiro Takeuchi
  • Patent number: 5594236
    Abstract: A sunlight sensor is provided which detects sunlight by means of a semiconductor device and achieves the desired elevation angle characteristics. The sunlight sensor is implemented as a semiconductor device having p+ layers 10 and 11 as a light-responsive section and an n+ or n layer 9 as a light-nonresponsive section, and additionally having a light-detection element 2 which outputs a detection signal responsive to the amount of light received by the p+ layers 10 and 11. A light-transparent molding 4 is provided at least over the light-detection element 2, and additionally a light-cutoff mask 5 is provided on the transparent molding 4. The relative positions of the light-cutoff mask, the p+ layers 10 and 11, and the n+ or n layer 9 are then established.
    Type: Grant
    Filed: December 14, 1994
    Date of Patent: January 14, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Kenichi Yokoyama, Koki Mizuno, Inao Toyoda, Yukio Tsuzuki
  • Patent number: 5578521
    Abstract: A silicon semiconductor substrate, on which an epitaxial layer is to be formed, is set in a reaction vessel having a heating mechanism, and a gas containing TMG and AsH.sub.3 is introduced into the reaction vessel with the substrate heated to 450.degree. C., thus forming, on the substrate, a low-temperature growth layer of amorphous or polycrystalline GaAs as a semiconductor substance having a different lattice constant from that of the substrate. Then, with the TMG removed from the introduced gas, the temperature of the semiconductor substrate is increased to 750.degree. C., to cause coagulation of atoms of the low-temperature growth layer, with a thermal treatment also being performed at this high temperature, to cause growth of island-like single crystal cores. Further, a high temperature growth process is conducted in a material gas atmosphere containing TMG, whereby a GaAs film is epitaxially grown on the semiconductor substrate surface.
    Type: Grant
    Filed: May 3, 1995
    Date of Patent: November 26, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Takamasa Suzuki, Kunihiko Hara, Hajime Inuzuka, Naomi Awano, Kouichi Hoshino
  • Patent number: 5551586
    Abstract: A method of manufacturing a magneto-electric conversion device having a large rate of change of magnetic resistance and which is easy to position with respect to a magnetized surface, and a moving subject displacement detector using a magneto-electric conversion device manufactured by that method. A magnet which rotates together with the rotation of a drive gear is magnetized in alternately differing north and south poles, arranged in an equal sized section from a center portion thereof. An IC chip is positioned opposite to and at a distance from the magnetized surface of the magnet. Magneto-electric conversion devices are located on the IC chip. These magneto-electric conversion devices are formed by repeated alternate depositions, onto a surface of a single-crystal silicon substrate, of magnetic cobalt films having a thickness of several to several tens of angstroms and non-magnetic copper films having a thickness of several to several tens of angstroms.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: September 3, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hirofumi Uenoyama, Kenichi Ao, Yasutoshi Suzuki, Yoshimi Yoshino, Motofumi Suzuki
  • Patent number: 5532910
    Abstract: A hybrid integrated circuit having a lead frame electrically connected to electronic components by means of a silver (Ag) paste, the hybrid integrated circuit comprising: an electroless-plated coating on the lead frame, the coating being free from an insulating surface oxide layer at least in a connection area in which the electrical connection is provided. A process of producing this hybrid integrated circuit comprises: a first step of electroless-plating a lead frame by using a phosphorus-containing reducing agent to form a coating on the lead frame; a second step of mounting electronic components on the lead frame and then electrically and mechanically connecting the former to the latter by means of an electroconductive paste; and a third step of maintaining the surface of the electroless-plated coating free from a phosphorus-containing oxide layer during the connecting operation.
    Type: Grant
    Filed: July 14, 1995
    Date of Patent: July 2, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Kenichi Ao, Yoshimi Yoshino, Ryoichi Narita, Hiroshi Omi
  • Patent number: 5471084
    Abstract: This invention relates to a magnetoresistive element used for a magnetic sensor, etc. A ferromagnetic magnetoresistive element thin film is formed so as to be electrically connected to and so as to overlap the upper end portion of an aluminum wiring metal on a substrate. Through using a vacuum heat treatment with a temperature between 350.degree. and 450.degree. C., a Ni--Al-based alloy is formed at the overlapping portion. Therefore, even when a surface protection film of silicon nitride is subsequently formed by plasma CVD on the substrate, the alloy prevents the nitriding of the upper end portion of the aluminum wiring metal. Accordingly, the surface can be protected from moisture by the silicon nitride film without increasing the contact resistance between the magnetoresistive element thin film and the wiring metal. Instead of the Ni--Al-based alloy, other conductive metals such as TiW, TiN, Ti, Zr, or the like may be used.
    Type: Grant
    Filed: July 30, 1993
    Date of Patent: November 28, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Kenichi Ao, Hirofumi Uenoyama, Hiroki Noguchi, Koji Eguchi, Ichiro Ito, Yoshimi Yoshino
  • Patent number: 5354412
    Abstract: A process for epitaxially growing a compound semiconductor layer containing at least arsenic on a single crystal silicon substrate, which prevents the silicon impurity from intruding said compound semiconductor layer. The process comprises supplying one of the starting material gas, ASH.sub.3, into the reaction furnace to effect growth, but in such a manner that the AsH.sub.3 gas is pyrolyzed in advance to thereby supply arsenic alone either in an atomic or a molecular state. The GaAs layer is thus epitaxially grown on a single crystal silicon substrate in the crystal growing chamber, i.e., the reaction furnace in the apparatus, under an atmosphere comprising atomic or molecular arsenic at a temperature in the range of from 400.degree. to 650.degree. C. and at a vacuum degree of about 0.1 Pa. By thus epitaxially growing GaAs layer under an atmosphere comprising atomic or molecular arsenic, the intrusion of silicon impurity into the GaAs layer during its growth can be effectively prevented.
    Type: Grant
    Filed: September 11, 1992
    Date of Patent: October 11, 1994
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Koki Mizuno
  • Patent number: 5244834
    Abstract: A Group III and V element compound semiconductor such as gallium arsenide is formed on a semiconductor wafer by so-called MOCVD. A first pair of convex portions, a second pair of convex portions and crossing portion are formed from such compound semiconductor by an etching using a predetermined etching substance so that one convex portion of each pair is opposite to the other convex portion thereof and that a same crystalline surface of the crossing portion is exposed at all points where the first pair of convex portions crosses the second pair of convex portions. A pair of input terminals and a pair of output terminals are electrically connected to each convex portion of the first pair and the second pair, respectively so as to input electric current to each convex portion of the first pair and to output voltage generated in response to a magnetic field strength in such compound semiconductor.
    Type: Grant
    Filed: August 24, 1992
    Date of Patent: September 14, 1993
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Namoi Awano, Kouichi Hoshino, Hajime Inuzka
  • Patent number: 5151764
    Abstract: A Group III and V element compound semiconductor such as gallium arsenide is formed on a semiconductor wafer by so-called MOCVD. A first pair of convex portions, a second pair of convex portions and crossing portion are formed from such compound semiconductor by an etching using a predetermined etching substance so that one convex portion of each pair is opposite to the other convex portion thereof and that a same crystalline surface of the crossing portion is exposed at all points where the first pair of convex portions crosses the second pair of convex portions. A pair of input terminals and a pair of output terminals are electrically connected to each convex portion of the first pair and the second pair, respectively so as to input electric current to each convex portion of the first pair and to output voltage generated in response to a magnetic field strength in such compound semiconductor.
    Type: Grant
    Filed: October 4, 1990
    Date of Patent: September 29, 1992
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Namoi Awano, Kouichi Hoshino, Hajime Inuzuka
  • Patent number: 4866825
    Abstract: An apparatus for cutting down or reducing the length of a finished slide fastener includes a pilot pin disposed immediately adjacent to the rear end of an element clamper and spaced from the rear end of an element cutter by a distance which is equal to the sum of the element pitch of a row of coupling elements and at least a half of the diameter of a monofilament constituting the row of coupling elements. With the pilot pin thus arranged, a length of coupling elements can be removed smoothly without the occurance of draw of a half-cut coupling element. The apparatus also includes a stopper disposed rearwardly of a top end-stop applicator and engageable with a bottom end stop of the slide fastener for setting the length of reduction from the slide fastener.
    Type: Grant
    Filed: December 28, 1987
    Date of Patent: September 19, 1989
    Assignee: Yoshida Kogyo K. K.
    Inventor: Yasutoshi Suzuki
  • Patent number: 4747210
    Abstract: An apparatus for holding a pair of sliders for application to a slide fastener chain comprises, in combination with a plurality of angularly spaced slider supports intermettently movable successively through a slider receiving position and a slider applying position, an auxiliary slider support mounted on a frame of the apparatus and disposed in lateral alignment with one of the slider supports which has been brought into the slider applying position. The auxiliary slider support is reversible in position relatively to the one slider holder in such a manner that the distance between the one slider support and the auxiliary support varies upon reversal of the auxiliary slider support.
    Type: Grant
    Filed: July 13, 1987
    Date of Patent: May 31, 1988
    Assignee: Yoshida Kogyo K. K.
    Inventor: Yasutoshi Suzuki
  • Patent number: 4721364
    Abstract: A dazzle-free reflection mirror, which may be used as an inner mirror or an outer mirror of a vehicle, has an electro-optical element of which transparency is changed by applying an electric field thereto in order to effectuate a dazzle-free operation. The dazzle-free reflection mirror comprises a dazzle-free portion to effectuate the dazzle-free operation at a lower part of the mirror surface and a non-dazzle-free portion not to effectuate the dazzle-free operation at the rest part of the mirror surface. The dazzle-free portion shields light from following-vehicle headlights at night so that the driver feels no glaring. The non-dazzle-free portion clearly images a rear view so that the driver can see an appearance of the following vehicle.
    Type: Grant
    Filed: August 9, 1985
    Date of Patent: January 26, 1988
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hiroshi Itoh, Yasutoshi Suzuki, Tsuyoshi Fukada, Shinya Ohmi, Kunihiko Hara
  • Patent number: 4697883
    Abstract: A control apparatus for controlling the glare shield of a reflecting mirror of a vehicle, wherein the reflecting mirror is provided with on the upper half and lower half portions respectively first and second electro-optic elements whose transmittance of light being variable, and when a first photo detecting circuit determines that incident light on the reflecting mirror detected by an incident light detector is the direct sunlight, a first control circuit applies a voltage to the first electro-optic element to cause the upper half portion of the reflecting mirror to become a glare shield condition, and when a second photo detecting circuit determines that the incident light detected by an incident light detector is light of a headlight of a following vehicle, a second control circuit applies the voltage to the second electro-optic element to cause the lower half portion of the reflecting mirror to become the glare shield condition.
    Type: Grant
    Filed: August 22, 1985
    Date of Patent: October 6, 1987
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Hiroshi Itoh, Shinya Ohmi, Kunihiko Hara
  • Patent number: 4687956
    Abstract: An apparatus for driving a liquid crystal element by an increased voltage and at a lowered frequency in conformity with temperature fall in the liquid crystal element so as to achieve complete driving of the element even in a low temperature range. In order to increase the driving voltage, the apparatus comprises a booster circuit for increasing a battery voltage, and a voltage divider circuit including an element-temperature sensor as a component thereof and serving to produce a control voltage by dividing the output voltage of the booster circuit. In such configuration, the booster circuit performs its operation in such a manner as to maintain constant the control voltage obtained from the voltage divider circuit.
    Type: Grant
    Filed: November 9, 1984
    Date of Patent: August 18, 1987
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hiroshi Itoh, Yasutoshi Suzuki, Tsuyoshi Fukada, Shinya Ohmi, Kunihiko Hara
  • Patent number: 4676601
    Abstract: A drive apparatus for a liquid crystal dazzlement preventing mirror arrangement for automatically setting a liquid crystal panel of the mirror arrangment to a dazzlement preventing state by detecting illuminance on the mirror surface and brightness in region near the mirror. An incident light detecting unit detects incident light onto the mirror. An ambient light detecting unit detects brightness in a region around mirror. A control unit receives both the incident light and the ambient light signals and produces a control signal for driving the liquid crystal panel through a drive unit.
    Type: Grant
    Filed: April 2, 1986
    Date of Patent: June 30, 1987
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hiroshi Itoh, Shinya Ohmi, Yasutoshi Suzuki, Tsuyoshi Fukada, Kunihiko Hara
  • Patent number: 4671615
    Abstract: A control apparatus for a dazzle-free reflection mirror of a vehicle is disclosed. The control apparatus is provided with a rear light sensor and a circuit for driving the reflection mirror into a dazzle-free condition in accordance with an intensity of a rear light detected by said rear light sensor when a light switch is turned on. The control apparatus is further provided with a winker manipulation detecting switch, a reverse position detecting switch and a steering wheel detecting switch for detecting a change in the moving direction of the vehicle. When one of them detects the change in the vehicle moving direction, the dazzle-free operation of the reflection mirror is disabled even if intensive light is incident to the reflection mirror from the rear of the vehicle.
    Type: Grant
    Filed: January 3, 1985
    Date of Patent: June 9, 1987
    Assignee: Nippondenso Co., Ltd.
    Inventors: Tsuyoshi Fukada, Yasutoshi Suzuki, Hiroshi Itoh, Shinya Ohmi, Kunihiko Hara