Abstract: In a forward shift operation, a second input signal having a higher voltage than a voltage of a first input signal is input to a second gate terminal in a case that a first gate terminal of a first transistor is charged, and a fourth input signal having a higher voltage than a voltage of a third input signal is input to a third gate terminal in a case that the first gate terminal of the first transistor is discharged. In a backward shift operation, the fourth input signal having a higher voltage than a voltage of the third input signal is input to the third gate terminal in a case that the first gate terminal of the first transistor is charged, and the second input signal having a higher voltage than a voltage of the first input signal is input to the second gate terminal in a case that the first gate terminal of the first transistor is discharged.

Abstract: An object of the present invention is to provide a compound having an anti-inflammatory activity or a pharmacologically acceptable salt thereof. The solution of the present invention is a compound of general formula (1) or a pharmacologically acceptable salt thereof. wherein the symbols in the formula are defined below: R1: e.g., a C1-C6 alkyl group; R2: a C1-C6 alkyl group; A: e.g., an oxygen atom; and R3: e.g., a C1-C6 alkyl group.

Abstract: A shift register circuit can achieve high definition of a display device with the smallest possible number of elements without causing defective operation. A unit circuit is provided with a thin film transistor functioning as an output control transistor; a thin film transistor precharging an internal node based on an on-level signal outputted from an output terminal of a previous stage; two thin film transistors provided in series with each other between the output terminal of the previous stage and the internal node of this stage; a thin film transistor provided between the internal node and an output terminal; and a thin film transistor pulling down the output terminal. The thin film transistors go to an on state only for a quarter period of a clock cycle which is a part of a period during which the output terminal of the previous stage is pulled down.

Abstract: In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

Abstract: In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

Abstract: A unit shift register circuit constitutes each stage of a shift register circuit. The unit shift register circuit includes an output transistor (T1) configured to input a prescribed clock signal (CK) to a drain terminal, and output an output signal (OUT) from a source terminal. The unit shift register circuit includes a setting transistor (T2) in which a source terminal is connected to a gate electrode of the output transistor (T1), is configured to input an input signal (S) to the drain terminal, and is configured to input to a gate electrode an input signal (VS) in a case of charging a gate electrode (node (VC)) of the output transistor (T1). The input signal (VS) having a voltage higher than that of the input signal (S).

Abstract: A shift register circuit can achieve high definition of a display device with the smallest possible number of elements without causing defective operation. A unit circuit is provided with a thin film transistor functioning as an output control transistor; a thin film transistor precharging an internal node based on an on-level signal outputted from an output terminal of a previous stage; two thin film transistors provided in series with each other between the output terminal of the previous stage and the internal node of this stage; a thin film transistor provided between the internal node and an output terminal; and a thin film transistor pulling down the output terminal. The thin film transistors go to an on state only for a quarter period of a clock cycle which is a part of a period during which the output terminal of the previous stage is pulled down.

Abstract: A display device includes: a display unit, a driver unit, and a control unit. The display unit includes a plurality of pixel units arranged in a matrix. The driver unit includes an output transistor configured to drive a plurality of scanning lines connected to the plurality of pixel units. The control unit is configured to supply to the driver unit in a display period, a signal for displaying an image on the display unit, and control a bias state of the output transistor in a display suspension period, so that an absolute value of a threshold voltage of the output transistor which is increased in the display period decreases.

Abstract: Each driving circuit in a shift register includes an output unit, a precharge unit, a boosting unit, a gate voltage discharge unit, a gate line discharge unit, and an internal line netA. The output unit includes a TFT(F) that outputs a selection voltage to a gate line. The precharge unit includes a TFT(B) that outputs a control voltage for causing the TFT in the output unit to operate. The boosting unit boosts up a gate voltage of the TFT in the output unit through a capacitor (Cbst). The gate voltage discharge unit includes a TFT(K) that pulls down this gate voltage during a non-selection period while the gate line is not selected. The gate line discharge unit includes a TFT(L) that outputs a non-selection voltage to the gate line during the non-selection period while the gate line is not selected. The internal line is connected to a gate terminal of the TFT in the output unit, the precharge unit, the gate voltage discharge unit, and the boosting unit.

Abstract: A shift register circuit has a plurality of unit circuits that are cascade-connected to one another and that output received pulse signals as output signals in accordance with a clock signal, the shift register circuit sequentially outputting the output signals from the plurality of respective unit circuits. The output circuits each include a double-gate transistor having first gate electrode that controls conductivity between the drain electrode and the source electrode, and a second gate electrode formed through an insulating layer and disposed to face the first gate electrode across a semiconductor layer between the drain electrode and the source electrode. The shift register circuit applies a prescribed voltage to the second gate electrode in accordance with a voltage applied to the first gate electrode.

Abstract: In a forward shift operation, a second input signal having a higher voltage than a voltage of a first input signal is input to a second gate terminal in a case that a first gate terminal of a first transistor is charged, and a fourth input signal having a higher voltage than a voltage of a third input signal is input to a third gate terminal in a case that the first gate terminal of the first transistor is discharged. In a backward shift operation, the fourth input signal having a higher voltage than a voltage of the third input signal is input to the third gate terminal in a case that the first gate terminal of the first transistor is charged, and the second input signal having a higher voltage than a voltage of the first input signal is input to the second gate terminal in a case that the first gate terminal of the first transistor is discharged.

Abstract: In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

Abstract: It is an object of the present invention to provide a medicament for preventing or treating hyperphosphatemia. Solution: A compound represented by a general formula (I) or a pharmacologically acceptable salt thereof. (In the formula, R1: a methyl group or the like, R2: a hydrogen atom or the like, R3: a hydrogen atom or the like, A: a cyclohexyl ring or the like, X: CH or the like, Y: CH or the like, Z: CH or the like, and n: 2 or the like).

Abstract: It is an object of the present invention to provide a medicament for preventing or treating hyperphosphatemia. Solution: A compound represented by a general formula (I) or a pharmacologically acceptable salt thereof. [In the formula, R1: a methyl group or the like, R2: a hydrogen atom or the like, R3: a hydrogen atom or the like, A: a cyclohexyl ring or the like, X: CH or the like, Y: CH or the like, Z: CH or the like, and n: 2 or the like].

Abstract: At the time of partial drive, the levels of voltages applied to data lines SL1 to SLn are switched according to a rewrite frequency set for each region of a display screen. For example, in a still-image display region with a relatively low rewrite frequency, the levels of the voltages applied to the data lines SL1 to SLn are set to be higher than those for a moving-image display region with a relatively high rewrite frequency. By this, the same effect as that obtained when a counter voltage is switched according to the rewrite frequency can be obtained. Thus, flicker occurring in each region of the display screen can be suppressed.

Abstract: It is an object of the present invention to provide a medicament for preventing or treating hyperphosphatemia. Solution: A compound represented by a general formula (I) or a pharmacologically acceptable salt thereof. [In the formula, R1: a methyl group or the like, R2: a hydrogen atom or the like, R3: a hydrogen atom or the like, A: a cyclohexyl ring or the like, X: CH or the like, Y: CH or the like, Z: CH or the like, and n: 2 or the like.

Abstract: A unit shift register circuit constitutes each stage of a shift register circuit. The unit shift register circuit includes an output transistor (T1) configured to input a prescribed clock signal (CK) to a drain terminal, and output an output signal (OUT) from a source terminal. The unit shift register circuit includes a setting transistor (T2) in which a source terminal is connected to a gate electrode of the output transistor (T1), is configured to input an input signal (S) to the drain terminal, and is configured to input to a gate electrode an input signal (VS) in a case of charging a gate electrode (node (VC)) of the output transistor (T1). The input signal (VS) having a voltage higher than that of the input signal (S).

Abstract: A semiconductor device (100A) includes a substrate (2), an oxide semiconductor layer (5) formed on the substrate (2), source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5), a first transparent electrode (7) electrically connected to the drain electrode (6d), a dielectric layer (8) formed on the source and drain electrodes (6s, 6d), and a second transparent electrode (9) formed on the dielectric layer (8). The upper and/or lower surface(s) of the first transparent electrode (7) contacts with a reducing insulating layer (8a) with the property of reducing an oxide semiconductor included in the oxide semiconductor layer (5). The second transparent electrode (9) overlaps at least partially with the first transparent electrode (7) via the dielectric layer (8). The oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of the same oxide film.

Abstract: In a display control circuit (200) of a display device, an image pattern detection portion (230) detects whether an image is an anti-flicker pattern or not, and when it is an anti-flicker pattern, a backlight source is driven (typically, such that its luminance changes in the opposite phase relative to luminance changes that would occur), on the basis of predicted values, which are predetermined so as to compensate for the luminance changes that would occur. Moreover, the backlight is not turned on during the scanning period. As a result, flicker due to current leakage, etc., can be reduced or eliminated in a display device for which a scanning period and a scan stop period are set.

Abstract: This semiconductor device (100A) includes: a substrate (2); a gate electrode (3) formed on the substrate (2); a gate insulating layer (4) formed over the gate electrode (3); an oxide semiconductor layer (5) formed on the gate insulating layer (4); source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5); a first transparent electrode (7) electrically connected to the drain electrode (6d); an interlayer insulating layer (8a) including portions formed on the source and drain electrodes (6s, 6d); and a second transparent electrode (9) formed on the interlayer insulating layer (8a). At least a portion of the second transparent electrode (9) overlaps with the first transparent electrode (7) with the interlayer insulating layer (8a) interposed between them. And the oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of a same oxide film.