Patents by Inventor Yeh Hsu

Yeh Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9484460
    Abstract: A semiconductor device includes a first type region including a first conductivity type and a second type region including a second conductivity type. The semiconductor device includes a channel region extending between the first type region and the second type region. The semiconductor device includes a gate electrode surrounding at least some of the channel region. A first gate edge of the gate electrode is separated a first distance from a first type region edge of the first type region and a second gate edge of the gate electrode is separated a second distance from a second type region edge of the second type region. The first distance is less than the second distance.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: November 1, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jean-Pierre Colinge, Tsung-Hsing Yu, Yeh Hsu, Chia-Wen Liu, Carlos H. Diaz
  • Patent number: 9451305
    Abstract: A method for introducing and playing a media is disclosed, in which the method is implemented through a display device that is capable of linking to a network. In the method, detection is performed to determine whether a display of the display device shows a channel preview frame, and a plurality of preliminary previews are automatically and sequentially played when the channel preview frame is showing on the display. Further, detection is performed to determine whether a user selects one of the preliminary previews, and the user is provided with options of channel subscribing or detailed preview when the user selects one of the preliminary previews. Next, a fee paying procedure is executed when the user chooses to subscribe to the channel, and a channel information of the channel subscribed to is set.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: September 20, 2016
    Assignee: WISTRON CORP.
    Inventors: Chien-Yeh Hsu, Po-Hsu Chen
  • Patent number: 9401326
    Abstract: A split contact structure includes a semiconductor substrate having a major surface; a first upwardly protruding structure disposed on the major surface; a first cell contact region in the major surface and being close to the first upwardly protruding structure; a second upwardly protruding structure disposed on the major surface; a second cell contact region in the major surface and being close to the second upwardly protruding structure; a first patterned layer stacked on the first upwardly protruding structure; a second patterned layer stacked on the first upwardly protruding structure; a first contact structure disposed on a sidewall of the first upwardly protruding structure and being in direct contact with the first cell contact region; and a second contact structure disposed on a sidewall of the second upwardly protruding structure and being in direct contact with the second cell contact region.
    Type: Grant
    Filed: May 24, 2015
    Date of Patent: July 26, 2016
    Assignee: INOTERA MEMORIES, INC.
    Inventors: Cheng-Yeh Hsu, Hsin-Pin Huang, Chih-Hao Cheng
  • Publication number: 20160166661
    Abstract: Immunogenic compositions, cancer vaccines and methods for treating cancer comprising FMS, the fucose-enriched polysaccharide fraction from Reishi F3, are provided. Compositions comprise fucose-enriched Reishi polysaccharide fraction (FMS) MW=˜35 kDa, wherein the FMS is isolated by size-exclusion chromatography from Reishi F3, and the FMS comprises polysaccharides having primarily a backbone selected from 1,4-mannan and 1,6-?-galactan, wherein the backbone is linked to a terminal fucose-containing side-chain Immunogenic compositions comprising glycolipid adjuvants are provided. Antibodies generated by immunogenic compositions disclosed herein bind cancer cells comprising antigens Globo H, Globo H, Gb3, Gb4, Gb5 (SSEA-3) and SSEA-4 on the cell surface.
    Type: Application
    Filed: July 26, 2014
    Publication date: June 16, 2016
    Inventors: Chi-Huey WONG, Chung-Yi WU, Hsien-Yeh HSU, Shih-Fen LIAO, Chi-Hui LIANG
  • Patent number: 9320068
    Abstract: An information exchange method includes steps of shaking a first electronic device and a second electronic device simultaneously; recording a first vibration waveform of the first electronic device and recording a second vibration waveform of the second electronic device; determining whether the first vibration waveform and the second vibration waveform match each other; and transmitting a first information related to the first electronic device to the second electronic device when the first vibration waveform and the second vibration waveform match each other.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: April 19, 2016
    Assignee: Wistron Corporation
    Inventors: Meng-Chao Kao, Hui-Chen Lin, Po-Hsu Chen, Ching-Nan Lin, Chien-Yeh Hsu, Cheng-Wei Lin
  • Publication number: 20160064560
    Abstract: The present disclosure relates to a transistor device having an epitaxial carbon layer and/or a carbon implantation region that provides for a low variation of voltage threshold, and an associated method of formation. In some embodiments, the transistor device has an epitaxial region arranged within a recess within a semiconductor substrate. The epitaxial region has a carbon doped silicon epitaxial layer and a silicon epitaxial layer disposed onto the carbon doped silicon epitaxial layer. A gate structure is arranged over the silicon epitaxial layer. The gate structure has a gate dielectric layer disposed onto the silicon epitaxial layer and a gate electrode layer disposed onto the gate dielectric layer. A source region and a drain region are arranged on opposing sides of a channel region disposed below the gate structure.
    Type: Application
    Filed: November 9, 2015
    Publication date: March 3, 2016
    Inventors: Tsung-Hsing Yu, Chia-Wen Liu, Yeh Hsu, Shih-Syuan Huang, Ken-Ichi Goto, Zhiqiang Wu
  • Publication number: 20160049472
    Abstract: A semiconductor device includes a nanowire structure and a stressor. The nanowire structure includes a first channel section and a second channel section. The stressor subjects the first channel section to a first strain level and the second channel section to a second strain level greater than the first strain level. The difference between the second strain level and the first strain level is less than the second strain level.
    Type: Application
    Filed: October 27, 2015
    Publication date: February 18, 2016
    Inventors: TSUNG-HSING YU, YEH HSU, CHIA-WEN LIU, JEAN-PIERRE COLINGE
  • Patent number: 9224814
    Abstract: The present disclosure relates to a method of forming a transistor device having a carbon implantation region that provides for a low variation of voltage threshold, and an associated apparatus. The method is performed by forming a well region within a semiconductor substrate. The semiconductor substrate is selectively etched to form a recess within the well region. After formation of the recess, a carbon implantation is selectively performed to form a carbon implantation region within the semiconductor substrate at a position underlying the recess. An epitaxial growth is then performed to form one or more epitaxial layers within the recess at a position overlying the carbon implantation region. Source and drain regions are subsequently formed within the semiconductor substrate such that a channel region, comprising the one or more epitaxial layers, separates the source/drains from one another.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: December 29, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Hsing Yu, Chia-Wen Liu, Yeh Hsu, Shih-Syuan Huang, Ken-Ichi Goto, Zhiqiang Wu
  • Patent number: 9196730
    Abstract: A semiconductor device with variable channel strain is provided. The semiconductor device comprises a nanowire structure formed as a channel between a source region and a drain region. The nanowire structure has a first channel section subjected to a first strain level and joined with a second channel section subjected to a second strain level different from the first strain level. The first channel section is coupled adjacent to the drain region and the second channel section is coupled adjacent to the source region. The semiconductor device further comprises a gate region that has a first strain section and a second strain section. The first strain section is configured to cause the first channel section to be subjected to the first strain level and the second strain section is configured to cause the second channel section to be subjected to the second strain level.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: November 24, 2015
    Assignee: Taiwan Seminconductor Manufacturing Company Limited
    Inventors: Tsung-Hsing Yu, Yeh Hsu, Chia-Wen Liu, Jean-Pierre Colinge
  • Publication number: 20150303302
    Abstract: A semiconductor device and method of forming the same are described. A semiconductor device includes an active area adjacent a channel in a semiconductor composite. The active area includes a first active area layer having a first dopant concentration, a second active area layer having a second dopant concentration over the first active area layer, and a third active area layer having a third dopant concentration, over the second active area. The third dopant concentration is greater than the second dopant concentration, and the second dopant concentration is greater than the first dopant concentration. The channel includes a second channel layer comprising carbon over a first channel layer and a third channel layer over the second channel layer. The active area configuration improves drive current and reduces contact resistance, and the channel configuration increases short channel control, as compared to a semiconductor device without the active area and channel configuration.
    Type: Application
    Filed: April 21, 2014
    Publication date: October 22, 2015
    Inventors: Tsung-Hsing Yu, Chia-Wen Liu, Yeh Hsu, Ken-Ichi Goto
  • Publication number: 20150263171
    Abstract: Some embodiments of the present disclosure relate to a semiconductor device configured to mitigate against parasitic coupling while maintaining threshold voltage control for comparatively narrow transistors. In some embodiments, a semiconductor device formed on a semiconductor substrate. The semiconductor device comprises a channel comprising an epitaxial layer that forms an outgrowth above the surface of the semiconductor substrate, and a gate material formed over the epitaxial layer. In some embodiments, a method of forming a semiconductor device is disclosed. The method comprises etching the surface of a semiconductor substrate to form a recess between first and second isolation structures, forming an epitaxial layer within the recess that forms an outgrowth above the surface of the semiconductor substrate, and forming a gate material over the epitaxial layer. Other embodiments are also disclosed.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 17, 2015
    Inventors: Yeh Hsu, Chia-Wen Liu, Tsung-Hsing Yu, Ken-Ichi Goto, Shih-Syuan Huang
  • Publication number: 20150263096
    Abstract: Some embodiments of the present disclosure relate to an epitaxially grown replacement channel region within a transistor, which mitigates the variations within the channel of the transistor due to fluctuations in the manufacturing processes. The replacement channel region is formed by recessing source/drain and channel regions of the semiconductor substrate, and epitaxially growing a replacement channel region within the recess, which comprises epitaxially growing a lower epitaxial channel region over a bottom surface of the recess, and epitaxially growing an upper epitaxial channel region over a bottom surface of the recess. The lower epitaxial channel region retards dopant back diffusion from the upper epitaxial channel region, resulting in a steep retrograde dopant profile within the replacement channel region. The upper epitaxial channel region increases carrier mobility within the channel.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 17, 2015
    Inventors: Tsung-Hsing Yu, Ken-Ichi Goto, Chia-Wen Liu, Yeh Hsu
  • Publication number: 20150244401
    Abstract: A transmitting device includes a transmitting chain, a configurable power amplifier device and an impedance tuning circuit. The transmitting chain is arranged to generate a radio frequency signal. The configurable power amplifier device is arranged to support at least a first power amplifier configuration and a second power amplifier configuration, wherein the configurable power amplifier device employs the first power amplifier configuration to receive and amplify the radio frequency signal when the transmitting device is operated in a first operation mode, and employs the second power amplifier configuration to receive and amplify the radio frequency signal when the transmitting device is operated in a second operation mode. The impedance tuning circuit is arranged to adjust an output impedance of the configurable power amplifier device employing the second power amplifier configuration when the transmitting device is operated in the second operation mode.
    Type: Application
    Filed: February 10, 2015
    Publication date: August 27, 2015
    Inventors: Yuan-Hung Chung, Meng-Hsiung Hung, Chun-Wei Lin, Wei-Kai Hong, Keng Leong Fong, George Chien, Ming-Yeh Hsu
  • Publication number: 20150236092
    Abstract: A semiconductor device with multi-level work function and multi-valued channel doping is provided. The semiconductor device comprises a nanowire structure and a gate region. The nanowire structure is formed as a channel between a source region and a drain region. The nanowire structure has a first doped channel section joined with a second doped channel section. The first doped channel section is coupled to the source region and has a doping concentration greater than the doping concentration of the second doped channel section. The second doped channel section is coupled to the drain region. The gate region is formed around the junction at which the first doped section and the second doped section are joined. The gate region has a first work function gate section joined with a second work function gate section. The first work function gate section is located adjacent to the source region and has a work function greater than the work function of the second work function gate section.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: TSUNG-HSING YU, YEH HSU, CHIA-WEN LIU, JEAN-PIERRE COLINGE
  • Publication number: 20150236145
    Abstract: A semiconductor device is provided having a channel formed from a nanowire with multi-level band gap energy. The semiconductor device comprises a nanowire structure formed between source and drain regions. The nanowire structure has a first band gap energy section joined with a second band gap energy section. The first band gap energy section is coupled to the source region and has a band gap energy level greater than the band gap energy level of the second band gap energy section. The second band gap energy section is coupled to the drain region. The first band gap energy section comprises a first material and the second band gap energy section comprises a second material wherein the first material is different from the second material. The semiconductor device further comprises a gate region around the junction between the first band gap energy section and the second band gap energy section.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: TSUNG-HSING YU, CHIA-WEN LIU, YEH HSU, JEAN-PIERRE COLINGE
  • Publication number: 20150228775
    Abstract: A semiconductor device having a channel formed from a nanowire with a multi-dimensional diameter is provided. The semiconductor device comprises a drain region formed on a semiconductor substrate. The semiconductor device further comprises a nanowire structure formed between a source region and the drain region. The nanowire structure has a first diameter section joined with a second diameter section. The first diameter section is coupled to the drain region and has a diameter greater than the diameter of the second diameter section. The second diameter section is coupled to the source region. The semiconductor device further comprises a gate region formed around the junction at which the first diameter section and the second diameter section are joined.
    Type: Application
    Filed: February 10, 2014
    Publication date: August 13, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: TSUNG-HSING YU, CHIA-WEN LIU, YEH HSU, JEAN-PIERRE COLINGE
  • Publication number: 20150200296
    Abstract: The present disclosure relates to a method of forming a transistor device having a carbon implantation region that provides for a low variation of voltage threshold, and an associated apparatus. The method is performed by forming a well region within a semiconductor substrate. The semiconductor substrate is selectively etched to form a recess within the well region. After formation of the recess, a carbon implantation is selectively performed to form a carbon implantation region within the semiconductor substrate at a position underlying the recess. An epitaxial growth is then performed to form one or more epitaxial layers within the recess at a position overlying the carbon implantation region. Source and drain regions are subsequently formed within the semiconductor substrate such that a channel region, comprising the one or more epitaxial layers, separates the source/drains from one another.
    Type: Application
    Filed: January 16, 2014
    Publication date: July 16, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Hsing Yu, Chia-Wen Liu, Yeh Hsu, Shih-Syuan Huang, Ken-Ichi Goto, Zhiqiang Wu
  • Publication number: 20150076596
    Abstract: A semiconductor device includes a first type region including a first conductivity type and a second type region including a second conductivity type. The semiconductor device includes a channel region extending between the first type region and the second type region. The semiconductor device includes a gate electrode surrounding at least some of the channel region. A first gate edge of the gate electrode is separated a first distance from a first type region edge of the first type region and a second gate edge of the gate electrode is separated a second distance from a second type region edge of the second type region. The first distance is less than the second distance.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 19, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jean-Pierre Colinge, Tsung-Hsing Yu, Yeh Hsu, Chia-Wen Liu, Carlos H. Diaz
  • Publication number: 20140289751
    Abstract: A method for introducing and playing a media is disclosed, in which the method is implemented through a display device that is capable of linking to a network. In the method, detection is performed to determine whether a display of the display device shows a channel preview frame, and a plurality of preliminary previews are automatically and sequentially played when the channel preview frame is showing on the display. Further, detection is performed to determine whether a user selects one of the preliminary previews, and the user is provided with options of channel subscribing or detailed preview when the user selects one of the preliminary previews. Next, a fee paying procedure is executed when the user chooses to subscribe to the channel, and a channel information of the channel subscribed to is set.
    Type: Application
    Filed: February 4, 2014
    Publication date: September 25, 2014
    Applicant: WISTRON CORP.
    Inventors: Chien-Yeh HSU, Po-Hsu CHEN
  • Publication number: 20130282306
    Abstract: An information exchange method includes steps of shaking a first electronic device and a second electronic device simultaneously; recording a first vibration waveform of the first electronic device and recording a second vibration waveform of the second electronic device; determining whether the first vibration waveform and the second vibration waveform match each other; and transmitting a first information related to the first electronic device to the second electronic device when the first vibration waveform and the second vibration waveform match each other.
    Type: Application
    Filed: August 10, 2012
    Publication date: October 24, 2013
    Inventors: Meng-Chao Kao, Hui-Chen Lin, Po-Hsu Chen, Ching-Nan Lin, Chien-Yeh Hsu, Cheng-Wei Lin