Patents by Inventor Yen-Chung Chen

Yen-Chung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190303286
    Abstract: An apparatus and a method for accessing a plurality of memory blocks is disclosed. The An apparatus comprises: a memory circuit configured to store a recording table, wherein the recording table corresponds to quality index of the plurality of memory blocks; and a control circuit configured to group the plurality of memory blocks to a first memory group and a second memory group according to the quality index; to enable to access the memory blocks in the first memory group, and to disable to access the memory blocks in the second memory group.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 3, 2019
    Inventors: Yen-Chung Chen, Chih-Ching Chien, Li-Chun Huang, Han-Ting Tsai, Wei-Ren Hsu
  • Publication number: 20190213066
    Abstract: A memory device includes a memory module and a control module. The control module is coupled to the memory module and is configured to store data into the memory module according to a first mapping table. The control module includes a storing unit and a guaranteeing unit. The storing unit is configured to store the first mapping table. The guaranteeing unit is coupled to the storing unit and is configured to determine whether the first mapping table is correct or not. The guaranteeing unit is further configured to issue an error signal in a state where the first mapping table is incorrect.
    Type: Application
    Filed: March 12, 2019
    Publication date: July 11, 2019
    Inventors: Yen-Chung CHEN, Cheng-Yu CHEN, Chih-Ching CHIEN
  • Publication number: 20190196714
    Abstract: A computing system including a memory, a processor and a solid state disk is provided. The memory stores a disk access driver program. The solid state disk includes a storage circuit and a control circuit. The control circuit includes a processing unit, a first access path and a second access path. The processing unit communicates with the processor through the first access path. The processor executes the driver program that enables the processor to process a disk access command for directly accessing the storage circuit of the solid state disk through the second access path.
    Type: Application
    Filed: March 6, 2019
    Publication date: June 27, 2019
    Inventors: Chen-Yu CHEN, Chih-Ching CHIEN, Yen-Chung CHEN
  • Patent number: 10280339
    Abstract: A method for manufacturing a flexible electrical device is provided and includes the following steps. A carrier substrate is provided. A releasing layer is formed on the carrier substrate. A flexible substrate is formed on the releasing layer. The flexible substrate has a first surface facing the releasing layer and a second surface opposite to the first surface. The flexible substrate is not in contact with the carrier substrate. A device layer is formed on the flexible substrate. The device layer has a third surface facing the flexible substrate and a fourth surface opposite to the third surface. The flexible substrate is separated from the releasing layer, and the releasing layer remains on the carrier substrate. Accordingly, the releasing layer and the carrier substrate can be recycled for forming another flexible electrical device.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: May 7, 2019
    Assignees: HannStar Display (Nanjing) Corporation, HannStar Display Corporation
    Inventors: Yen-Chung Chen, Chen-Hao Su
  • Patent number: 10255123
    Abstract: A memory device includes a memory module and a control module. The control module is coupled to the memory module and is configured to store data into the memory module according to a first mapping table. The control module includes a storing unit and a guaranteeing unit. The storing unit is configured to store the first mapping table. The guaranteeing unit is coupled to the storing unit and is configured to determine whether the first mapping table is correct or not. The guaranteeing unit is further configured to issue an error signal in a state where the first mapping table is incorrect.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: April 9, 2019
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Yen-Chung Chen, Cheng-Yu Chen, Chih-Ching Chien
  • Patent number: 10248559
    Abstract: The present disclosure provides a weighting-type data relocation control device for controlling data relocation of a non-volatile memory which includes used blocks and unused blocks. Each used block is associated with a first parameter and a second parameter. The control device executes the following steps: multiplying the first and second parameters by a first and a second weightings respectively to obtain a priority index, in which at least one of the parameters and/or at least one of the weightings relate(s) to a thermal detection result; comparing the priority index with at least a threshold to obtain a comparison result; and if the comparison result corresponding to a used storage block of the used blocks reaches a predetermined threshold, transferring valid data of the used storage block to one of the unused blocks.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: April 2, 2019
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Yen-Chung Chen, Chih-Ching Chien, Fu-Hsin Chen
  • Patent number: 10235050
    Abstract: A computing system including a memory, a processor and a solid state disk is provided. The memory stores a disk access driver program. The solid state disk includes a storage circuit and a control circuit. The control circuit includes a processing unit, a first access path and a second access path. The processing unit communicates with the processor through the first access path. The processor executes the driver program that enables the processor to process a disk access command for directly accessing the storage circuit of the solid state disk through the second access path.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: March 19, 2019
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Yu Chen, Chih-Ching Chien, Yen-Chung Chen
  • Patent number: 10216665
    Abstract: A control method includes detecting an operational command to a first memory unit, interrupting an operational status of a second memory unit, asserting the operational command corresponding to the first memory unit, and recovering the operational status of the second memory unit. The first memory unit and the second memory unit correspond to the same channel.
    Type: Grant
    Filed: November 27, 2016
    Date of Patent: February 26, 2019
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Yen-Chung Chen, Li-Chun Huang, Wang-Sheng Lin
  • Publication number: 20190004642
    Abstract: A manufacturing method of the flexible panel is provided. Firstly, a carrier substrate is provided. Then, an adhesion layer is formed on the carrier substrate, a flexible substrate is formed on the adhesion layer, and a buffer layer is formed on the flexible substrate. Then, a device layer is formed on the flexible substrate. Next, a separating process is performed for separating the flexible substrate and the device layer from the carrier substrate. According to a relation between a thermal expansion coefficient of the flexible substrate and a thermal expansion coefficient of the carrier substrate, the manufacturing method of the flexible panel selects a pattern of the adhesion layer. The pattern of the adhesion layer includes a frame adhesion structure or a plane adhesion structure.
    Type: Application
    Filed: September 29, 2017
    Publication date: January 3, 2019
    Inventors: Yen-Chung Chen, Wei-Chih Hsu, Chen-Hao Su
  • Publication number: 20180346761
    Abstract: A method for manufacturing a flexible electrical device is provided and includes the following steps. A carrier substrate is provided. A releasing layer is formed on the carrier substrate. A flexible substrate is formed on the releasing layer. The flexible substrate has a first surface facing the releasing layer and a second surface opposite to the first surface. The flexible substrate is not in contact with the carrier substrate. A device layer is formed on the flexible substrate. The device layer has a third surface facing the flexible substrate and a fourth surface opposite to the third surface. The flexible substrate is separated from the releasing layer, and the releasing layer remains on the carrier substrate. Accordingly, the releasing layer and the carrier substrate can be recycled for forming another flexible electrical device.
    Type: Application
    Filed: October 12, 2017
    Publication date: December 6, 2018
    Inventors: Yen-Chung CHEN, Chen-Hao SU
  • Publication number: 20180323956
    Abstract: A clock and data recovery device includes a data analysis circuit, a loop filter circuit, and a phase adjust circuit. The data analysis circuit is configured to generate an error signal according to input data, a first clock signal, and a second clock signal. The loop filter circuit is configured to generate an adjust signal according to the error signal. A phase filter circuit is configured to generate a first control signal according to the error signal. A switching element of a first frequency filter circuit is configured to output a second control signal according to the error signal and a first switching signal that has a first period. A first adder is configured to generate the adjust signal according to the first control signal and the second control signal. The phase adjust circuit is configured to adjust the first clock signal and the second clock signal.
    Type: Application
    Filed: May 3, 2017
    Publication date: November 8, 2018
    Inventors: Yen-Chung CHEN, Wen-Juh KANG, Cheng-Hung WU
  • Patent number: 10090844
    Abstract: A clock and data recovery module includes a clock and data recovery loop and a spread spectrum clock tracking circuit. The clock and data recovery loop includes a clock and data recovery unit and a first phase interpolator. The first phase interpolator is coupled to the clock and data recovery unit and configured to generate a data clock signal and an edge clock signal according to a phase signal and a reference clock signal. The clock and data recovery unit is configured to generate the phase signal according to a data signal, the data clock signal and the edge clock signal. The spread spectrum clock tracking circuit is configured to generate the reference clock signal according to the data signal, and to transmit the reference clock signal to the first phase interpolator. The spread spectrum clock tracking circuit is decoupled to the clock and data recovery loop.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: October 2, 2018
    Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Chung Chen, Wen-Juh Kang, Yi-Lin Lee
  • Publication number: 20180239401
    Abstract: A multi-axis hinge includes a first shaft, a first rotary member pivotally connected to the first shaft, a second shaft fixed to the first rotary member, a second rotary member pivotally connected to the second shaft, a first switching pin movably configured at the first rotary member, and a switching member fixed to the first shaft. The switching member includes a switching recess. When the first switching pin is located at the switching recess of the switching member, the second rotary member is rotatable relatively to the first rotary member. The second rotary member includes a switching recess. When the first switching pin is located at the switching recess of the second rotary member, the second rotary member is fixed to the first rotary member. An electronic device with the multi-axis hinge is also disclosed therein.
    Type: Application
    Filed: February 9, 2018
    Publication date: August 23, 2018
    Inventors: Yu-Kang LIN, Yu-Min LIU, Yen-Chung CHEN
  • Publication number: 20180188551
    Abstract: The display device includes a first display panel and a second display panel. The first display panel includes first pixel structures having a first pixel pitch. The second display panel includes second pixel structures having a second pixel pitch. The first display panel is overlapped with the second display panel. A user would not see a moiré pattern generated by the display device by adjusting the first pixel pitch, the second pixel pitch, and an effective distance between the first display panel and the second display panel.
    Type: Application
    Filed: July 6, 2017
    Publication date: July 5, 2018
    Inventors: Yu-Chen LIU, Wei-Chih HSU, Yen-Chung CHEN
  • Patent number: 9944567
    Abstract: A method of inhibiting an irregular aggregation of a nanosized powder includes (A) providing a nanosized ceramic powder to perform thereon a thermal analysis and thereby attain an endothermic peak temperature; (B) performing an impurity-removal heat treatment on the nanosized ceramic powder at a temperature higher than the endothermic peak temperature; (C) switching the nanosized ceramic powder from a temperature environment of the impurity-removal heat treatment to an environment of a temperature higher than a phase change temperature of the nanosized ceramic powder, followed by performing a calcination heat treatment on the nanosized ceramic powder in the environment of the temperature higher than the phase change temperature of the nanosized ceramic powder, wherein the nanosized ceramic powder skips the temperature environment between impurity-removal heat treatment and calcination heat treatment to shun generating a vermicular structure, avoid crystalline irregularity and abnormal growth, reduce particle
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: April 17, 2018
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Li-Jiuan Chen, Yen-Chung Chen, Hong-Fang Huang, Yu-Chun Wu
  • Publication number: 20180069554
    Abstract: A clock and data recovery module includes a clock and data recovery loop and a spread spectrum clock tracking circuit. The clock and data recovery loop includes a clock and data recovery unit and a first phase interpolator. The first phase interpolator is coupled to the clock and data recovery unit and configured to generate a data clock signal and an edge clock signal according to a phase signal and a reference clock signal. The clock and data recovery unit is configured to generate the phase signal according to a data signal, the data clock signal and the edge clock signal. The spread spectrum clock tracking circuit is configured to generate the reference clock signal according to the data signal, and to transmit the reference clock signal to the first phase interpolator. The spread spectrum clock tracking circuit is decoupled to the clock and data recovery loop.
    Type: Application
    Filed: June 9, 2017
    Publication date: March 8, 2018
    Inventors: Yen-Chung CHEN, Wen-Juh KANG, Yi-Lin LEE
  • Patent number: 9906231
    Abstract: A clock and data recovery (CDR) circuit is provided, and includes a sampling circuit, an error sampler, a phase detect circuit, and a phase adjust circuit. The sampling circuit generates a data signal according to an input data and a first clock signal, and generates an edge signal according to the input data and a second clock signal. The error sampler compares the input data with a reference voltage according to the first clock signal to generate a control signal. The phase detect circuit receives the control signal and generates a corrective signal according to the data signal and the edge signal. When the values of the control signal and the data signal are different, the phase detect circuit stops transmitting the corrective signal. The phase adjust circuit generates and adjusts the first and the second clock signal according to the corrective signal.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: February 27, 2018
    Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Juh Kang, Yen-Chung Chen, Chen-Yang Pan
  • Patent number: 9841789
    Abstract: A hinge assembly adapted to an electronic device is provided. The hinge assembly comprises a fixing member, a sliding shaft, a connecting member, a rotating shaft and a rotating member. A curved guide rail is formed at the side plate. When the sliding shaft is located at a first position and a force applies on the rotating member, the sliding shaft moves from the first position to a second position along the curved guide rail, when the sliding shaft is located at the second position of the curved guide rail and the force applies on the rotating member continuously, the rotating member rotates around the rotating shaft.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: December 12, 2017
    Assignee: Asustek Computer Inc.
    Inventors: Yu-Kang Lin, Yen-Chung Chen, Chung-Chieh Huang, Chien-Hsun Chen
  • Publication number: 20170337146
    Abstract: A control method includes detecting an operational command to a first memory unit, interrupting an operational status of a second memory unit, asserting the operational command corresponding to the first memory unit, and recovering the operational status of the second memory unit. The first memory unit and the second memory unit correspond to the same channel.
    Type: Application
    Filed: November 27, 2016
    Publication date: November 23, 2017
    Inventors: Yen-Chung CHEN, Li-Chun HUANG, Wang-Sheng LIN
  • Publication number: 20170336975
    Abstract: A computing system including a memory, a processor and a solid state disk is provided. The memory stores a disk access driver program. The solid state disk includes a storage circuit and a control circuit. The control circuit includes a processing unit, a first access path and a second access path. The processing unit communicates with the processor through the first access path. The processor executes the driver program that enables the processor to process a disk access command for directly accessing the storage circuit of the solid state disk through the second access path.
    Type: Application
    Filed: May 17, 2017
    Publication date: November 23, 2017
    Inventors: Cheng-Yu CHEN, Chih-Ching CHIEN, Yen-Chung CHEN