Abstract: Provided herein are chemical-mechanical planarization (CMP) systems and methods to reduce metal particle pollution on dressing disks and polishing pads. Such methods may include contacting a dressing disk and at least one conductive element with an electrolyte solution and applying direct current (DC) power to the dressing disk and the at least one conductive element.

Abstract: The present disclosure provides a semiconductor device and a method of forming the same. A semiconductor device according to the present disclosure includes a first source/drain feature and a second source/drain feature over a substrate, a plurality of channel members extending between the first source/drain feature and the second source/drain feature, a plurality of inner spacer features interleaving the plurality of channel members, a gate structure wrapping around each of the plurality of channel members, and a semiconductor liner sandwiched between the gate structure and each of the plurality of inner spacer features.

Abstract: A semiconductor device and methods of forming the semiconductor device are described herein and are directed towards forming a source/drain contact plug for adjacent finFETs. The source/drain regions of the adjacent finFETs are embedded in an interlayer dielectric and are separated by an isolation region of a cut-metal gate (CMG) structure isolating gate electrodes of the adjacent finFETs The methods include recessing the isolation region, forming a contact plug opening through the interlayer dielectric to expose portions of a contact etch stop layer disposed over the source/drain regions through the contact plug opening, the contact etch stop layer being a different material from the material of the isolation region. Once exposed, the portions of the CESL are removed and a conductive material is formed in the contact plug opening and in contact with the source/drain regions of the adjacent finFETs and in contact with the isolation region.

Abstract: A method includes providing dummy gate structures disposed over a device region and over an isolation region adjacent the active region, first gate spacers disposed along sidewalls of the dummy gate structures in the active region, and second gate spacers disposed along sidewalls of the dummy gate structures in the isolation region, removing top portions of the second, but not the first gate spacers, forming a first dielectric layer over the first gate spacers and remaining portions of the second gate spacers, replacing the dummy gate structures with metal gate structures after the forming of the first dielectric layer, removing the first gate spacers after the replacing of the dummy gate structures, and forming a second dielectric layer over top surfaces of the metal gate structures and of the first dielectric layer.

Abstract: A reception-transmission device includes a first interface circuit, for transforming at least one first WLAN signal to at least one first Ethernet frame when receiving the at least one first WLAN signal, and for transforming at least one second Ethernet frame to at least one second WLAN signal when receiving the at least one second Ethernet frame. The reception-transmission device includes a reception-transmission circuit, coupled to the first interface circuit, for transmitting the at least one first WLAN signal to the first interface circuit when receiving the at least one first WLAN signal, and for transmitting the at least one second WLAN signal to a WLAN when receiving the at least one second WLAN signal.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate, at least two gate structures disposed over the substrate, each of the at least two gate structures including a gate electrode and a spacer disposed along sidewalls of the gate electrode, wherein the spacer includes a refill portion and a bottom portion, the refill portion of the spacer has a funnel shape such that a top surface of the refill portion of the spacer is larger than a bottom surface of the refill portion of the spacer, and a source/drain contact disposed over the substrate and between the spacers of the at least two gate structures.

Abstract: An antenna structure is provided, which includes a substrate, an antenna unit and a metal ground. The substrate includes a first surface and a second surface; the antenna unit disposed on the first surface includes a radiation part, a feeding part and a feeding line, where the feeding line includes a first transmission line and a second transmission line that are perpendicular to each other and connected to each other, and the first transmission line is connected to the radiation part via the feeding part; and the metal ground disposed on the second surface has an edge which is perpendicular to projection of the radiation part to the metal ground; and a resonance slot is disposed on the metal ground, and its position corresponds between projection of the second transmission line to the metal ground and the edge.

Abstract: A keyswitch assembly includes a switch module, a support mechanism, a blocking mechanism, an enhancing light source, and a backlight source. The switch module includes a substrate, a signal generator, and a signal sensor. The signal generator generates a sensing signal. The signal sensor receives the sensing signal to obtain a sensing strength. The support mechanism is disposed on the substrate. The blocking mechanism is disposed on the substrate and has a light-permeable portion. A portion of the blocking mechanism inserts into or escapes from a gap between the signal generator and the signal sensor. The backlight source is disposed on the substrate and located outside the vertical projection of the blocking mechanism on the substrate. The enhancing light source is disposed on the substrate and located within the vertical projection of the blocking mechanism on the substrate and corresponds to the light-permeable portion.

Abstract: In an embodiment, a method includes: forming a fin extending from a substrate, the fin having a first width and a first height after the forming; forming a dummy gate stack over a channel region of the fin; growing an epitaxial source/drain in the fin adjacent the channel region; and after growing the epitaxial source/drain, replacing the dummy gate stack with a metal gate stack, the channel region of the fin having the first width and the first height before the replacing, the channel region of the fin having a second width and a second height after the replacing, the second width being less than the first width, the second height being less than the first height.

Abstract: A keyswitch assembly includes a switch module, a support mechanism, and a blocking mechanism. The switch module includes a substrate, a signal generator, and a signal sensor. The signal generator provides a sensing signal. The signal sensor receives the sensing signal to obtain a sensing intensity. The support mechanism is disposed on the substrate. A top portion of the support mechanism moves in response to a pressing force. The blocking mechanism includes a pivoting portion rotatably disposed on the substrate, a connecting piece extending from the pivoting portion and movably connected to the support mechanism to be driven by the top portion to swivel relative to the substrate, and a blocking piece extending from the pivoting portion and driven by the connecting piece to be inserted into or escape from the gap between the signal generator and the signal sensor to change the magnitude of the sensing intensity.

Abstract: Provided herein are chemical-mechanical planarization (CMP) systems and methods to reduce metal particle pollution on dressing disks and polishing pads. Such methods may include contacting a dressing disk and at least one conductive element with an electrolyte solution and applying direct current (DC) power to the dressing disk and the at least one conductive element.

Abstract: The present disclosure provides a semiconductor device and a method of forming the same. A semiconductor device according to the present disclosure includes a first source/drain feature and a second source/drain feature over a substrate, a plurality of channel members extending between the first source/drain feature and the second source/drain feature, a plurality of inner spacer features interleaving the plurality of channel members, a gate structure wrapping around each of the plurality of channel members, and a semiconductor liner sandwiched between the gate structure and each of the plurality of inner spacer features.

Abstract: In an exemplary aspect, the present disclosure is directed to a device. The device includes a fin-shaped structure extending lengthwise along a first direction. The fin-shaped structure includes a stack of semiconductor layers arranged one over another along a second direction perpendicular to the first direction. The device also includes a first source/drain feature of a first dopant type on the fin-shaped structure and spaced away from the stack of semiconductor layers. The device further includes a second source/drain feature of a second dopant type on the fin-shaped structure over the first source/drain feature along the second direction and connected to the stack of semiconductor layers. The second dopant type is different from the first dopant type. Furthermore, the device additionally includes an isolation feature interposing between the first source/drain feature and the second source/drain features.

Abstract: A rebounding pivot module includes a mounting shaft, and a bouncing device set including a barrel having one end tooth shaped, a connecting tube mounted in the other end of the barrel, a connection rod connected to the connecting tube, a socket and a first guide block mounted onto the connection rod, the first guide block having one end beveled, a bouncing barrel mounted around the connecting rod, a second guide block supported on an elastic member in the bouncing barrel and defining therein a guide hole and having one end tooth shaped and abutted at the beveled edge of the first guide block, and a lock device fastened to connection rod that is inserted through the second guide block, the elastic member and the through hole of the bouncing barrel to lock the bouncing barrel to the connection rod.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a first active region adjacent a channel, the channel, and a second active region adjacent the channel. The channel has a channel doping profile. The channel includes a central channel portion having a first dopant concentration of a first dopant and a radial channel portion surrounding the central channel portion. The radial channel portion has a second dopant concentration of a second dopant greater than the first dopant concentration. The channel comprising the central channel portion and the radial channel portion has increased voltage threshold tuning as compared to a channel that lacks a central channel portion and a radial channel portion.

Abstract: A method includes forming a semiconductor fin protruding higher than top surfaces of isolation regions. A top portion of the semiconductor fin is formed of a first semiconductor material. A semiconductor cap layer is formed on a top surface and sidewalls of the semiconductor fin. The semiconductor cap layer is formed of a second semiconductor material different from the first semiconductor material. The method further includes forming a gate stack on the semiconductor cap layer, forming a gate spacer on a sidewall of the gate stack, etching a portion of the semiconductor fin on a side of the gate stack to form a first recess extending into the semiconductor fin, recessing the semiconductor cap layer to form a second recess directly underlying a portion of the gate spacer, and performing an epitaxy to grow an epitaxy region extending into both the first recess and the second recess.

Abstract: A reception-transmission device includes a first interface circuit, for transforming at least one first WLAN signal to at least one first Ethernet frame when receiving the at least one first WLAN signal, and for transforming at least one second Ethernet frame to at least one second WLAN signal when receiving the at least one second Ethernet frame. The reception-transmission device includes a reception-transmission circuit, coupled to the first interface circuit, for transmitting the at least one first WLAN signal to the first interface circuit when receiving the at least one first WLAN signal, and for transmitting the at least one second WLAN signal to a WLAN when receiving the at least one second WLAN signal.

Abstract: In an embodiment, a method includes: forming a fin extending from a substrate, the fin having a first width and a first height after the forming; forming a dummy gate stack over a channel region of the fin; growing an epitaxial source/drain in the fin adjacent the channel region; and after growing the epitaxial source/drain, replacing the dummy gate stack with a metal gate stack, the channel region of the fin having the first width and the first height before the replacing, the channel region of the fin having a second width and a second height after the replacing, the second width being less than the first width, the second height being less than the first height.

Abstract: A fin structure of a FinFET device is formed over a substrate. A first layer is formed over the fin structure. A gate layer is formed over the fin structure and over the first layer. The gate layer is patterned into a gate stack that wraps around the fin structure. A second layer is formed over the first layer and over the gate stack. A first etching process is performed to remove portions of the second layer formed over the fin structure, the first layer serves as an etching-stop layer during the first etching process. A second etching process is performed to remove portions of the first layer to expose a portion of the fin structure. A removal of the portions of the first layer does not substantially affect the second layer. A source/drain region is epitaxially grown on the exposed portion of the fin structure.

Abstract: The present disclosure provides a semiconductor device and a method of forming the same. A semiconductor device according to the present disclosure includes a first source/drain feature and a second source/drain feature over a substrate, a plurality of channel members extending between the first source/drain feature and the second source/drain feature, a plurality of inner spacer features interleaving the plurality of channel members, a gate structure wrapping around each of the plurality of channel members, and a semiconductor liner sandwiched between the gate structure and each of the plurality of inner spacer features.