Abstract: Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.

Abstract: Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.

Abstract: Disclosed herein is a computer-implemented method for determining an overlapping process window (OPW) of an area of interest on a portion of a design layout for a device manufacturing process for imaging the portion onto a substrate, the method including: obtaining a plurality of features in the area of interest; obtaining a plurality of values of one or more processing parameters of the device manufacturing process; determining existence of defects, probability of the existence of defects, or both in imaging the plurality of features by the device manufacturing process under each of the plurality of values; and determining the OPW of the area of interest from the existence of defects, the probability of the existence of defects, or both.

Abstract: A method to determine an overlay error between a first structure and a second structure, wherein the first structure and second structures are on different layers on a substrate and are imaged onto the substrate by a lithographic process, the method comprising: obtaining an apparent overlay error; obtaining a systematic error caused by a factor other than misalignment of the first and second structures; and determining the overlay error by removing the systematic error from the apparent overlay error. The method may alternatively comprise obtaining apparent characteristics of diffraction orders of diffraction by an overlapping portion of the first and second structures; obtaining corrected characteristics of the diffraction orders; determining the overlay error from the corrected characteristics; and adjusting a characteristic of the lithographic process based on the overlay error.

Abstract: A method to improve a lithographic process for imaging a portion of a design layout onto a substrate using a lithographic projection apparatus, the method including: obtaining a target feature; generating a perturbed target feature from the target feature by applying a perturbation thereto; generating a set of training examples includes the perturbed target feature and an indication as whether the perturbed target feature is deemed the same as the target feature; training a learning model with the set of training examples; classifying features in the portion of the design layout into at least two classes: being deemed the same as the target feature, and being deemed different from the target feature.

Abstract: Disclosed herein is a computer-implemented method for determining an overlapping process window (OPW) of an area of interest on a portion of a design layout for a device manufacturing process for imaging the portion onto a substrate, the method comprising: obtaining a plurality of features in the area of interest; obtaining a plurality of values of one or more processing parameters of the device manufacturing process; determining existence of defects, probability of the existence of defects, or both in imaging the plurality of features by the device manufacturing process under each of the plurality of values; and determining the OPW of the area of interest from the existence of defects, the probability of the existence of defects, or both.

Abstract: Described herein is a method for obtaining a preferred layout for a lithographic process, the method comprising: identifying an initial layout including a plurality of features; and reconfiguring the features until a termination condition is satisfied, thereby obtaining the preferred layout; wherein the reconfiguring comprises evaluating a cost function that measures how a lithographic metric is affected by a set of changes to the features for a plurality of lithographic process conditions, and expanding the cost function into a series of terms at least some of which are functions of characteristics of the features.

Abstract: Described herein is a method of processing a pattern layout for a lithographic process, the method comprising: identifying a feature from a plurality of features of the layout, the feature violating a pattern layout requirement; and reconfiguring the feature, wherein the reconfigured feature still violates the pattern layout requirement, the reconfiguring including evaluating a cost function that measures a lithographic metric affected by a change to the feature and a parameter characteristic of relaxation of the pattern layout requirement.

Abstract: A method to determine an overlay error between a first structure and a second structure, wherein the first structure and second structures are on different layers on a substrate and are imaged onto the substrate by a lithographic process, the method comprising: obtaining an apparent overlay error; obtaining a systematic error caused by a factor other than misalignment of the first and second structures; and determining the overlay error by removing the systematic error from the apparent overlay error. The method may alternatively comprise obtaining apparent characteristics of diffraction orders of diffraction by an overlapping portion of the first and second structures; obtaining corrected characteristics of the diffraction orders; determining the overlay error from the corrected characteristics; and adjusting a characteristic of the lithographic process based on the overlay error.

Abstract: Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.

Abstract: Disclosed herein is a computer-implemented method for determining an overlapping process window (OPW) of an area of interest on a portion of a design layout for a device manufacturing process for imaging the portion onto a substrate, the method comprising: obtaining a plurality of features in the area of interest; obtaining a plurality of values of one or more processing parameters of the device manufacturing process; determining existence of defects, probability of the existence of defects, or both in imaging the plurality of features by the device manufacturing process under each of the plurality of values; and determining the OPW of the area of interest from the existence of defects, the probability of the existence of defects, or both.

Abstract: The present invention provides a method of SNP detection by using gene detection in bead-based microfluidics comprising following steps: (a) preparing a microbead with a duplex DNA; (b) inserting a dye into the duplex DNA; (c) delivering the microbead into a microchannel with a temperature gradient region; (d) heating the temperature gradient region to denature the duplex DNA; (e) monitoring a fluorescence intensity of the duplex DNA during the step (d) to obtain a melting curve; and (f) determining the SNP by a melting curve analysis method; wherein the duplex DNA is synthesized by a target single-strand DNA and an allele-specific probe. Furthermore, the present invention offers a temperature gradient region to enhance the measurement accuracy. The continuous-flow mechanism in this region is validated and optimized.

Abstract: The present invention provides a method of SNP detection by using gene detection in bead-based microfluidics comprising following steps: (a) preparing a microbead with a duplex DNA; (b) inserting a dye into the duplex DNA; (c) delivering the microbead into a microchannel with a temperature gradient region; (d) heating the temperature gradient region to denature the duplex DNA; (e) monitoring a fluorescence intensity of the duplex DNA during the step (d) to obtain a melting curve; and (f) determining the SNP by a melting curve analysis method; wherein the duplex DNA is synthesized by a target single-strand DNA and an allele-specific probe. Furthermore, the present invention offers a temperature gradient region to enhance the measurement accuracy. The continuous-flow mechanism in this region is validated and optimized.

Abstract: The method of the invention tracks how the collective movement of edge segments in a mask layout alters the resist image values at control points in the layout and simultaneously determines a correction amount for each edge segment in the layout. A multisolver matrix that represents the collective effect of movements of each edge segment in the mask layout is used to simultaneously determine the correction amount for each edge segment in the mask layout.