Patents by Inventor Yen-Yu Chen

Yen-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220367161
    Abstract: A an apparatus includes a processing chamber configured to house a workpiece, a target holder in the processing chamber, a first magnetic element positioned over a backside of the target holder, a first arm assembly connected to the first magnetic element, a rotational shaft, and a first hinge mechanism connecting the rotational shaft and the first arm assembly.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Hsi WANG, Kun-Che HO, Yen-Yu CHEN
  • Publication number: 20220367606
    Abstract: The present disclosure is directed to a method for the fabrication of MiM capacitor structures with metallic electrodes having nitrogen-rich metal nitride layers. The method includes depositing a first electrode bilayer on a first interconnect disposed on a substrate, where the first electrode includes a first layer and a second layer with a different nitrogen concentration. The method also includes depositing a dielectric layer on the first electrode bilayer and depositing a second electrode bilayer on the first interconnect where the second electrode includes a third layer and a fourth layer with a different nitrogen concentration. The method further includes patterning the first electrode bilayer, the dielectric layer, and the second electrode bilayer to form a capacitor structure on the first interconnect layer.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Anhao CHENG, Fang-Ting Kuo, Yen-Yu Chen
  • Publication number: 20220367537
    Abstract: Some embodiments are directed towards an image sensor device. A photodetector is disposed in a semiconductor substrate, and a transfer transistor is disposed over photodetector. The transfer transistor includes a transfer gate having a lateral portion extending over a frontside of the semiconductor substrate and a vertical portion extending to a first depth below the frontside of the semiconductor substrate. A gate dielectric separates the lateral portion and the vertical portion from the semiconductor substrate. A backside trench isolation structure extends from a backside of the semiconductor substrate to a second depth below the frontside of the semiconductor substrate. The backside trench isolation structure laterally surrounds the photodetector, and the second depth is less than the first depth such that a lowermost portion of the vertical portion of the transfer transistor has a vertical overlap with an uppermost portion of the backside trench isolation structure.
    Type: Application
    Filed: July 19, 2022
    Publication date: November 17, 2022
    Inventors: Feng-Chi Hung, Dun-Nian Yaung, Jen-Cheng Liu, Wei Chuang Wu, Yen-Yu Chen, Chih-Kuan Yu
  • Publication number: 20220367343
    Abstract: A device includes a substrate, a first conductive layer on the substrate, a first conductive via, and further conductive layers and conductive vias between the first conductive via and the substrate. The first conductive via is between the substrate and the first conductive layer, and is electrically connected to the first conductive layer. The first conductive via extends through at least two dielectric layers, and has thickness greater than about 8 kilo-Angstroms. An inductor having high quality factor is formed in the first conductive layer and also includes the first conductive via.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 17, 2022
    Inventors: Hung Hsun Lin, Che-Chih Hsu, Wen-Chu Huang, Chinyu Su, Yen-Yu Chen, Wei-Chun Hua, Wen Han Hung
  • Patent number: 11502050
    Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih Wei Bih, Sheng-Wei Yeh, Yen-Yu Chen, Wen-Hao Cheng, Chih-Wei Lin, Chun-Chih Lin
  • Publication number: 20220356578
    Abstract: A thin film deposition system deposits a thin film on a substrate in a thin film deposition chamber. The thin film deposition system deposits the thin film by flowing a fluid into the thin film deposition chamber. The thin film deposition system includes a byproducts sensor that senses byproducts of the fluid in an exhaust fluid. The thin film deposition system adjusts the flow rate of the fluid based on the byproducts.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Inventors: Wen-Hao CHENG, Yi-Ming DAI, Yen-Yu CHEN, Hsuan-Chih CHU
  • Publication number: 20220359285
    Abstract: A method includes etching a dielectric layer to form a trench in the dielectric layer, depositing a metal layer extending into the trench, performing a nitridation process on the metal layer to convert a portion of the metal layer into a metal nitride layer, performing an oxidation process on the metal nitride layer to form a metal oxynitride layer, removing the metal oxynitride layer, and filling a metallic material into the trench using a bottom-up deposition process to form a contact plug.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Inventors: Yen-Yu Chen, Chung-Liang Cheng
  • Publication number: 20220359232
    Abstract: The present disclosure provides a flexible workpiece pedestal capable of tilting a workpiece support surface. The workpiece pedestal further includes a heater mounted on the workpiece support surface. The heater includes a plurality of heating sources such as heating coils. The plurality of heating sources in the heater allows heating the workpiece at different temperatures for different zones of the workpiece. For example, the workpiece can have a central zone heated by a first heating coil, a first outer ring zone that is outside of the central zone heated by a second heating coil, a second outer ring zone that is outside of the first outer ring zone heated by a third heating coil. By using the tunable heating feature and the tilting feature of the workpiece pedestal, the present disclosure can reduce or eliminate the shadowing effect problem of the related workpiece pedestal in the art.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Hsuan-Chih Chu, Wen-Hao Cheng, Yen-Yu Chen, Yi-Ming Dai
  • Publication number: 20220356562
    Abstract: The present disclosure provides a multifunction chamber having a multifunctional shutter disk. The shutter disk includes a lamp device, a DC/RF power device, and a gas line on one surface of the shutter disk. With this configuration, simplifying the chamber type is possible as the various specific, dedicated chambers such as a degas chamber, a pre-clean chamber, a CVD/PVD chamber are not required. By using the multifunctional shutter disk, the degassing function and the pre-cleaning function are provided within a single chamber. Accordingly, a separate degas chamber and a pre-clean chamber are no longer required and the overall transfer time between chambers is reduced or eliminated.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Wen-Hao Cheng, Yen-Yu Chen, Yi-Ming Dai
  • Patent number: 11492700
    Abstract: The present disclosure provides a multifunction chamber having a multifunctional shutter disk. The shutter disk includes a lamp device, a DC/RF power device, and a gas line on one surface of the shutter disk. With this configuration, simplifying the chamber type is possible as the various specific, dedicated chambers such as a degas chamber, a pre-clean chamber, a CVD/PVD chamber are not required. By using the multifunctional shutter disk, the degassing function and the pre-cleaning function are provided within a single chamber. Accordingly, a separate degas chamber and a pre-clean chamber are no longer required and the overall transfer time between chambers is reduced or eliminated.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: November 8, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co.
    Inventors: Wen-Hao Cheng, Yen-Yu Chen, Yi-Ming Dai
  • Publication number: 20220352223
    Abstract: In some embodiments, the present disclosure relates to a device having a semiconductor substrate including a frontside and a backside. On the frontside of the semiconductor substrate are a first source/drain region and a second source/drain region. A gate electrode is arranged on the frontside of the semiconductor substrate and includes a horizontal portion, a first vertical portion, and a second vertical portion. The horizontal portion is arranged over the frontside of the semiconductor substrate and between the first and second source/drain regions. The first vertical portion extends from the frontside towards the backside of the semiconductor substrate and contacts the horizontal portion of the gate electrode structure. The second vertical portion extends from the frontside towards the backside of the semiconductor substrate, contacts the horizontal portion of the gate electrode structure, and is separated from the first vertical portion by a channel region of the substrate.
    Type: Application
    Filed: July 15, 2022
    Publication date: November 3, 2022
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Hsiao-Hui Tseng, Jen-Cheng Liu, Jhy-Jyi Sze, Shyh-Fann Ting, Wei Chuang Wu, Yen-Ting Chiang, Chia Ching Liao, Yen-Yu Chen
  • Publication number: 20220351408
    Abstract: A detection device for detecting human-body orientation includes a camera and a processing device. The camera is configured to capture a human-body image. The processing device is configured to cut a human head contour image in the human-body image to obtain an input image, and input the input image to a classifier. The classifier outputs a plurality of human-body orientation probabilities for the input image. The processing device finds the highest human-body orientation probability, and determines whether the highest human-body orientation probability is above the accuracy threshold. In response to the highest human-body orientation probability being above the accuracy threshold, the processing device regards the human-body orientation corresponding to the highest human-body orientation probability as the determined human-body orientation.
    Type: Application
    Filed: July 12, 2021
    Publication date: November 3, 2022
    Inventor: Yen Yu CHEN
  • Publication number: 20220336291
    Abstract: A semiconductor device includes a first gate structure that includes a first interfacial layer, a first gate dielectric layer disposed over the first interfacial layer, and a first gate electrode disposed over the first gate dielectric layer. The semiconductor device also includes a second gate structure that includes a second interfacial layer, a second gate dielectric layer disposed over the second interfacial layer, and a second gate electrode disposed over the second gate dielectric layer. The first interfacial layer contains a different amount of a dipole material than the second interfacial layer.
    Type: Application
    Filed: July 5, 2022
    Publication date: October 20, 2022
    Inventors: Yen-Yu Chen, Chung-Liang Cheng
  • Publication number: 20220336297
    Abstract: A deposition system is provided capable of measuring at least one of the film characteristics (e.g., thickness, resistance, and composition) in the deposition system. The deposition system in accordance with the present disclosure includes a substrate process chamber. The deposition system in accordance with the present disclosure includes a substrate pedestal in the substrate process chamber, the substrate pedestal configured to support a substrate, and a target enclosing the substrate process chamber. A shutter disk including an in-situ measuring device is provided.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 20, 2022
    Inventors: Wen-Hao CHENG, Yen-Yu CHEN, Yi-Ming DAI
  • Publication number: 20220334168
    Abstract: A test head assembly for a semiconductor device has a carrier, a pin seat and a test wire assembly. The carrier is formed in an L shape and has a lateral board, a perpendicular board and a opening formed through the perpendicular board. The pin seat is mounted in the corresponding opening. The test wire assembly has a teat head, a plurality of connectors and a plurality of test wires. The test head is mounted on an outer sidewall of the lateral board and connected to the pin seat through the test wires and the connectors. Therefore, the pin seat is mounted on the perpendicular board of the L-shaped uprightly and the test head is mounted on the lateral board. The pin seat and the test head are not parallel to each other, and a lateral size of the test head assembly is reduced to increase the space usage.
    Type: Application
    Filed: September 3, 2021
    Publication date: October 20, 2022
    Applicant: Powertech Technology Inc.
    Inventors: Ying-Tang CHAO, Yen-Yu CHEN, Shin-Kung CHEN
  • Patent number: 11469139
    Abstract: A method includes etching a dielectric layer to form a trench in the dielectric layer, depositing a metal layer extending into the trench, performing a nitridation process on the metal layer to convert a portion of the metal layer into a metal nitride layer, performing an oxidation process on the metal nitride layer to form a metal oxynitride layer, removing the metal oxynitride layer, and filling a metallic material into the trench using a bottom-up deposition process to form a contact plug.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: October 11, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Yu Chen, Chung-Liang Cheng
  • Publication number: 20220320284
    Abstract: A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The semiconductor device includes first and second pair of source/drain regions disposed on a substrate, first and second nanostructured channel regions, and first and second gate structures with effective work function values different from each other. The first and second gate structures include first and second high-K gate dielectric layers, first and second barrier metal layers with thicknesses different from each, first and second work function metal (WFM) oxide layers with thicknesses substantially equal to each other disposed on the first and second barrier metal layers, respectively, a first dipole layer disposed between the first WFM oxide layer and the first barrier metal layer, and a second dipole layer disposed between the second WFM oxide layer and the second barrier metal layer.
    Type: Application
    Filed: June 10, 2022
    Publication date: October 6, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yen-Yu CHEN, Chung-Liang CHENG
  • Patent number: 11462394
    Abstract: A PVD method includes tilting a first magnetic element over a back side of a target. The first magnetic element is moved about an axis that extends through the target. Then, charged ions are attracted to bombard the target, such that particles are ejected from the target and are deposited over a surface of a wafer. By tilting the magnetic element relative to the target, the distribution of the magnetic fields can be more random and uniform.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: October 4, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Hsi Wang, Kun-Che Ho, Yen-Yu Chen
  • Patent number: 11458586
    Abstract: A chemical-mechanical planarization (CMP) system includes a platen, a pad, a polish head, a rotating mechanism, a light source, and a detector. The pad is disposed on the platen. The polish head is configured to hold a wafer against the pad. The rotating mechanism is configured to rotate at least one of the platen and the polish head. The light source is configured to provide incident light to an end-point layer on the wafer. The detector is configured to detect absorption of the incident light by the end-point layer.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: October 4, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, ltd.
    Inventors: Chung-Liang Cheng, Chang-Sheng Lee, Wei Zhang, Yen-Yu Chen
  • Patent number: D968432
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: November 1, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yen-Yu Chen, Shih-Han Chan