Patents by Inventor Yeong-E Chen
Yeong-E Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220334423Abstract: An electronic device includes a solar cell, a first light modulating layer, a transmittance-adjustable lens and a control circuit. At least a portion of the first light modulating layer is disposed on the solar cell. The control circuit is electrically connected to the solar cell and the transmittance-adjustable lens.Type: ApplicationFiled: March 18, 2022Publication date: October 20, 2022Inventors: Bi-Ly LIN, Yeong-E CHEN
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Publication number: 20220330430Abstract: An electronic device is provided. The electronic device includes: a substrate, wherein the substrate has a normal direction; a first bonding pad and a second bonding pad disposed side by side on the substrate. The first bonding pad includes a first conductive layer and a second conductive layer, and the first conductive layer is adjacent to the second conductive layer. The second bonding pad includes a third conductive layer, the third conductive layer is adjacent to the second conductive layer, and in the normal direction, a distance between a bottom surface of the third conductive layer and the substrate is different than a distance between a bottom surface of the second conductive layer and the substrate. Viewed from the normal direction of the substrate, at least part of the second conductive layer is between the first conductive layer and the third conductive layer.Type: ApplicationFiled: June 28, 2022Publication date: October 13, 2022Inventors: Yu-Ting LIU, Yeong-E CHEN, Chean KEE
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Publication number: 20220319995Abstract: A package device is provided and includes a redistribution layer. The redistribution layer includes a first dielectric layer, a second dielectric layer, and a conductive layer. The second dielectric layer is disposed on the first dielectric layer, and the second dielectric layer includes a dielectric pattern. The conductive layer is disposed between the first dielectric layer and the second dielectric layer, and the conductive layer includes a first conductive pattern. The dielectric pattern has a through hole, and in a top view of the package device, the first conductive pattern and the through hole are overlapped with each other.Type: ApplicationFiled: June 21, 2022Publication date: October 6, 2022Applicant: InnoLux CorporationInventors: Yeong-E CHEN, Cheng-En CHENG, Yu-Ting LIU
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Publication number: 20220299565Abstract: A method for manufacturing an electronic device includes the following steps. A substrate including a first region and a second region is provided. A seed layer is formed on the substrate. A circuit structure layer is formed on the seed layer, and the circuit structure layer has a plurality of first circuit structures disposed on the first region and a plurality of second circuit structures disposed on the second region. The first circuit structures and the second circuit structures are electrically connected through the seed layer. A circuit test process is performed and includes applying a predetermined voltage to the second circuit structures to test the first circuit structures to determine whether the first circuit structures are normal or not.Type: ApplicationFiled: June 7, 2022Publication date: September 22, 2022Applicant: Innolux CorporationInventor: Yeong-E Chen
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Publication number: 20220285294Abstract: An embodiment of the disclosure provides a package device including a redistribution layer, an integrated passive device layer, a first port, and a second port. The integrated passive device layer contacts the redistribution layer. The integrated passive device layer has at least one capacitor. The at least one capacitor includes a first capacitor and a second capacitor. The first port is electrically connected to the first capacitor and the second capacitor. The second port is provided opposite to the first port. The second port is electrically connected to the first capacitor and the second capacitor. The first port and the second port have the same resistance.Type: ApplicationFiled: October 7, 2021Publication date: September 8, 2022Applicant: Innolux CorporationInventors: Yeong-E Chen, Wei-Hsuan Chen, Chun-Yuan Huang
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Patent number: 11406015Abstract: An electronic device is provided. The electronic device includes: a substrate, wherein the substrate has a normal direction; a first bonding pad and a second bonding pad disposed side by side on the substrate. The first bonding pad includes a first conductive layer and a second conductive layer, and the first conductive layer is adjacent to the second conductive layer. The second bonding pad includes a third conductive layer, the third conductive layer is adjacent to the second conductive layer, and in the normal direction, a distance between a bottom surface of the third conductive layer and the substrate is different than a distance between a bottom surface of the second conductive layer and the substrate. Viewed from the normal direction of the substrate, at least part of the second conductive layer is between the first conductive layer and the third conductive layer.Type: GrantFiled: May 27, 2020Date of Patent: August 2, 2022Assignee: INNOLUX CORPORATIONInventors: Yu-Ting Liu, Yeong-E Chen, Chean Kee
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Patent number: 11398430Abstract: The present disclosure provides a package device and a manufacturing method thereof. The package device includes a redistribution layer which includes a first dielectric layer, a conductive layer and a second dielectric layer. The conductive layer is disposed between the first dielectric layer and the second dielectric layer. The redistribution layer has a test pattern that includes a first conductive pattern, and the first conductive pattern is formed of the conductive layer.Type: GrantFiled: December 8, 2020Date of Patent: July 26, 2022Assignee: InnoLux CorporationInventors: Yeong-E Chen, Cheng-En Cheng, Yu-Ting Liu
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Patent number: 11378618Abstract: A method for manufacturing an electronic device includes the following steps. A substrate including a main region and a peripheral region is provided. A seed layer is formed on the substrate. A circuit structure layer is formed on the seed layer, and the circuit structure layer has a plurality of chip connection structures disposed on the main region and a plurality of test circuit structures disposed on the peripheral region. The chip connection structures and the test circuit structures are physically separated from each other, and the chip connection structures and the test circuit structures are electrically connected through the seed layer. A circuit test process is performed and includes applying a predetermined voltage to the test circuit structures to test the chip connection structures. A test result is obtained to determine whether a chip is electrically connected to the chip connection structures.Type: GrantFiled: April 29, 2020Date of Patent: July 5, 2022Assignee: Innolux CorporationInventor: Yeong-E Chen
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Publication number: 20220181189Abstract: A manufacturing method of a semiconductor package is provided. The manufacturing method includes the following. A plurality of semiconductor components are provided. Each semiconductor component has at least one conductive bump. A substrate is provided. The substrate has a plurality of conductive pads. A transfer device is provided. The transfer device transfers the semiconductor components onto the substrate. A heating device is provided. The heating device heats or pressurizes at least two semiconductor components. During transferring of the semiconductor components to the substrate, the at least one conductive bump of each semiconductor component is docked to a corresponding one of the conductive pads.Type: ApplicationFiled: November 5, 2021Publication date: June 9, 2022Applicant: Innolux CorporationInventors: Cheng-Chi Wang, Wen-Hsiang Liao, Yeong-E Chen, Hung-Sheng Chou, Cheng-En Cheng
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Publication number: 20220173000Abstract: The embodiments of the disclosure provide a manufacturing method of a package circuit, including the following steps. A circuit structure including a plurality of conductive pads is formed. A liquid crystal layer is formed on the circuit structure. An inspection step is performed, and the inspection step includes determining the conductivity of the conductive pads according to the result of the rotation of a liquid crystal layer oriented with an electric field. In addition, the liquid crystal layer is removed.Type: ApplicationFiled: November 4, 2021Publication date: June 2, 2022Applicant: Innolux CorporationInventors: Yeong-E Chen, Bi-Ly Lin, Kuang Chiang Huang, Yu Ting Liu
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Publication number: 20220167495Abstract: A package device and a manufacturing method thereof are provided. The package device includes a redistribution layer including a first dielectric layer, a conductive layer, and a second dielectric layer. The conductive layer is disposed between the first dielectric layer and the second dielectric layer. The redistribution layer has a test mark, the test mark includes a plurality of conductive patterns formed of the conductive layer, and the conductive patterns are arranged in a ring shape.Type: ApplicationFiled: May 6, 2021Publication date: May 26, 2022Inventors: Yeong-E CHEN, Cheng-En CHENG, Yu-Ting LIU
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Publication number: 20220165628Abstract: The present disclosure provides a manufacturing method of a package device, which includes providing a carrier substrate, a first conductive layer, and a release layer, where the carrier substrate has a device region and a peripheral region, and the first conductive layer and the release layer are disposed on the carrier substrate. The method further includes forming a second conductive layer on the release layer in the device region, where at least one of the first and second conductive layers includes a first pad in the peripheral region. The second conductive layer includes a second pad electrically connected to the first pad through the first conductive layer. The method also includes performing an inspection step to provide an input signal to one of the first and second pads, and to receive an output signal from another of the first and second pads.Type: ApplicationFiled: May 10, 2021Publication date: May 26, 2022Inventors: Yeong-E CHEN, Kuang-Chiang HUANG, Yu-Ting LIU, Yi-Hung LIN, Cheng-En CHENG
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Publication number: 20220165679Abstract: A package device and a manufacturing method thereof are provided. The package device includes a redistribution layer including a first dielectric layer, a conductive layer, and a second dielectric layer. The conductive layer is disposed between the first dielectric layer and the second dielectric layer. The redistribution layer has a test mark, the test mark includes a plurality of conductive patterns formed of the conductive layer, and the conductive patterns are arranged in a ring shape.Type: ApplicationFiled: November 25, 2021Publication date: May 26, 2022Applicant: InnoLux CorporationInventors: Yeong-E CHEN, Cheng-En CHENG, Yu-Ting LIU
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Publication number: 20220157703Abstract: The present disclosure provides a package device and a manufacturing method thereof. The package device includes a redistribution layer which includes a first dielectric layer, a conductive layer and a second dielectric layer. The conductive layer is disposed between the first dielectric layer and the second dielectric layer. The redistribution layer has a test pattern that includes a first conductive pattern, and the first conductive pattern is formed of the conductive layer.Type: ApplicationFiled: January 11, 2022Publication date: May 19, 2022Applicant: InnoLux CorporationInventors: Yeong-E CHEN, Cheng-En CHENG, Yu-Ting LIU
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Publication number: 20220148972Abstract: The present disclosure provides a package device and a manufacturing method thereof. The package device includes a redistribution layer which includes a first dielectric layer, a conductive layer and a second dielectric layer. The conductive layer is disposed between the first dielectric layer and the second dielectric layer. The redistribution layer has a test pattern that includes a first conductive pattern, and the first conductive pattern is formed of the conductive layer.Type: ApplicationFiled: December 8, 2020Publication date: May 12, 2022Inventors: Yeong-E CHEN, Cheng-En CHENG, Yu-Ting LIU
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Publication number: 20220130715Abstract: The present disclosure discloses a method for manufacturing an electronic device, including: setting a basic working area; providing a supporting platform having a plurality of vacuum valves; disposing a substrate on the supporting platform; applying vacuum attraction to a portion of the substrate through a portion of the plurality of vacuum valves, wherein the portion of the substrate corresponding to the vacuum attraction is defined as an attracted region; and performing an exposure on a portion of the attracted region, wherein an area of the attracted region is larger than the basic working area and smaller than an area of the supporting platform.Type: ApplicationFiled: October 18, 2021Publication date: April 28, 2022Applicant: InnoLux CorporationInventors: Cheng-Chi WANG, Yeong-E CHEN, Cheng-En CHENG
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Publication number: 20220130683Abstract: The present disclosure discloses a method for manufacturing an electronic device, including: setting a basic working area; providing a supporting platform having a plurality of vacuum valves; disposing a substrate on the supporting platform; applying vacuum attraction to a portion of the substrate through a portion of the plurality of vacuum valves, wherein the portion of the substrate corresponding to the vacuum attraction is defined as an attracted region; and performing an exposure on a portion of the attracted region, wherein an area of the attracted region is larger than the basic working area and smaller than an area of the supporting platform.Type: ApplicationFiled: December 1, 2020Publication date: April 28, 2022Inventors: Cheng-Chi WANG, Yeong-E CHEN, Cheng-En CHENG
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Publication number: 20210341534Abstract: A method for manufacturing an electronic device includes the following steps. A substrate including a main region and a peripheral region is provided. A seed layer is formed on the substrate. A circuit structure layer is formed on the seed layer, and the circuit structure layer has a plurality of chip connection structures disposed on the main region and a plurality of test circuit structures disposed on the peripheral region. The chip connection structures and the test circuit structures are physically separated from each other, and the chip connection structures and the test circuit structures are electrically connected through the seed layer. A circuit test process is performed and includes applying a predetermined voltage to the test circuit structures to test the chip connection structures. A test result is obtained to determine whether a chip is electrically connected to the chip connection structures.Type: ApplicationFiled: April 29, 2020Publication date: November 4, 2021Applicant: Innolux CorporationInventor: Yeong-E Chen
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Publication number: 20210333625Abstract: A liquid-crystal device including a liquid-crystal module and a driving device is provided. The driving device provides a control signal to the liquid-crystal module to control the transmittance of the liquid-crystal module and includes a substrate, a control circuit, and a photovoltaic device. The control circuit generates the control signal. The photovoltaic device supplies power to the control circuit. The control circuit and the photovoltaic device are located on the substrate.Type: ApplicationFiled: March 29, 2021Publication date: October 28, 2021Inventors: Chin-Lung TING, Chean KEE, Bi-Ly LIN, Yeong-E CHEN
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Publication number: 20210335764Abstract: An electronic device and a fabrication method thereof are provided. The electronic device includes a circuit structure layer, a package structure, an electronic element, and a plurality of function elements. The circuit structure layer has a first side and a second side opposite to the first side. The package structure is disposed on the first side of the circuit structure layer. The electronic element is embedded or encapsulated in the package structure. The function elements are disposed on the second side of the circuit structure layer. The function elements are electrically connected to the electronic element through the circuit structure layer. The electronic device provided by the disclosure exhibits borderless design or has a large function region.Type: ApplicationFiled: October 29, 2020Publication date: October 28, 2021Applicant: Innolux CorporationInventor: Yeong-E Chen