Patents by Inventor Yi Ge
Yi Ge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11946364Abstract: A method for removing a guided wave noise in a time-domain may include recording one or more acoustic signals with one or more receivers at a first location, wherein the one or more acoustic signals are raw data. The method may further include determining a slowness range, estimating a downward guided wave noise by stacking the one or more acoustic signals based at least in part on a positive slowness, estimating an upward guided wave noise by stacking the one or more acoustic signals based at least in part on a negative slowness, and identifying a dominant direction of propagation. The method may further include identifying a slowness from a highest stacked amplitude for the dominant direction of propagation, estimating a downward guided wave noise with the slowness, estimating an upward guided wave noise with the slowness, and subtracting the downward guided wave noise and the upward guided wave noise.Type: GrantFiled: July 7, 2020Date of Patent: April 2, 2024Assignee: Halliburton Energy Services, Inc.Inventors: Yao Ge, Ruijia Wang, Philip William Tracadas, Yi Yang Ang, Xiang Wu
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Publication number: 20240053990Abstract: An instruction processing apparatus including a processor configured to execute a process including issuing, by an instruction scheduler, instructions that can be executed; holding, by a register file, data used by the instructions; executing, by an execution unit including a plurality of stages, the instructions issued by the instruction scheduler; detecting, by a detector, early termination in which an execution result of an intermediate stage, which is before a final stage among the plurality of stages, is the same as an execution result of the execution unit; and transferring, by a bypass controller, the data output from the register file or the execution result from the execution unit, to an input of the execution unit, and in response to the detector detecting the early termination, bypassing the execution result of the intermediate stage to the input of the execution unit.Type: ApplicationFiled: June 13, 2023Publication date: February 15, 2024Applicants: Fujitsu Limited, Inter-University Research Institute Corporation Research Organization of Information and SystemsInventors: Masahiro Goshima, Yi Ge
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Patent number: 11895104Abstract: A service processing method, apparatus, and storage medium of a blockchain system are provided. The service processing method includes obtaining authentication information of a service participant; determining whether data in the authentication information of the service participant is updated; generating, based on the data in the authentication information of the service participant being updated, a notification message according to the updated data; and transmitting the notification message to a service processing node subnetwork, the notification message instructing one or more service processing nodes in the service processing node subnetwork to process a service request according to updated authentication information of the service participant.Type: GrantFiled: April 20, 2021Date of Patent: February 6, 2024Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Jun Zang, Jian Jun Zhang, Luo Hai Zheng, Jun Jie Shi, Hu Jia Chen, Zi Chao Tang, Yi Ge Cai, Qing Qin, Chuan Bing Dai, Hu Lan, Jin Long Chen
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Publication number: 20240006061Abstract: This patent discloses a medical service platform, method, and apparatus based on a human digital twin model that comprises a a data currency valuation subsystem that provides dynamic quotes of a digital currency based on values of corresponding data in the digital human digital data currency system.Type: ApplicationFiled: June 30, 2023Publication date: January 4, 2024Applicants: Rutgers, The State University of New Jersey, Digital Health China Technologies, Co., Ltd.Inventors: Jing Jin, Wenzhao Shi, Anjiang Chen, Juan Xu, Yi Ge, Zheng Xu
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Patent number: 11829293Abstract: A processor includes request issuing units issuing an access request to a storage, a data array including banks holding sub data divided from data read from the storage based on the access request, a switch to transfer the access request to one of the banks, and first and second determination units. The first determination unit determines a cache hit when a tag address included in the access address matches a tag address held therein in correspondence with an index address included in the access address. The second determination unit determines a cache hit when identification information corresponding to a first tag address included in the access address and a second tag address included in the access address, match identification information and second tag address held therein. A cache controller makes access to the data array or storage, based on a determination result of the first or second determination unit.Type: GrantFiled: August 23, 2022Date of Patent: November 28, 2023Assignees: Fujitsu Limited, Inter-University Research Institute Corporation Research Organization of Information and SystemsInventors: Yi Ge, Masahiro Goshima
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Publication number: 20230360802Abstract: This disclosure provides a medical and healthcare service platform that is supported by a digital data currency system and provides medical and healthcare data processing, analyzing, and predicting based on a digital human system by integrating participating parties comprising individual persons, researchers, healthcare providers, and regulatory and public sectors.Type: ApplicationFiled: May 4, 2023Publication date: November 9, 2023Applicants: Rutgers, The State University of New Jersey, Digital Health China Technologies, Co., Ltd.Inventors: Jing Jin, Wenzhao Shi, Anjiang Chen, Juan Xu, Yi Ge, Zheng Xu
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Publication number: 20230289284Abstract: A processor includes a queue configured to hold a memory access instruction including one or more addresses, a contracted address generator configured to generate a contracted address by contracting bits of multiple addresses in a case where the memory access instruction includes the multiple addresses, a conflict detector configured to detect a conflict between the contracted address and the address held in the queue, and an access controller configured to control processes of the memory access instruction held in the queue, based on a detection result of the conflict detector.Type: ApplicationFiled: February 23, 2023Publication date: September 14, 2023Applicants: Fujitsu Limited, Inter-University Research Institute Corporation Research Organization of Information and SystemsInventors: Masahiro Goshima, Yi Ge
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Publication number: 20230187025Abstract: Provided are a system for constructing a genome-wide sgRNA library and a use thereof. The system includes an input module, an sgRNA design module and an sgRNA filtering module. By constructing three modules in the system, optimizing details and processes in the modules, and adopting multiple design criteria and screening principles, the genome-wide sgRNA library is finally constructed. The system and method are concise and efficient, and the obtained library has a high quality and good activity, and is convenient for applications in gene editing researches.Type: ApplicationFiled: December 14, 2018Publication date: June 15, 2023Inventors: Fengdan Xu, Liang Jin, Pengyang Xu, Guangyou Duan, Wenyan Zhao, Yi Ge
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Publication number: 20230110696Abstract: A processor includes request issuing units issuing an access request to a storage, a data array including banks holding sub data divided from data read from the storage based on the access request, a switch to transfer the access request to one of the banks, and first and second determination units. The first determination unit determines a cache hit when a tag address included in the access address matches a tag address held therein in correspondence with an index address included in the access address. The second determination unit determines a cache hit when identification information corresponding to a first tag address included in the access address and a second tag address included in the access address, match identification information and second tag address held therein. A cache controller makes access to the data array or storage, based on a determination result of the first or second determination unit.Type: ApplicationFiled: August 23, 2022Publication date: April 13, 2023Applicants: Fujitsu Limited, Inter-University Research Institute Corporation Research Organization of Information and SystemsInventors: Yi Ge, Masahiro Goshima
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Publication number: 20230081067Abstract: In accordance with an embodiment, described herein is a system and method for providing query acceleration with a computing environment such as, for example, a business intelligence environment, database, data warehouse, or other type of environment that supports data analytics. A middle layer is provided as a long-term table data storage format; and one more acceleration formats, or acceleration tables, can be periodically regenerated from the middle layer, wherein a determination can be made as to whether an accelerated table exists for a dataset table, and if so, then the accelerated table is used to process the query.Type: ApplicationFiled: August 25, 2022Publication date: March 16, 2023Inventors: ASHISH MITTAL, KENNETH ENG, ALEXTAIR MASCARENHAS, DAVID WONG, PRAFUL HEBBAR, YI GE, MAHADEVAN RAJAGOPALAN, ROGER BOLSIUS, VIJAYAKUMAR RANGANATHAN, SAMAR LOTIA
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Patent number: 11463279Abstract: A method and apparatus for implementing a virtual local area network. The method includes determining a global virtual local area network for transmitting a broadcast data frame in response to receiving the broadcast data frame at a first switch, encapsulating the broadcast data frame based at least in part on said determination and transmitting it to at least one second switch over the determined global virtual local area network. The broadcast data frame is received at the second switch and an identifier of the global virtual local area network is obtained according to the broadcast data frame. Based at least in part on the identifier of the global virtual local area network, it is determined that which local virtual local area network served by the second switch the de-capsulated broadcast data frame can be sent to.Type: GrantFiled: June 24, 2021Date of Patent: October 4, 2022Assignee: International Business Machines CorporationInventors: Yi Ge, Hang Liu, Yue Zhang, Kai Zheng
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Publication number: 20220300289Abstract: An operation processing apparatus including one or more lanes each of which processes at most one element operation of an instruction per cycle, and an element operation issuing unit that issues the element operation to the one or more lanes, wherein an entirety of the operation processing apparatus is separated into a plurality of sections by buffers including a plurality of entries, zero or more of the sections that are unable to continue processing of element operations stop the processing, and remaining sections each continue the processing of element operations by storing element operations proceeding to the downstream section into the immediately downstream buffer.Type: ApplicationFiled: February 8, 2022Publication date: September 22, 2022Applicants: FUJITSU LIMITED, Inter-University Research Institute Corporation Research Organization of Information and SystemsInventors: Masahiro Goshima, Yi Ge
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Publication number: 20220277194Abstract: A non-transitory computer-readable storage medium storing an inference program that causes at least one computer to execute a process, the process includes, training a neural network based on a plurality of pieces of first learning data that belongs to a first certain number of object classes and that does not include second learning data; generating a fully connected layer separated neural network by separating a fully connected layer of the neural network; generating a learning feature by using the fully connected layer separated neural network for each of a second certain number of pieces of the first learning data for each of the object classes; generating a class hyperdimensional vector for each of the object classes from each of the learning feature; and storing the class hyperdimensional vector in association with the object classes in a memory.Type: ApplicationFiled: October 27, 2021Publication date: September 1, 2022Applicant: FUJITSU LIMITEDInventors: Masayuki Hiromoto, Yi Ge
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Patent number: 11290415Abstract: A method of message adaptation in the Internet of Things (IoT) including a data center having a plurality of applications, an application gateway, a wide area network, a network of access appliances and a plurality of sensing devices. The method includes receiving at the application gateway a message containing data collected by the plurality of sensors, the message having a message descriptor; generating at the application gateway a message template based on the message descriptor; integrating context information into the generated message template; and outputting the message with the generated message template from the application gateway to a corresponding application in the data center for content-based processing.Type: GrantFiled: March 26, 2020Date of Patent: March 29, 2022Assignee: International Business Machines CorporationInventors: Yi Ge, Jian Wang, Qi Yu, Guo T. Zhao, Yu C. Zhou
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Publication number: 20220003724Abstract: A fitting assembly (100) is provided. The fitting assembly (100) comprises a holder (102) that holds one or more fluidic seal assemblies. The fluidic seal assembly comprises a fitting (104), a ferrule (110) and a tube (112), such as a chromatography column, and optionally comprises a protrusion (118) and a compliant seal material (120). Fluidic connections for a gas chromatography instrument are also provided.Type: ApplicationFiled: November 14, 2018Publication date: January 6, 2022Inventors: Richard P. WHITE, Wesley M. NORMAN, Li XU, Wen-Yi GE
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Publication number: 20210399921Abstract: A method and apparatus for implementing a virtual local area network. The method includes determining a global virtual local area network for transmitting a broadcast data frame in response to receiving the broadcast data frame at a first switch, encapsulating the broadcast data frame based at least in part on said determination and transmitting it to at least one second switch over the determined global virtual local area network. The broadcast data frame is received at the second switch and an identifier of the global virtual local area network is obtained according to the broadcast data frame. Based at least in part on the identifier of the global virtual local area network, it is determined that which local virtual local area network served by the second switch the de-capsulated broadcast data frame can be sent to.Type: ApplicationFiled: June 24, 2021Publication date: December 23, 2021Inventors: Yi Ge, Hang Liu, Yue Zhang, Kai Zheng
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Patent number: 11165502Abstract: An optical transmission device includes: a frontend circuit, a converter, an equalizer, a recovery, spectrum detector a correction information generator, and a transmitter. The frontend circuit converts an optical signal received via an optical network into an electric signal. The converter converts an output signal of the frontend circuit into a digital signal. The equalizer equalizes the digital signal or a second digital signal that is generated based on the digital signal. The recovery recovers a symbol from an output signal of the equalizer. The spectrum detector detects a reception spectrum of the optical signal based on the digital signal or the second digital signal. The correction information generator generates, according to the reception spectrum, correction information for correcting a shape of a transmission spectrum of the optical signal. The transmitter transmits the correction information to the source device.Type: GrantFiled: July 9, 2019Date of Patent: November 2, 2021Assignee: FUJITSU LIMITEDInventors: Yi Ge, Shoichiro Oda, Yuichi Akiyama, Takeshi Hoshida
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Patent number: 11102033Abstract: A method and apparatus for implementing a virtual local area network. The method includes determining a global virtual local area network for transmitting a data frame in response to receiving the data frame at a first switch, encapsulating the data frame based at least in part on said determination and transmitting it to at least one second switch over the determined global virtual local area network. The data frame is received at the second switch and an identifier of the global virtual local area network is obtained according to the data frame. Based at least in part on the identifier of the global virtual local area network, it is determined that which local virtual local area network served by the second switch the de-capsulated data frame can be sent to.Type: GrantFiled: January 10, 2020Date of Patent: August 24, 2021Assignee: International Business Machines CorporationInventors: Yi Ge, Hang Liu, Yue Zhang, Kai Zheng
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Publication number: 20210243175Abstract: A service processing method, apparatus, and storage medium of a blockchain system are provided. The service processing method includes obtaining authentication information of a service participant; determining whether data in the authentication information of the service participant is updated; generating, based on the data in the authentication information of the service participant being updated, a notification message according to the updated data; and transmitting the notification message to a service processing node subnetwork, the notification message instructing one or more service processing nodes in the service processing node subnetwork to process a service request according to updated authentication information of the service participant.Type: ApplicationFiled: April 20, 2021Publication date: August 5, 2021Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Jun Zang, Jian Jun Zhang, Luo Hai Zheng, Jun Jie Shi, Hu Jia Chen, Zi Chao Tang, Yi Ge Cai, Qing Qin, Chuan Bing Dai, Hu Lan, Jin Long Chen
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Publication number: 20210240439Abstract: An arithmetic processing device includes a memory and a processor coupled to the memory. The processor configured to calculate statistical information of a first operation result by executing the predetermined operation using input data as a first fixed-point number with a first decimal point at a first decimal point position, determine a second decimal point position using the statistical information, and calculate a second operation result when the predetermined operation is executed using the input data as a second fixed-point number with a second decimal point at the second decimal point position.Type: ApplicationFiled: December 22, 2020Publication date: August 5, 2021Applicant: FUJITSU LIMITEDInventors: Yi Ge, Katsuhiro Yoda, Makiko Ito