Patents by Inventor Yi Hung

Yi Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154016
    Abstract: A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric disposed around the first nanostructure; a second high-k gate dielectric being disposed around the second nanostructure; and a gate electrode over the first high-k gate dielectric and the second high-k gate dielectric. A portion of the gate electrode between the first nanostructure and the second nanostructure comprises a first portion of a p-type work function metal filling an area between the first high-k gate dielectric and the second high-k gate dielectric.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Inventors: Hsin-Yi Lee, Ji-Cheng Chen, Cheng-Lung Hung, Chi On Chui
  • Publication number: 20240153920
    Abstract: An electronic device is disclosed. The electronic device includes a first conductive plate and a first electronic component. The first conductive plate includes a first connecting portion. The first electronic component supports the first conductive plate through the first connecting portion. The first connecting portion is electrically connected to the first electronic component and configured to buffer stress from the first conductive plate to the first electronic component.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Applicants: Advanced Semiconductor Engineering, Inc., UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.
    Inventors: Yi-Hung HOU, Yung-Fa CHEN, Sheng-Chia CHEN
  • Publication number: 20240152033
    Abstract: An optical system is provided, including a movable part, a fixed part, and a driving assembly. The movable part is connected to a first optical element. The movable part is movable relative to the fixed part. The fixed part has a fixed part opening, wherein a light passes through the fixed part opening. The driving assembly drives the movable part to move relative to the fixed part. The first optical element at least partially overlaps the fixed part opening when the movable part is in a first position. When the movable part is in an extreme position, the first optical element does not overlap the fixed part opening.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Inventors: Chen-Hung CHAO, Po-Xiang ZHUANG, Chao-Chang HU, Yi-Ho CHEN, Wei-Jhe SHEN
  • Publication number: 20240151098
    Abstract: An internally dismantled anti-typhoon soundproof horizontal sliding window, which is fastened to an outer frame body and is provided with at least one outer sliding window and an inner sliding window; it is characterized in that: the outer side of the outer frame body is provided with at least one outer fixing column, an elastically movable top plate is provided on the inside and outside of the outer fixed column; when the two windows are closed, a central control lock can be used to drive the top plate to move through the inner columns of the outer and inner windows inwardly, the top plate squeezes the two inner column clamps tightly; the outer column of the outer frame body is provided with a hook, which can be used for the outer sliding window and the outer column of the inner sliding window; a snap cover that seals the grooves of the outer frame; thus, the window structure can be tightly closed in an all-round way, so as to meet the requirements of windproof, rainproof and sound insulation of the strong t
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: WEN-YI HUNG, HAO-TING HUNG
  • Publication number: 20240152034
    Abstract: An optical element driving mechanism is provided, which includes a movable portion, a fixed portion and a driving assembly. The movable portion is connected with an optical element. The movable portion is movable relative to the fixed portion. The driving assembly is configured to drive the movable portion to move relative to the fixed portion.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Inventors: Chen-Hung CHAO, Po-Xiang ZHUANG, Chao-Chang HU, Yi-Ho CHEN
  • Publication number: 20240152035
    Abstract: An optical system is provided, including a fixed part, a movable part, and a driving assembly. The fixed part has an opening. A light passes through the opening. The movable part is movable relative to the fixed part and connected to a first optical element. The driving assembly drives the movable part to move relative to the fixed part. The first optical element at least partially overlaps the opening when the movable part is in a first position. The first optical element further includes a first optical element surface, and the first optical element surface faces the light.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Inventors: Chen-Hung CHAO, Po-Xiang ZHUANG, Chao-Chang HU, Yi-Ho CHEN, Wei-Jhe SHEN
  • Patent number: 11979156
    Abstract: A level shifter includes a buffer circuit, a first shift circuit, and a second shift circuit. The buffer circuit provides a first signal and a first inverted signal to the first shift circuit, such that the first shift circuit provides a second signal and a second inverted signal to the second shift circuit. The second shift circuit generates a plurality of output signals according to the second signal and the second inverted signal. The first shift circuit includes a plurality of first stacking transistors and a first voltage divider circuit. The first voltage divider circuit is electrically coupled between a first system high voltage terminal and a system low voltage terminal. The first voltage divider circuit is configured to provide a first inner bias to gate terminals of the first stacking transistors.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: May 7, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yi-Chen Lu, Hsu-Chi Li, Yi-Jan Chen, Boy-Yiing Jaw, Chin-Tang Chuang, Chung-Hung Chen
  • Publication number: 20240144428
    Abstract: An image processing circuit includes a receiving circuit, a transmitting circuit, a first asynchronous handshake circuit, a super resolution scale-up model and a second asynchronous handshake circuit. The receiving circuit is arranged to receive an input image with a first pixel clock frequency. The first asynchronous handshake circuit is arranged to receive the input image from the receiving circuit according to a receiving timing. The super resolution scale-up model is arranged to scale up the input image to generate an output image with a second pixel clock frequency. The second asynchronous handshake circuit is arranged to output the output image to the transmitting circuit according to a transmitting timing to transmit the output image, wherein the first asynchronous handshake circuit, the super resolution scale-up model, and the second asynchronous handshake circuit operate at a clock frequency independent of the first pixel clock frequency and the second pixel clock frequency.
    Type: Application
    Filed: June 28, 2023
    Publication date: May 2, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventors: Tien-Hung Lin, Chia-Wei Yu, Yi-Ting Bao
  • Publication number: 20240145543
    Abstract: A semiconductor device includes source and drain regions, a channel region between the source and drain regions, and a gate structure over the channel region. The gate structure includes a gate dielectric over the channel region, a work function metal layer over the gate dielectric and comprising iodine, and a fill metal over the work function metal layer.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Yi LEE, Cheng-Lung HUNG, Chi On CHUI
  • Publication number: 20240145461
    Abstract: A modulation device includes a substrate, an electrostatic discharge protection element, an electronic element, and a driving element. The substrate has an active region. The electrostatic discharge protection element is arranged around the active region. The electronic element is disposed in the active region. The driving element is electrically connected to the electronic element.
    Type: Application
    Filed: October 4, 2023
    Publication date: May 2, 2024
    Applicant: Innolux Corporation
    Inventors: Ker-Yih Kao, Tong-Jung Wang, Wen-Chieh Lin, Ming-Chun Tseng, Yi-Hung Lin
  • Publication number: 20240145421
    Abstract: Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Inventors: Kuan-Neng CHEN, Zhong-Jie HONG, Chih-I CHO, Ming-Wei WENG, Chih-Han CHEN, Chiao-Yen WANG, Ying-Chan HUNG, Hong-Yi WU, CHENG-YEN HSIEH
  • Publication number: 20240145691
    Abstract: The present invention is related to a novel positive electrode active material for lithium-ion battery. The positive electrode active material is expressed by the following formula: Li1.2NixMn0.8-x-yZnyO2, wherein x and y satisfy 0<x?0.8 and 0<y?0.1. In addition, the present invention provides a method of manufacturing the positive electrode active material. The present invention further provides a lithium-ion battery which uses said positive electrode active material.
    Type: Application
    Filed: March 14, 2023
    Publication date: May 2, 2024
    Inventors: CHUAN-PU LIU, YIN-WEI CHENG, SHIH-AN WANG, BO-LIANG PENG, CHUN-HUNG CHEN, JUN-HAN HUANG, YI-CHANG LI
  • Patent number: 11973075
    Abstract: An ESD protection device includes a PN diode formed in a semiconductor body. The PN diode has a first contact coupled to a metal structure on a front side of the semiconductor body and a second contact coupled to a metal structure on a back side of the semiconductor body. The metal coupled to the first contact is spaced apart from the metal coupled to the second contact by a thickness of the semiconductor body. This spacing greatly reduces the capacitance associated with the metal structures, which can substantially reduce the overall capacitance added to an I/O channel by the ESD protection device and thereby improve the performance of a high-speed circuit that uses the I/O channel.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tao Yi Hung, Yu-Xuan Huang, Kuo-Ji Chen
  • Publication number: 20240134147
    Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion used for connecting an optical element, a fixed portion, and a driving assembly used for driving the movable portion to move relative to the fixed portion. The movable portion is movable relative to the fixed portion.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 25, 2024
    Inventors: Po-Xiang ZHUANG, Chen-Hung CHAO, Wei-Jhe SHEN, Shou-Jen LIU, Kun-Shih LIN, Yi-Ho CHEN
  • Publication number: 20240136401
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.
    Type: Application
    Filed: January 5, 2024
    Publication date: April 25, 2024
    Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
  • Publication number: 20240136346
    Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.
    Type: Application
    Filed: April 17, 2023
    Publication date: April 25, 2024
    Inventors: Chien Hung LIU, Yu-Sheng CHEN, Yi Ching ONG, Hsien Jung CHEN, Kuen-Yi CHEN, Kuo-Ching HUANG, Harry-HakLay CHUANG, Wei-Cheng WU, Yu-Jen WANG
  • Publication number: 20240136383
    Abstract: A semiconductor device includes a single-layered dielectric layer, a conductive line, a conductive via and a conductive pad. The conductive line and the conductive via are disposed in the single-layered dielectric layer. The conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
  • Patent number: 11967272
    Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: April 23, 2024
    Assignees: AUO Corporation, National Cheng-Kung University
    Inventors: Chih-Lung Lin, Yi-Chen Huang, Chih-I Liu, Po-Cheng Lai, Ming-Yang Deng, Chia-En Wu, Ming-Hung Chuang, Chia-Tien Peng
  • Patent number: 11957722
    Abstract: The present invention discloses an anti-aging composition, which includes: (a) isolated lactic acid bacterial strains or a fermented product thereof; and (b) an excipient, a diluent, or a carrier; wherein the isolated lactic acid bacterial strains include: Bifidobacterium bifidum VDD088 strains, Bifidobacterium breve Bv-889 strains, and Bifidobacterium longum BLI-02 strains. The present invention further provides a method for preventing aging by administering the foregoing anti-aging composition to a subject in need thereof.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: April 16, 2024
    Assignee: GLAC BIOTECH CO., LTD
    Inventors: Hsieh-Hsun Ho, Yi-Wei Kuo, Wen-Yang Lin, Jia-Hung Lin, Yen-Yu Huang, Chi-Huei Lin, Shin-Yu Tsai
  • Publication number: 20240118316
    Abstract: A probe card and a manufacturing method of a probe card are provided. The probe card includes a probe head, first and second substrates, an insulating component, and an adhesive member. The second substrate is disposed between the probe head and the first substrate, and is disposed on the first substrate. The second substrate faces the first substrate and includes second contacts. The second contacts are electrically connected to first contacts of the first substrate. The insulating component is disposed between the first substrate and the second substrate, and disposed at an outer side of the second contacts. The adhesive member is disposed on the first substrate, arranged on at least a part of the side surface of the second substrate, and disposed at an outer side of the insulating component.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Applicant: MPI Corporation
    Inventors: Chin-Yi Lin, Che-Wei Lin, Ting-Ju Wu, Chien-Kai Hung