Patents by Inventor Yi-Hung Chen

Yi-Hung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153920
    Abstract: An electronic device is disclosed. The electronic device includes a first conductive plate and a first electronic component. The first conductive plate includes a first connecting portion. The first electronic component supports the first conductive plate through the first connecting portion. The first connecting portion is electrically connected to the first electronic component and configured to buffer stress from the first conductive plate to the first electronic component.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Applicants: Advanced Semiconductor Engineering, Inc., UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.
    Inventors: Yi-Hung HOU, Yung-Fa CHEN, Sheng-Chia CHEN
  • Publication number: 20240145691
    Abstract: The present invention is related to a novel positive electrode active material for lithium-ion battery. The positive electrode active material is expressed by the following formula: Li1.2NixMn0.8-x-yZnyO2, wherein x and y satisfy 0<x?0.8 and 0<y?0.1. In addition, the present invention provides a method of manufacturing the positive electrode active material. The present invention further provides a lithium-ion battery which uses said positive electrode active material.
    Type: Application
    Filed: March 14, 2023
    Publication date: May 2, 2024
    Inventors: CHUAN-PU LIU, YIN-WEI CHENG, SHIH-AN WANG, BO-LIANG PENG, CHUN-HUNG CHEN, JUN-HAN HUANG, YI-CHANG LI
  • Publication number: 20240136346
    Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.
    Type: Application
    Filed: April 17, 2023
    Publication date: April 25, 2024
    Inventors: Chien Hung LIU, Yu-Sheng CHEN, Yi Ching ONG, Hsien Jung CHEN, Kuen-Yi CHEN, Kuo-Ching HUANG, Harry-HakLay CHUANG, Wei-Cheng WU, Yu-Jen WANG
  • Publication number: 20240136383
    Abstract: A semiconductor device includes a single-layered dielectric layer, a conductive line, a conductive via and a conductive pad. The conductive line and the conductive via are disposed in the single-layered dielectric layer. The conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
  • Publication number: 20240115616
    Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Patent number: 11955460
    Abstract: In accordance with some embodiments, a package-on-package (PoP) structure includes a first semiconductor package having a first side and a second side opposing the first side, a second semiconductor package having a first side and a second side opposing the first side, and a plurality of inter-package connector coupled between the first side of the first semiconductor package and the first side of the second semiconductor package. The PoP structure further includes a first molding material on the second side of the first semiconductor package. The second side of the second semiconductor package is substantially free of the first molding material.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Da Tsai, Meng-Tse Chen, Sheng-Feng Weng, Sheng-Hsiang Chiu, Wei-Hung Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Publication number: 20240088026
    Abstract: A semiconductor device according to embodiments of the present disclosure includes a first die including a first bonding layer and a second die including a second hybrid bonding layer. The first bonding layer includes a first dielectric layer and a first metal coil embedded in the first dielectric layer. The second bonding layer includes a second dielectric layer and a second metal coil embedded in the second dielectric layer. The second hybrid bonding layer is bonded to the first hybrid bonding layer such that the first dielectric layer is bonded to the second dielectric layer and the first metal coil is bonded to the second metal coil.
    Type: Application
    Filed: January 17, 2023
    Publication date: March 14, 2024
    Inventors: Yi Ching Ong, Wei-Cheng Wu, Chien Hung Liu, Harry-Haklay Chuang, Yu-Sheng Chen, Yu-Jen Wang, Kuo-Ching Huang
  • Publication number: 20240069878
    Abstract: Aspects of the present disclosure provide a method for training a predictor that predicts performance of a plurality of machine learning (ML) models on platforms. For example, the method can include converting each of the ML models into a plurality of instructions or the instructions and a plurality of intermediate representations (IRs). The method can also include simulating execution of the instructions corresponding to each of the ML models on a platform and generating instruction performance reports. Each of the instruction performance reports can be associated with performance of the instructions corresponding to one of the ML models that are executed on the platform. The method can also include training the predictor with the instructions or the IRs as learning features and the instruction performance reports as learning labels, compiling the predictor into a library file, and storing the library file in a storage device.
    Type: Application
    Filed: July 3, 2023
    Publication date: February 29, 2024
    Applicant: MEDIATEK INC.
    Inventors: Huai-Ting LI, I-Lin CHEN, Tsai JEN CHIEH, Cheng-Sheng CHAN, ShengJe HUNG, Yi-Min TSAI, Huang YA-LIN
  • Patent number: 11913047
    Abstract: A method for producing ?-aminobutyric acid includes cultivating, in a culture medium containing glutamic acid or a salt thereof, a probiotic composition including at least one lactic acid bacterial strain selected from the group consisting of Bifidobacterium breve CCFM1025 which is deposited at the Guangdong Microbial Culture Collection Center under an accession number GDMCC 60386, Lactobacillus acidophilus TYCA06, Lactobacillus plantarum LPL28, and Bifidobacterium longum subsp. infantis BLI-02 which are deposited at the China General Microbiological Culture Collection Center respectively under accession numbers CGMCC 15210, CGMCC 17954, and CGMCC 15212, Lactobacillus salivarius subsp. salicinius AP-32 which is deposited at the China Center for Type Culture Collection under an accession number CCTCC M 2011127, and combinations thereof.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: February 27, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yu-Fen Huang, Chen-Hung Hsu, Wen-Yang Lin, Yi-Wei Kuo, Shin-Yu Tsai
  • Patent number: 11915957
    Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yi-Fam Shiu, Yu-Chen Chen, Yang-Ann Chu, Jiun-Rong Pai
  • Patent number: 11901390
    Abstract: A semiconductor device includes a substrate, a dielectric layer, a plurality of dielectric patterns and a conductive pad. The substrate includes a first surface and a second surface opposite to the first surface. The dielectric layer is disposed at the first surface of the substrate, and the substrate is disposed between the dielectric layer and the second surface of the substrate. The dielectric patterns are disposed on the dielectric layer and between the first surface and the second surface of the substrate. The conductive pad is inserted between the plurality of dielectric patterns and extended into the dielectric layer.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
  • Patent number: 11877842
    Abstract: A communication device comprising: a first unit having a first antenna, a second antenna, and a first signal transmitting and receiving circuitry; a second unit having a third antenna, a fourth antenna, and a second signal transmitting and receiving circuitry, wherein the second unit is located in proximity to the first unit; and wherein the second unit is capable of receiving signals at a first signal frequency, down converting the signals to a second signal frequency, and relaying the signals through a barrier to the first unit. Wherein the first signal frequency is in the millimeter wave range and the second signal frequency is in the microwave range.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: January 23, 2024
    Assignee: Micro Mobio Corporation
    Inventors: Zlatko Aurelio Filipovic, Weiping Wang, Adam James Wang, Guan-Wu Wang, Yi-Hung Chen
  • Publication number: 20240004254
    Abstract: A display device includes a driving substrate, a display medium layer, a glue layer, and a protective layer. The display medium layer is disposed on the driving substrate. The glue layer is disposed around the display medium layer. The protective layer covers the display medium layer and the glue layer, and the protective layer is bent toward the driving substrate along the glue layer.
    Type: Application
    Filed: January 18, 2023
    Publication date: January 4, 2024
    Applicant: E Ink Holdings Inc.
    Inventors: Tsai-Wei Shei, Yen-Ze Huang, Yuan-Hsun Cheng, Yi-Hung Chen, Jen-Shiun Huang
  • Publication number: 20230411564
    Abstract: A light-emitting diode (LED) and a manufacturing method thereof are disclosed. The LED includes: a substrate, a light-tight reflective layer, an inner epitaxial layer, an outer epitaxial layer, a non-conducting layer, an ohmic metallic body, a first electrode, and a second electrode. The inner epitaxial layer and the outer epitaxial layer are separated from each other by a separation space. In a view made from a top side of the LED, the separation space forms a closed path and surrounds the light exit hole. The separation space provides an effect of blocking an electrical current and a light emission area in the inner epitaxial layer. By redirecting light emitting from a lateral side of the inner epitaxial layer toward a top side of the LED, the LED shows a low side light ratio.
    Type: Application
    Filed: January 19, 2023
    Publication date: December 21, 2023
    Inventors: YUAN-HUI FU, YI-HUNG CHEN, TAI-HSIANG HU
  • Patent number: 11831392
    Abstract: A communication device comprising: a first unit having a first antenna, a second antenna, and a first signal transmitting and receiving circuitry; a second unit having a third antenna and a fourth antenna and wherein the second unit is located in proximity to the first unit; wherein the second unit is capable of receiving a first radio frequency (RF) signal at a first frequency, amplifying the first RF signal in a second unit low noise amplifier (LNA), and autonomously transmitting the first RF signal through a barrier to the first unit; and wherein the first unit is capable of transmitting signals at the first frequency to a wireless device. The communication device is capable of operating in a first mode by communicating with a terrestrial base station and in a second mode with a satellite.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: November 28, 2023
    Assignee: Micro Mobio Corporation
    Inventors: Zlatko Aurelio Filipovic, Guan-Wu Wang, Weiping Wang, Adam Wang, Yi-Hung Chen
  • Patent number: 11824281
    Abstract: An antenna element comprises one or more directors, a resonator, and a three dimensional ground assembly. Parts of the antenna element are arranged on three metal layers. A top layer has an unconnected metal bar which forms a beam director, a resonator and a top part of the ground assembly. The resonator is an integral piece substantially in the form of a loop connected to a feed line and a feed line terminal ending. The feed line terminal ending serves as the ground plane for the feed line as well as providing impedance matching from the external transceiver circuit to the resonator. The ground assembly includes a top layer ground connected to a plurality of metallized half cylindrical hole channels (or metallized via holes) which connect to a ground terminal in a bottom layer.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: November 21, 2023
    Assignee: Micro Mobio Corporation
    Inventors: Guan-Wu Wang, Terng-Jie Lin, Yi-Hung Chen, Wen-Chung Liu, Weiping Wang
  • Patent number: 11781904
    Abstract: A chip chuck includes front and back slopes obliquely extending toward a bottom surface from front and back edges of a top surface having a chip placement area for supporting a chip under test, and is defined with an imaginary vertical reference line perpendicular to the chip placement area and an imaginary horizontal reference line. The front and back slopes are connected with the chip placement area and each provided with an included acute angle with respect to the imaginary horizontal reference line, thereby avoiding interference with light emitted from the chip. A chip supporting device includes a chip chuck, and an optical sensing module fixed relative thereto and including an optical sensor whose light receiving surface faces toward a back light emitting surface of the chip, thereby enabling optical characteristic inspection of front and back light emitting surfaces of the chip at the same time.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: October 10, 2023
    Assignee: MPI CORPORATION
    Inventors: Hung-I Lin, Bo-Sian Lee, Yi-Hung Chen
  • Publication number: 20230320174
    Abstract: A display device includes a first substrate, a second substrate, a display layer, a bump, and a sealing material. The second substrate is disposed over the first substrate. The display layer is disposed between the first substrate and the second substrate, and has a boundary. The bump is connected to the first substrate or the second substrate and protrudes in a direction toward the opposite second substrate or first substrate, and is disposed around the boundary. The sealing material is filled between the bump and the display layer. The water vapor transmission rate of the bump is less than the water vapor transmission rate of the sealing material.
    Type: Application
    Filed: March 2, 2023
    Publication date: October 5, 2023
    Applicant: E Ink Holdings Inc.
    Inventors: Yuan-Hsun Cheng, Tsai-Wei Shei, Yen-Ze Huang, Yi-Hung Chen, Jen-Shiun Huang
  • Publication number: 20230238193
    Abstract: The teaching equipment of electromechanical system provided by the present invention is used to connect an emergency stop loop of an electromechanical equipment, including a multi-stage key switch, an enabling switch and a safety control device. The multi-stage key switch is used to switch between a first mode and a second mode. The multi-stage key switch generates a switching signal during switching. The enabling switch is connected to the emergency stop loop. The safety control device is used to receive the switching signal. The safety control device includes a transient emergency stop circuit and a disconnection loop time. The safety control device triggers the emergency stop loop to enter the emergency stop state according to the switching signal. The emergency stop state includes that the transient emergency stop circuit interrupts the emergency stop loop until the disconnection loop time is up.
    Type: Application
    Filed: January 25, 2022
    Publication date: July 27, 2023
    Inventors: Yen-Shun HUANG, Yi-Hung CHEN, Shun-Kai CHANG