Abstract: A wafer-level package includes a first die and a second die that are wafer-level packaged. The first die has a first clock source. The second die has a second clock source. The first clock source generates a clock shared by the first die and the second die. The second clock source, however, does not generate a clock used by any of the first die and the second die.

Abstract: A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.

Abstract: Methods and apparatuses pertaining to flexible information mapping and modification of data packets are described. A method may involve receiving a data packet, modifying one or more attributes of the data packet, and outputting the modified data packet. In modifying the one or more attributes of the data packet, the method may involve extracting information from the data packet, the information including one or more user-defined fields (UDFs) in a header of the data packet. The method may also involve defining one or more source user-defined fields (SUDFs) according to at least one UDF of the one or more UDFs. The method may further involve performing one or more actions with respect to at least one SUDF of the one or more SUDFs.

Abstract: The light-emitting device includes a base plate, a bonding metal layer, a conductive oxide layer, an epitaxial layer, an insulation layer, a first ohmic contact layer, a second ohmic contact layer, a third ohmic contact layer, and a conductor line. The light-emitting device of the present invention uses the process of providing a conductor line to connect an ohmic contact layer, instead of wire bonding, so that a package process required by wire bonding can be eliminated to thereby reduce the size of the light-emitting device. Further, the light-emitting device, after the formation of the conductor line on the ohmic contact layer, allows for performance of a step of directly bonding to a circuit board so as to reduce the package size and simplify equipment necessary for the package process to thereby further lower down fabrication costs, achieving the effects of simplification of operation and fast fabrication.

Abstract: The light-emitting device includes a base plate, a bonding metal layer, a conductive oxide layer, an epitaxial layer, an insulation layer, a first ohmic contact layer, a second ohmic contact layer, a third ohmic contact layer, and a conductor line. The light-emitting device of the present invention uses the process of providing a conductor line to connect an ohmic contact layer, instead of wire bonding, so that a package process required by wire bonding can be eliminated to thereby reduce the size of the light-emitting device. Further, the light-emitting device, after the formation of the conductor line on the ohmic contact layer, allows for performance of a step of directly bonding to a circuit board so as to reduce the package size and simplify equipment necessary for the package process to thereby further lower down fabrication costs, achieving the effects of simplification of operation and fast fabrication.

Abstract: A wafer-level package has a first die and a second die. The first die has a first clock source arranged to generate a first clock, a first sub-system arranged to generate transmit data, and an output circuit arranged to output the transmit data according to the first clock. The second die has a second sub-system, a second clock source arranged to generate a second clock, and an input circuit having an asynchronous first-in first-out (FIFO) buffer. The input circuit buffers the transmit data transferred from the output circuit in the asynchronous FIFO buffer according to the first clock, and outputs the buffered transmit data in the asynchronous FIFO buffer to the second sub-system according to the second clock.

Abstract: Some embodiments of the present disclosure provide a back side illuminated (BSI) image sensor. The BSI image sensor includes a semiconductive substrate, a deep trench isolation (DTI) at a back side of the semiconductive substrate, and a dielectric layer. the dielectric layer includes a top portion over the back side, and a side portion lined to a sidewall of the DTI. The BSI image sensor includes a planarization stop layer disposed conformally on top of the dielectric layer. The planarization stop layer includes a top section on the top portion, a side section lined against the side portion, and a first transmittance. The BSI image sensor includes a low-transparent material inside the DTI, and the low-transparent material includes a second transmittance. The second transmittance is lower than the first transmittance.

Abstract: A semiconductor device and a method for fabricating thereof are provided. In the method for fabricating the semiconductor device, at first, a first semiconductor wafer including a first oxide layer and a second semiconductor wafer including a second oxide layer are provided. Next, the second oxide layer is bonded with the first oxide layer. Then, a through via is formed to through the second oxide layer and the first oxide layer, so as to form a sidewall cut on a sidewall of the through via at an interface of the first oxide layer and the second oxide layer. Then, an ashing operation is performed on the sidewall of the through via to form a protection layer on the sidewall of the through via. After the ashing operation is performed, a conductive material is deposited on the through via.

Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes forming a film over a substrate. The semiconductor device structure includes forming a first mask layer over the film. The semiconductor device structure includes forming a second mask layer over the first mask layer. The second mask layer exposes a first portion of the first mask layer. The semiconductor device structure includes performing a plasma etching and deposition process to remove the first portion of the first mask layer and to form a protection layer over a first sidewall of the second mask layer. The first mask layer exposes a second portion of the film after the plasma etching and deposition process. The semiconductor device structure includes removing the second portion using the first mask layer and the second mask layer as an etching mask.

Abstract: An electronic device including a main body and a stand module is provided. The stand module includes a supporting component and a sliding component. The supporting component is pivoted to the main body. The sliding component is slidably disposed to the main body and has an end. The sliding component is adapted to slide to a first position such that the end protrudes out of the main body. The end is adapted to receive an external force to move inside the main body, such that the sliding component slides to a second position and drives the supporting component to expand from the main body.

Abstract: The present disclosure provides a method of fabricating a semiconductor structure, and the method includes following steps. A gate structure is formed on a substrate, and a liner layer is formed to cover the gate structure and the substrate. A spacer layer is formed on the liner layer, and an etching gas is continuously provided to remove a portion of the spacer layer while maintaining the substrate at a second pressure, which the etching gas has a first pressure. The second pressure is greater than the first pressure.

Abstract: A memory device is provided. The memory device includes a plurality of memory banks, at least one buffer bank and a controller. Each memory bank has a bank index and includes a plurality of bank memory units for storing data associated with a logical address corresponding to the bank index. The buffer bank includes a plurality of buffer memory units. The controller receives a read command and a write command in a first clock cycle, wherein the read command and the write command are requesting to access a specific memory bank among the memory banks. If an access request of the read command and the write command exceeds a bandwidth limitation of the specific memory bank, the controller utilizes the buffer bank to accomplish the read command and the write command.

Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes forming a film over a substrate. The semiconductor device structure includes forming a first mask layer over the film. The semiconductor device structure includes forming a second mask layer over the first mask layer. The second mask layer exposes a first portion of the first mask layer. The semiconductor device structure includes performing a plasma etching and deposition process to remove the first portion of the first mask layer and to form a protection layer over a first sidewall of the second mask layer. The first mask layer exposes a second portion of the film after the plasma etching and deposition process. The semiconductor device structure includes removing the second portion using the first mask layer and the second mask layer as an etching mask.

Abstract: The present disclosure provides a method for manufacturing a semiconductor isolation structure, including providing a substrate with a top surface; forming a patterned mask over the top surface; forming a trench through the patterned mask in the substrate by a directional etch comprising nitrogen-containing substance, wherein an aspect ratio of the trench is formed to be greater than about 18, and a ratio of a width of a narrowest portion and a width of a widest portion of the isolation region is formed to be greater than about 0.7; and filling the trench with insulating materials. The present disclosure also provides an image sensing device, including a radiation sensing region with a first isolation region separating adjacent radiation detecting units and a peripheral region, wherein an aspect ratio of the first isolation region is greater than about 18.

Abstract: A wafer-level package includes a plurality of dies and a plurality of connection paths. The dies include at least a first die and a second die. The dies are arranged in a side-by-side fashion, and a first side of the first die is adjacent to a first side of the second die. The connection paths connect input/output (I/O) pads arranged on the first side of the first die to I/O pads arranged on the first side of the second die, wherein adjacent I/O pads on the first side of the first die are connected to adjacent I/O pads on the first side of the second die via connection paths on only a single layer. For example, the first die is identical to the second die. For another example, the wafer-level package is an integrated fan-out (InFO) package or a chip on wafer on substrate (CoWoS) package. For yet another example, the dies are assembled in the wafer-level package to perform a network switch function.

Abstract: A wafer-level package has a first die and a second die. The first die has a first clock source arranged to generate a first clock, a first sub-system arranged to generate transmit data, and an output circuit arranged to output the transmit data according to the first clock. The second die has a second sub-system, a second clock source arranged to generate a second clock, and an input circuit having an asynchronous first-in first-out (FIFO) buffer. The input circuit buffers the transmit data transferred from the output circuit in the asynchronous FIFO buffer according to the first clock, and outputs the buffered transmit data in the asynchronous FIFO buffer to the second sub-system according to the second clock.

Abstract: An electronic device including a main body and a stand module is provided. The stand module includes a supporting component and a sliding component. The supporting component is pivoted to the main body. The sliding component is slidably disposed to the main body and has an end. The sliding component is adapted to slide to a first position such that the end protrudes out of the main body. The end is adapted to receive an external force to move inside the main body, such that the sliding component slides to a second position and drives the supporting component to expand from the main body.

Abstract: A method of generating, based on a first netlist of an integrated circuit, a second netlist includes generating layout geometry parameters for at least a portion of the first netlist of the integrated circuit, the portion including a first device. A third netlist is generated based on the first netlist and the layout geometry parameters. A description in the third netlist for modeling the first device is decomposed into a description in a fourth netlist for modeling a plurality of secondary devices. The second netlist is generated based on the fourth netlist.

Abstract: Some embodiments of the present disclosure provide a back side illuminated (BSI) image sensor. The BSI image sensor includes a semiconductive substrate, a deep trench isolation (DTI) at a back side of the semiconductive substrate, and a dielectric layer. the dielectric layer includes a top portion over the back side, and a side portion lined to a sidewall of the DTI. The BSI image sensor includes a planarization stop layer disposed conformally on top of the dielectric layer. The planarization stop layer includes a top section on the top portion, a side section lined against the side portion, and a first transmittance. The BSI image sensor includes a low-transparent material inside the DTI, and the low-transparent material includes a second transmittance. The second transmittance is lower than the first transmittance.

Abstract: Methods and apparatuses pertaining to flexible information mapping and modification of data packets are described. A method may involve receiving a data packet, modifying one or more attributes of the data packet, and outputting the modified data packet. In modifying the one or more attributes of the data packet, the method may involve extracting information from the data packet, the information including one or more user-defined fields (UDFs) in a header of the data packet. The method may also involve defining one or more source user-defined fields (SUDFs) according to at least one UDF of the one or more UDFs. The method may further involve performing one or more actions with respect to at least one SUDF of the one or more SUDFs.