Abstract: The present invention relates to a semiconductor package having at least one first layer chip, a plurality of first metal bumps, at least one second layer chip and a package body. The first layer chip includes a first active surface upon which the first metal bumps are disposed and a plurality of first signal coupling pads disposed adjacent to the first active surface. The second layer chip is electrically connected to the first layer chip, and includes a second active surface that faces the first active surface and a plurality of second signal coupling pads. The second signal coupling pads are capacitively coupled to the first signal coupling pads so as to provide proximity communication between the first layer chip and the second layer chip. The package body encapsulates the first layer chip, the first metal bumps, and the second layer chip, and the first metal bumps are partially exposed.

Abstract: A communication device is disclosed, having a wireless LAN transceiver, a wireless LAN demodulation circuit, a Bluetooth transceiver, a Bluetooth demodulation circuit, an oscillator, and a mixer. The wireless LAN transceiver conducts communication in a first frequency band and the wireless LAN demodulation circuit demodulates the wireless LAN signals. The Bluetooth transceiver conducts communication in a second band and a third frequency band, which are higher and lower than the first frequency band, respectively. The oscillator generates oscillating signals. The mixer mixes the signals in the second frequency band with an oscillating signal, which is higher than the second frequency band, and mixes the signals in the third frequency band with another oscillating signal, which is lower than the third frequency band to generate mixed signals. The Bluetooth demodulation circuit demodulates the mixed signals of the mixer.

Abstract: A power supplying circuit for generating an output voltage, which comprises: a noise detecting circuit, for receiving a first reference voltage and for generating a second reference voltage according to the output voltage and the first reference voltage, wherein a noise component of the second reference voltage is the same as which of the output voltage; a control voltage generating unit, for receiving a feedback voltage and the second reference voltage, and for generating a control voltage according to the feedback voltage and the second reference voltage; a voltage providing device, for generating the output voltage according to the control voltage and an input voltage; and a feedback module, for generating the feedback voltage according to the output voltage.

Abstract: A charge pump device is coupled to first and second input terminals receiving an AC signal and comprises an electric switch set and two voltage boost circuits. The electric switch set is coupled to the first and second input terminals and a ground terminal and switches the conduction status thereof according to the AC signal. The two voltage boost circuits are interconnected and coupled to the first and second input terminals and the electric switch set. The boost circuits receive the AC signal according to the conduction status, respectively boost voltage in positive and negative semi-periods of the AC signal, and alternatively output a voltage at least two times the peak voltage of the AC signal, to a load. The present invention not only boosts voltage by several folds within a cycle but also outputs voltage by dual phases to reduce ripple of output voltage.

Abstract: A semiconductor device package and a method of fabricating the same are disclosed. The semiconductor device package includes a substrate, a buffer structure, two active chips and a bridge chip. The substrate has a cavity, a first surface and a second surface opposite to the first surface. The cavity is extended from the first surface toward the second surface, and the buffer structure is disposed in the cavity. The active chips are disposed on and electrically connected to the first surface and around the cavity. The active chips both have a first active surface. The bridge chip is disposed in the cavity and above the buffer structure. The bridge chip has a second active surface, the second active surface faces the first active surfaces and is partially overlapped with the first active surfaces, the bridge chip is used for providing a proximity communication between the active chips.

Abstract: The present invention relates to an apparatus and a method for testing non-contact pads of a semiconductor device to be tested. The apparatus includes an insulating body, at least one testing module and a plurality of probes. The insulating body includes an accommodating cavity, a lower opening and at least one side opening. The side opening communicates with the accommodating cavity and the lower opening. The testing module is disposed in the side opening, and each testing module includes a circuit board and an active chip. The active chip is disposed on and electrically connected to the circuit board. The active chip has a plurality of testing pads exposed to the accommodating cavity. The probes are disposed in the lower opening.

Abstract: A first substrate has a first surface facing a second surface of the second substrate. The active chips are disposed on and electrically connected to the first surface, and spaced apart from each other by an interval, wherein the active chips respectively have a first active surface. The bridge chip is mechanically and electrically connected to the second surface, and has a second active surface partially overlapped with the first active surfaces of the active chips, such that the bridge chip is used for providing a proximity communication between the active chips. The connection structure is disposed between the first surface and the second surface for combining the first substrate and the second substrate.

Abstract: A semiconductor device package and a method of fabricating the same are provided. The semiconductor device package includes a substrate, a first chip, a jumper chip, a plurality of first bonding wires and a plurality of second bonding wires. The substrate has a plurality of contact pads. The first chip is disposed and electrically connected to the substrate via the first bonding wires. The jumper chip is disposed on the first chip and has a plurality of metal pads. Each of the metal pads is electrically connected to two contact pads of the substrate via two second bonding wires, respectively.

Abstract: A seat control mechanism for a seat frame has an interlock device that includes a lock plate slidably coupled to a seatback for movement between a locked and a released position. A stop bracket is coupled to a seat bottom and has a first end engageable with the lock plate in the locked position when the seatback is in a full-forward position and a second end engageable with the lock plate in the locked position when the seat back is in a fold-flat position. An actuator moves the lock plate from the locked to the released position to release the lock plate and permit movement of the seatback between the full-forward position and the fold-flat position. The lock plate is biased toward the locked position to engage the ends of the stop bracket to lock the seat back in either the full-forward or the fold-flat position after releasing the actuator.

Abstract: A semiconductor package includes a semiconductor structure. The semiconductor structure includes a plurality of dielectric layers and a plurality of conductive interconnects embedded in the semiconductor structure. The semiconductor structure also includes a plurality of proximity communication signal input terminals. At least one of the plurality of proximity communication signal input terminals includes a first electrode and a second electrode. The first electrode and the second electrode are spaced apart so as to be configured to provide proximity communication through capacitive coupling. The first electrode is exposed proximate to a surface of the semiconductor structure.

Abstract: The advanced quad flat non-leaded package structure includes a carrier, a chip, a plurality of wires, and a molding compound. The carrier includes a die pad and a plurality of leads. The inner leads of the leads are designed to possess incurved sidewalls for enhancing the adhesion between the inner leads and the surrounding molding compound.

Abstract: A speaker includes a base defining a pair of receiving cavities separated from each other in a longitudinal direction and an engaging portion disposed between the pair of receiving cavities, a pair of magnetic circuit systems received into the pair of the receiving cavities, a diaphragm attached on the base, a pair of voice coil members connecting with the diaphragm, and a suspension mounted on the base. The suspension defines a pair of separating portions separated from each other in a lateral direction. Each separating portion defines a fixing portion engaging with the engaging portion of the base, a pair of connecting portions extending from two ends of the fixing portion and towards the diaphragm, and a pair of supporting portions connecting with the connecting portion for engaging with the pair of voice coil members, respectively.

Abstract: The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a substrate, at least one first chip, a dielectric layer and at least one second chip. The first chip is attached and electrically connected to the substrate. The first chip includes a first active surface and a plurality of first signal coupling pads. The first signal coupling pads are disposed adjacent to the first active surface. The dielectric layer is disposed on the first active surface. The second chip is attached and electrically connected to the substrate by metal bumps. The second chip includes a second active surface and a plurality of second signal coupling pads. The second active surface contacts the dielectric layer. The second signal coupling pads are disposed adjacent to the second active surface, and capacitively coupled to the first signal coupling pads of the first chip, so as to provide proximity communication between the first chip and the second chip.

Abstract: The present invention relates to a receiving apparatus of a communication system, which comprises a receiving module, a selection unit, and a processing module. The receiving module receives an input signal and produces a first signal and a second signal. The phases of the first and the second signals are different. The selection unit receives the first and the second signals, and switches for outputting the first or the second signal. The processing module receives and processes the first and the second signals, and produces an output signal. Thereby, the present invention uses the selection unit for processing two phase signals via a set of channels. Thereby, circuit area and power consumption can be reduced, and hence achieving the purpose of saving cost.

Abstract: The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes at least one first layer chip, a plurality of first metal bumps, at least one second layer chip and a package body. The first layer chip includes a first active surface and a plurality of first signal coupling pads. The first signal coupling pads are disposed adjacent to the first active surface. The first metal bumps are disposed on the first active surface of the first layer chip. The second layer chip is electrically connected to the first layer chip, and includes a second active surface and a plurality of second signal coupling pads. The second active surface faces the first active surface of the first layer chip. The second signal coupling pads are disposed adjacent to the second active surface, and capacitively coupled to the first signal coupling pads of the first layer chip, so as to provide proximity communication between the first layer chip and the second layer chip.

Abstract: A semiconductor package and related methods are described. In one embodiment, the package includes a die pad, multiple leads, a chip, a package body, and a protective layer. The die pad includes an upper sloped portion, a lower sloped portion, and a peripheral edge region defining a cavity with a cavity bottom. Each lead includes an upper sloped portion and a lower sloped portion. The chip is disposed on the cavity bottom and is coupled to the leads. The package body is formed over the chip and the leads, substantially fills the cavity, and substantially covers the upper sloped portions of the die pad and the leads. The lower sloped portions of the die pad and the leads at least partially extend outwardly from a lower surface of the package body. The protective layer substantially covers the lower sloped portion and the lower surface of at least one lead.

Abstract: A wafer defines a plurality of chips arranged in array manner. Each chip includes at least one aluminum pad and a middle material. The middle material covers the aluminum pad and is mounted on the aluminum pad.

Abstract: A system for latching a seat to a guide track (102) is disclosed. The system generally includes a latch plate (122) being coupled to the seat, a first release member (124) coupled to the latch plate (122), and a second release member coupled to the latch plate. The first release member (124) is configured to releasably engage the guide track (102) and is selectively movable between a first position for fixedly coupling the seat to the guide track (102), a second position for movably coupling the seat to the guide track, and a third position for detachably coupling the seat to the guide track (102). A second release member (160) is configured to prevent the first release member (124) for moving to the third position unless the second release member has been selectively actuated.

Abstract: In one aspect, described herein are field effect chemical sensor devices useful for chemical and/or biochemical sensing. Also provided herein are methods for single molecule detection. In another aspect, described herein are methods useful for amplification of target molecules by PCR.

Abstract: The invention features methods of quantifying cells in a sample by lysing the cells followed by the measurement of at least one intracellular component. Methods of the invention are especially useful for quantifying small numbers of cells, e.g., over a large surface area or volume compared to the cell size. In a preferred embodiment, methods of the invention are performed using a microfluidic device.