Patents by Inventor Yi Yi

Yi Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240135897
    Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.
    Type: Application
    Filed: December 11, 2022
    Publication date: April 25, 2024
    Inventors: De-Fu CHEN, Po Lun CHEN, Chun-Ta CHEN, Ta-Jen HUANG, Po-Tsun LIU, Guang-Ting ZHENG, Ting-Yi YI
  • Patent number: 11961489
    Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.
    Type: Grant
    Filed: December 11, 2022
    Date of Patent: April 16, 2024
    Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: De-Fu Chen, Po Lun Chen, Chun-Ta Chen, Ta-Jen Huang, Po-Tsun Liu, Guang-Ting Zheng, Ting-Yi Yi
  • Patent number: 11942425
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate, a contact structure, a first conductive element, and a first dielectric spacer structure. The semiconductor substrate includes an active region and an isolation structure. The contact structure is on the active region of the semiconductor substrate. The first conductive element is on the isolation structure of the semiconductor substrate. The first dielectric spacer structure is between the contact structure and the first to conductive element. The first dielectric spacer structure has a first concave surface facing the first conductive element.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: March 26, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chih-Ying Tsai, Jui-Seng Wang, Yi-Yi Chen
  • Patent number: 11903179
    Abstract: The present disclosure provides a method of manufacturing a semiconductor structure. The method includes providing a semiconductor substrate including an active region and an isolation structure. The method also includes forming a contact structure on the active region of the semiconductor substrate. The method further includes forming a dielectric spacer on opposite sides of the contact structure. The method also includes forming a conductive element on the isolation structure of the semiconductor substrate, wherein the dielectric spacer has a concave surface facing the conductive element.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: February 13, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chih-Ying Tsai, Jui-Seng Wang, Yi-Yi Chen
  • Publication number: 20240008266
    Abstract: The present application provides a method of fabricating bit line contacts. The method includes steps of depositing an insulative layer and a sacrificial layer on the substrate; forming a photosensitive layer on the sacrificial layer; performing a first exposure process to expose the photosensitive layer to actinic radiation through a first mask; performing a first developing process to form an intermediate pattern on the sacrificial layer; performing a second exposure process to expose the intermediate pattern to the actinic radiation through a second mask; performing a second developing process to form a target pattern on the sacrificial layer; performing a first etching process to remove portions of the sacrificial layer exposed by the target pattern; performing a second etching process to form a plurality of trenches in the insulative layer; and depositing a conductive material into the plurality of trenches to form the bit line contacts.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Inventors: CHIH-YING TSAI, JUI-SENG WANG, YI-YI CHEN
  • Publication number: 20240004300
    Abstract: The present application provides a method of processing a substrate. The method of processing the substrate includes steps of forming a photosensitive layer on the substrate; performing a first exposure process to expose the photosensitive layer to actinic radiation through a first mask; performing a first developing process to remove portions of the photosensitive layer exposed to the actinic radiation and form an intermediate pattern; performing a second exposure process to expose the intermediate pattern to the actinic radiation through a second mask; performing a second developing process to remove portions of the intermediate pattern shielded from the actinic radiation and form a target pattern; and performing an etching process to remove portions of the substrate exposed by the target pattern.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Inventors: CHIH-YING TSAI, JUI-SENG WANG, YI-YI CHEN
  • Publication number: 20230335490
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate, a contact structure, a first conductive element, and a first dielectric spacer structure. The semiconductor substrate includes an active region and an isolation structure. The contact structure is on the active region of the semiconductor substrate. The first conductive element is on the isolation structure of the semiconductor substrate. The first dielectric spacer structure is between the contact structure and the first to conductive element. The first dielectric spacer structure has a first concave surface facing the first conductive element.
    Type: Application
    Filed: April 19, 2022
    Publication date: October 19, 2023
    Inventors: CHIH-YING TSAI, JUI-SENG WANG, YI-YI CHEN
  • Publication number: 20230337411
    Abstract: The present disclosure provides a method of manufacturing a semiconductor structure. The method includes providing a semiconductor substrate including an active region and an isolation structure. The method also includes forming a contact structure on the active region of the semiconductor substrate. The method further includes forming a dielectric spacer on opposite sides of the contact structure. The method also includes forming a conductive element on the isolation structure of the semiconductor substrate, wherein the dielectric spacer has a concave surface facing the conductive element.
    Type: Application
    Filed: April 19, 2022
    Publication date: October 19, 2023
    Inventors: CHIH-YING TSAI, JUI-SENG WANG, YI-YI CHEN
  • Publication number: 20230263455
    Abstract: Provided here are non-invasive methods for evaluating functional connectivity patterns in localized brain regions of a patient involving application of a MS-specific functional meta-analytic connectivity model in resting-state functional magnetic resonance imaging (rsfMRI) data to provide patients with appropriate medical care in response to output from the model.
    Type: Application
    Filed: May 29, 2021
    Publication date: August 24, 2023
    Inventors: Florence Yi Yi Ling CHIANG, Peter T. FOX, Rebecca S. Romero, Larry PRICE
  • Patent number: 11655509
    Abstract: Disclosed herein is a kit for diagnosing spinal muscular atrophy (SMA) in a human subject based on the copy numbers of exons 7 and 8 of SMN1 gene and the copy numbers of exons 7 and 8 of SMN2 gene in a DNA sample isolated from the human subject. Also disclosed herein are methods of diagnosing SMA by use of the present kit, and methods of treating SMA based on the diagnostic result.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: May 23, 2023
    Assignee: Origin Biotechnology Co., Ltd.
    Inventors: Yi-Yi Kuo, I-Fan Chiu, Lai-Ha Chung, Shu-Ju Lee
  • Patent number: 11512984
    Abstract: A dynamic displacement error compensation system by which detection error information obtained based on calibration detection of first and second axes, is respectively made into first and second compensation tables for compensating displacement on the axes by using positional information of the axes as variables, the first compensation table is stored in a first driver of a first motor device for driving a first moving element to move linearly on the first axis, the second compensation table is stored in a second driver of a second motor device for driving a second moving element to move linearly on the second axis, the drivers simultaneously or successively obtain a first dynamic positional information of the first moving element on the first axis and a second dynamic positional information of the second moving element on the second axis, and the moving elements are respectively displaceably compensated according to the compensation tables.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: November 29, 2022
    Assignee: HIWIN MIKROSYSTEM CORP.
    Inventors: Kai-Ti Chen, Chun-Yi Yi, Wei-Te Chuang, Yen-Yu Chen
  • Patent number: 11459614
    Abstract: Disclosed herein is a method of performing polymerase chain reaction (PCR) to determine a repeating number of CGG sequence in fragile X mental retardation 1 (FMR1) gene. Also disclosed herein are a kit, and uses thereof in making a diagnosis of Fragile X syndrome (FXS) in a human subject based on the repeating number of the CGG sequence in a DNA sample isolated from the human subject. According to embodiments of the present disclosure, the kit comprises four primers, in which the first primer comprises a first polynucleotide sequence of SEQ ID NO: 1; the second primer comprises a second polynucleotide sequence of SEQ ID NO: 2; the third primer comprises a third polynucleotide sequence of SEQ ID NO: 3, and a non-human sequence disposed at and connected to the 5?-end of the third polynucleotide sequence; and the fourth primer comprises the non-human sequence.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: October 4, 2022
    Assignee: XIAMEN BIOFAST BIOTECHNOLOGY CO., LTD.
    Inventors: Yi-Yi Kuo, Yu-Chiao Hsiao, I-Fan Chiu, Lai-Ha Chung, Shu-Ju Lee
  • Publication number: 20220307869
    Abstract: A dynamic displacement error compensation system by which detection error information obtained based on calibration detection of first and second axes, is respectively made into first and second compensation tables for compensating displacement on the axes by using positional information of the axes as variables, the first compensation table is stored in a first driver of a first motor device for driving a first moving element to move linearly on the first axis, the second compensation table is stored in a second driver of a second motor device for driving a second moving element to move linearly on the second axis, the drivers simultaneously or successively obtain a first dynamic positional information of the first moving element on the first axis and a second dynamic positional information of the second moving element on the second axis, and the moving elements are respectively displaceably compensated according to the compensation tables.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 29, 2022
    Inventors: Kai-Ti CHEN, Chun-Yi YI, Wei-Te CHUANG, Yen-Yu CHEN
  • Patent number: 11170997
    Abstract: Methods and apparatuses for reducing roughness using integrated atomic layer deposition (ALD) and etch processes are described herein. In some implementations, after a mask is provided on a substrate, methods include depositing a conformal layer on the mask by ALD to reduce roughness and etching a layer underlying the mask to form patterned features having a reduced roughness. In some implementations, after a substrate is etched to a first depth to form features at the first depth in the substrate, methods include depositing a conformal layer by ALD on sidewalls of the features to protect sidewalls and reduce roughness during a subsequent etch process. The ALD and etch processes may be performed in a plasma chamber.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: November 9, 2021
    Assignee: Lam Research Corporation
    Inventors: Xiang Zhou, Naveed Ansari, Yoshie Kimura, Si-Yi Yi Li, Kazi Sultana, Radhika Mani, Duming Zhang, Haseeb Kazi, Chen Xu, Mitchell Brooks, Ganesh Upadhyaya
  • Publication number: 20210277473
    Abstract: Disclosed herein is a kit for diagnosing spinal muscular atrophy (SMA) in a human subject based on the copy numbers of exons 7 and 8 of SMN1 gene and the copy numbers of exons 7 and 8 of SMN2 gene in a DNA sample isolated from the human subject. Also disclosed herein are methods of diagnosing SMA by use of the present kit, and methods of treating SMA based on the diagnostic result.
    Type: Application
    Filed: January 18, 2021
    Publication date: September 9, 2021
    Applicant: Origin Biotechnology Co., Ltd.
    Inventors: Yi-Yi KUO, I-Fan CHIU, Lai-Ha CHUNG, Shu-Ju LEE
  • Publication number: 20200399699
    Abstract: Disclosed herein is a method of performing polymerase chain reaction (PCR) to determine a repeating number of CGG sequence in fragile X mental retardation 1 (FMR1) gene. Also disclosed herein are a kit, and uses thereof in making a diagnosis of Fragile X syndrome (FXS) in a human subject based on the repeating number of the CGG sequence in a DNA sample isolated from the human subject. According to embodiments of the present disclosure, the kit comprises four primers, in which the first primer comprises a first polynucleotide sequence of SEQ ID NO: 1; the second primer comprises a second polynucleotide sequence of SEQ ID NO: 2; the third primer comprises a third polynucleotide sequence of SEQ ID NO: 3, and a non-human sequence disposed at and connected to the 5?-end of the third polynucleotide sequence; and the fourth primer comprises the non-human sequence.
    Type: Application
    Filed: January 31, 2020
    Publication date: December 24, 2020
    Applicant: Origin Biotechnology Co., Ltd.
    Inventors: Yi-Yi KUO, Yu-Chiao HSIAO, I-Fan CHIU, Lai-Ha CHUNG, Shu-Ju LEE
  • Publication number: 20200243326
    Abstract: Methods and apparatuses for reducing roughness using integrated atomic layer deposition (ALD) and etch processes are described herein. In some implementations, after a mask is provided on a substrate, methods include depositing a conformal layer on the mask by ALD to reduce roughness and etching a layer underlying the mask to form patterned features having a reduced roughness. In some implementations, after a substrate is etched to a first depth to form features at the first depth in the substrate, methods include depositing a conformal layer by ALD on sidewalls of the features to protect sidewalls and reduce roughness during a subsequent etch process. The ALD and etch processes may be performed in a plasma chamber.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Inventors: Xiang Zhou, Naveed Ansari, Yoshie Kimura, Si-Yi Yi Li, Kazi Sultana, Radhika Mani, Duming Zhang, Haseeb Kazi, Chen Xu, Mitchell Brooks, Ganesh Upadhyaya
  • Patent number: 10658174
    Abstract: Methods and apparatuses for reducing roughness using integrated atomic layer deposition (ALD) and etch processes are described herein. In some implementations, after a mask is provided on a substrate, methods include depositing a conformal layer on the mask by ALD to reduce roughness and etching a layer underlying the mask to form patterned features having a reduced roughness. In some implementations, after a substrate is etched to a first depth to form features at the first depth in the substrate, methods include depositing a conformal layer by ALD on sidewalls of the features to protect sidewalls and reduce roughness during a subsequent etch process. The ALD and etch processes may be performed in a plasma chamber.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: May 19, 2020
    Assignee: Lam Research Corporation
    Inventors: Xiang Zhou, Naveed Ansari, Yoshie Kimura, Si-Yi Yi Li, Kazi Sultana, Radhika Mani, Duming Zhang, Haseeb Kazi, Chen Xu, Mitchell Brooks, Ganesh Upadhyaya
  • Publication number: 20200130235
    Abstract: The invention relates to an environmentally friendly fuel made of rubber and a manufacturing method thereof. The manufacturing method comprises the steps of pulverizing a rubber material into rubber powder; and mixing the rubber powder with a toxin elimination material to eliminate deleterious compositions such as chlorine and sulfur, wherein the toxin elimination material comprises a non-halogen flame retardant and a desulfurizing agent.
    Type: Application
    Filed: October 26, 2018
    Publication date: April 30, 2020
    Inventor: YI-YI CHEN
  • Publication number: 20200002635
    Abstract: An environmental-friendly fuel is provided which comprises 65 wt % to 95 wt % of a plurality of fine granules of recycled material mixed with 5 wt % to 35 wt % of a halogen-free flame retardant. The plurality of fine granules of recycled material are pulverized from waste polyurethane foamed material recovered from discarded objects.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventor: YI-YI CHEN