Patents by Inventor Yi Yi

Yi Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090136868
    Abstract: The invention provides various ionic and non-ionic photoacid generator compounds. Photoresist compositions that include the novel ionic and non-ionic photoacid generator compounds are also provided. The invention further provides methods of making and using the photoacid generator compounds and photoresist compositions disclosed herein. The compounds and compositions are useful as photoactive components in chemically amplified resist compositions for various microfabrication applications.
    Type: Application
    Filed: October 21, 2008
    Publication date: May 28, 2009
    Inventors: Christopher K. Ober, Yi Yi, Ramakrishnan Ayothi
  • Publication number: 20090059964
    Abstract: Provided are an apparatus and method for synchronizing time information of both transmitting and receiving side using a key re-synchronization frame in encryption communications that require algorithm synchronization.
    Type: Application
    Filed: April 11, 2008
    Publication date: March 5, 2009
    Inventors: Taek Jun Nam, Myeong Won Seo, Sang Yi Yi
  • Publication number: 20080312936
    Abstract: Provided are an apparatus and method for estimating a voice data value corresponding to a silent period produced in a key resynchronization process using the sine waveform characteristic of voice when encrypted digital voice data is transmitted in one-way wireless communication environment. The apparatus includes a transmitter that generates a key resynchronization frame containing key resynchronization information and vector information on voice data inserted thereinto and transmits the key resynchronization frame, and a receiver that receives the key resynchronization frame from the transmitter, extracts the vector information inserted in the key resynchronization frame, and estimates a voice data value corresponding to the key resynchronization period. Based on change ratio between slopes calculated using received voice data, it is possible to estimate the voice data corresponding to a silent period, which improves communication quality.
    Type: Application
    Filed: March 14, 2008
    Publication date: December 18, 2008
    Inventors: Taek Jun NAM, Byeong-Ho AHN, Seok RYU, Sang-Yi YI
  • Publication number: 20080162142
    Abstract: An emotion abreaction device including a body, a control unit, a man machine interacting module and an emotion abreaction unit is provided. The control unit, the man machine interacting module and the emotion abreaction unit are disposed in the body. The man machine interacting module is electrically connected to the control unit for the user to select an emotion abreaction mode. The emotion abreaction unit is electrically connected to the control unit and has at least one sensor to measure force and/or volume for the user to abreact by knocking and/or yelling. Moreover, a using method of an emotion abreaction device includes turning on the emotion abreaction device, and then, responding to the user with a voice and/or an image according to the sensing result of the magnitude of the volume and/or the force after the user knocks and/or yells to an emotion abreaction unit of the emotion abreaction device.
    Type: Application
    Filed: April 4, 2007
    Publication date: July 3, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hung-Hsiu Yu, Yi-Yi Yu, Ching-Yi Liu
  • Patent number: 7385294
    Abstract: A semiconductor device having nickel silicide and a method for fabricating nickel silicide. A semiconductor substrate having a plurality of doped regions is provided. Subsequently, a nickel layer is formed on the semiconductor substrate, and a first rapid thermal process (RTP) is performed to react the nickel layer with the doped regions disposed thereunder. Thereafter, the unreacted nickel layer is removed, and a second rapid thermal process is performed to form a semiconductor device having nickel silicide. The second rapid thermal process is a spike anneal process whose process temperature is between 400 and 600° C.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: June 10, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Yi-Wei Chen, Chao-Ching Hsieh, Yi-Yiing Chiang, Tzung-Yu Hung, Yu-Lan Chang, Po-Chao Tsao, Chang-Chi Huang, Ming-Tsung Chen
  • Publication number: 20080132063
    Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a refractory metal alloy layer over a silicon-containing conductive layer. The refractory metal alloy layer is constituted of a first refractory metal and a second refractory metal. Thereafter, a cap layer is formed on the refractory metal alloy layer. A thermal process is performed so that the refractory metal alloy layer reacts with silicon of the silicon-containing conductive layer to form a refractory metal alloy salicide layer. Afterwards, an etch process with an etch solution is performed to removes the cap layer and the refractory metal alloy layer which has not been reacted and to form a protection layer on the refractory metal alloy salicide layer.
    Type: Application
    Filed: January 21, 2008
    Publication date: June 5, 2008
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Lan Chang, Chao-Ching Hsieh, Yi-Yiing Chiang, Yi-Wei Chen, Tzung-Yu Hung
  • Publication number: 20080112565
    Abstract: Disclosed are a method of inserting vector information for estimating voice data in a key re-synchronization period, a method of transmitting vector information, and a method of estimating voice data in a key re-synchronization period using vector information, capable of estimating the voice data that corresponds to a silent period occurring in a key re-synchronization process when an encrypted digital voice is transmitted in a unidirectional wireless communication environment. A transmitter side inserts accumulation information (i.e., vector information) of a voice change direction of the transmitted previous frame in a key re-synchronization frame, using a voice feature that draws a sine wave, when making the key re-synchronization frame for the re-synchronization, and transmits the key re-synchronization frame with the vector information inserted thereto. A receiver side estimates the voice data value in the key re-synchronization period using the accumulation information (i.e.
    Type: Application
    Filed: May 7, 2007
    Publication date: May 15, 2008
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: TaekJun Nam, Byeong-Ho Ahn, Ki-Hong Kim, Yongick Chung, Sang-Yi Yi
  • Publication number: 20080067684
    Abstract: A semiconductor device including at least one conductive structure is provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal salicide layer and a protection layer. The refractory metal salicide layer is disposed over the silicon-containing conductive layer. The protection layer is disposed over the refractory metal salicide layer. Another semiconductor device including at least one conductive structure is also provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal alloy salicide layer and a protection layer. The refractory metal alloy salicide layer is disposed over the silicon-containing conductive layer. The refractory metal alloy salicide layer is formed from a reaction of silicon of the silicon-containing conductive layer and a refractory metal alloy layer which includes a first refractory metal and a second refractory metal. The protection layer is disposed over the refractory metal alloy salicide layer.
    Type: Application
    Filed: November 23, 2007
    Publication date: March 20, 2008
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Lan Chang, Chao-Ching Hsieh, Yi-Yiing Chiang, Yi-Wei Chen, Tzung-Yu Hung
  • Patent number: 7344978
    Abstract: A semiconductor device including at least one conductive structure is provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal salicide layer and a protection layer. The refractory metal salicide layer is disposed over the silicon-containing conductive layer. The protection layer is disposed over the refractory metal salicide layer. Another semiconductor device including at least one conductive structure is also provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal alloy salicide layer and a protection layer. The refractory metal alloy salicide layer is disposed over the silicon-containing conductive layer. The refractory metal alloy salicide layer is formed from a reaction of silicon of the silicon-containing conductive layer and a refractory metal alloy layer which includes a first refractory metal and a second refractory metal. The protection layer is disposed over the refractory metal alloy salicide layer.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: March 18, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Lan Chang, Chao-Ching Hsieh, Yi-Yiing Chiang, Yi-Wei Chen, Tzung-Yu Hung
  • Publication number: 20070194684
    Abstract: A light source is positioned so as to face a highly light-pervious side of a unidirectional highly pervious lens, which has a highly reflective side on the other side; the highly reflective side of the unidirectional highly pervious lens is coated with a fluorescent material; therefore, when light emitted from the light source travels to the fluorescent material through the highly light-pervious side and the highly reflective side, the fluorescent material will be excited to produce dispersion of light, and the highly reflective side of the unidirectional highly pervious lens will reflect those light beams of dispersed light from the fluorescent material that head towards the light source.
    Type: Application
    Filed: February 21, 2006
    Publication date: August 23, 2007
    Inventors: Yi-Yi Chen, Chun-Liang Lin, Ren-Feng Huang
  • Publication number: 20070166936
    Abstract: A salicide process is described, wherein a substrate with an NMOS transistor and a PMOS transistor thereon is provided. A mask layer is formed over the substrate covering the PMOS transistor but exposing the NMOS transistor, and then a pre-amorphization implantation (PAI) step is conducted to the substrate using the mask layer as a mask. After the mask layer is removed, a salicide layer is formed on the NMOS transistor and the PMOS transistor.
    Type: Application
    Filed: January 19, 2006
    Publication date: July 19, 2007
    Inventors: Po-Chao Tsao, Yi-Yiing Chiang, Chang-Chi Huang, Hsin-Hui Hsu, Ming-Tsung Chen, Chien-Ting Lin
  • Publication number: 20070167009
    Abstract: A semiconductor device having nickel suicide and a method for fabricating nickel silicide. A semiconductor substrate having a plurality of doped regions is provided. Subsequently, a nickel layer is formed on the semiconductor substrate, and a first rapid thermal process (RTP) is performed to react the nickel layer with the doped regions disposed there under. Thereafter, the unreacted nickel layer is removed, and a second rapid thermal process is performed to form a semiconductor device having nickel silicide. The second rapid thermal process is a spike anneal process whose process temperature is between 400 and 600° C.
    Type: Application
    Filed: March 13, 2007
    Publication date: July 19, 2007
    Inventors: Yi-Wei Chen, Chao-Ching Hsieh, Yi-Yiing Chiang, Tzung-Yu Hung, Yu-Lan Chang, Po-Chao Tsao, Chang-Chi Huang, Ming-Tsung Chen
  • Patent number: 7229920
    Abstract: A method of fabricating a metal silicide layer over a substrate is provided. First, a hard mask layer is formed over a gate formed on a substrate and a portion of the substrate is exposed. Thereafter, a first metal silicide layer, which is a cobalt silicide or a titanium silicide layer, is formed on the exposed substrate. After that, the hard mask layer is removed and a second metal silicide layer is formed over the gate, wherein a material of the second metal silicide layer is selected from a group consisting of nickel silicide, platinum silicide, palladium silicide and nickel alloy. Since different metal silicide layers are formed on the substrate and the gate, the problem of having a high resistance in lines with a narrow line width and the problem of nickel silicide forming spikes and pipelines in the source region and the drain region are improved.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: June 12, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Yi-Wei Chen, Tzung-Yu Hung, Yi-Yiing Chiang, Chao-Ching Hsieh, Yu-Lan Chang
  • Patent number: 7214988
    Abstract: A method for forming a metal oxide semiconductor (MOS) transistor is provided. First, a gate structure is formed over a substrate. Then, offset spacers are formed on respective sidewalls of the gate structure. A first ion implantation process is performed to form a lightly doped drain (LDD) in the substrate beside the gate structure. Other spacers are formed on respective sidewalls of the offset spacers. Thereafter, a second ion implantation process is performed to form source/drain region in the substrate beside the spacers. Then, a metal silicide layer is formed on the surface of the source and the drain. An oxide layer is formed on the surface of the metal silicide layer. The spacers are removed and an etching stop layer is formed on the substrate. With the oxide layer over the metal silicide layer, the solvent for removing the spacers is prevented from damaging the metal silicide layer.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: May 8, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Po-Chao Tsao, Chang-Chi Huang, Ming-Tsung Chen, Yi-Yiing Chiang, Yu-Lan Chang, Chung-Ju Lee, Chih-Ning Wu, Kuan-Yang Liao
  • Publication number: 20070095871
    Abstract: A wrist cover has a body, a phone holder and an adjusting device. The body has a ventilating layer and two wrist wings. The phone holder is attached to the body and has a covering sheet and a connecting tab. The covering sheet is attached to the ventilating layer and defines a holding space between the covering sheet and the ventilating layer and an opening. A first fastener is mounted on the covering sheet. The connecting tab is formed on and extends from the body to partially close the opening and has a second fastener detachably connected with the first fastener. The adjusting device is mounted on the body and has a connection strap and an adjusting strap. The connection strap and the adjusting strap are connected respectively to the wrist wings and are detachably connected with each other.
    Type: Application
    Filed: October 31, 2006
    Publication date: May 3, 2007
    Inventor: Yi-Yi Chen
  • Publication number: 20070087573
    Abstract: A pre-treatment method for physical vapor deposition of a metal layer is provided. A substrate is first provided and then a dry cleaning process is performed to the substrate using a chemical etching process, in which the chemical etching process causes a reaction to the oxide. Thereafter, an annealing process is performed, followed by a cooling process. Due to the treatment prior to depositing of the metal layer, subsequent metal layers from ill effects are prevented.
    Type: Application
    Filed: October 19, 2005
    Publication date: April 19, 2007
    Inventors: Yi-Yiing Chiang, Chao-Ching Hsieh, Tzung-Yu Hung, Yu-Lan Chang, Chien-Chung Huang, Yi-Wei Chen
  • Publication number: 20070082494
    Abstract: A method for forming a metal silicide over a substrate is provided. The method comprises steps of performing a fluorine-containing plasma treatment on the substrate to remove a plurality of residual over the substrate, wherein the fluorine-containing plasma treatment is performed in a first tool system. Then, a vacuum system of the first tool system is broken. The substrate is transferred from the first tool system into a second tool system. A metal silicide layer is formed over the substrate in the second tool system.
    Type: Application
    Filed: October 3, 2006
    Publication date: April 12, 2007
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Wei Chen, Yi-Yiing Chiang, Yu-Lan Chang, Tzung-Yu Hung, Chao-Ching Hsieh
  • Patent number: 7202071
    Abstract: The invention provides pth polypeptides and polynucleotides encoding pth polypeptides and methods for producing such polypeptides by recombinant techniques. Also provided are methods for utilizing pth polypeptides to screen for antibacterial compounds.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: April 10, 2007
    Assignee: SmithKline Beecham Corporation
    Inventors: Sanjoy Biswas, James Raymond Brown, Christine Debouck, Deborah Dee Jaworski, Elizabeth Jane Lawlor, Jeffrey Mooney, Lisa Kathleen Shilling, Min Wang, Richard Lloyd Warren, Magdalena Zalacain, Yi Yi Zhong, John Peter Throup, Karen Anne Ingraham, Alison Frances Chalker, David John Holmes, Christopher Michael Traini
  • Publication number: 20070066041
    Abstract: A method for forming a metal oxide semiconductor (MOS) transistor is provided. First, a gate structure is formed over a substrate. Then, offset spacers are formed on respective sidewalls of the gate structure. A first ion implantation process is performed to form a lightly doped drain (LDD) in the substrate beside the gate structure. Other spacers are formed on respective sidewalls of the offset spacers. Thereafter, a second ion implantation process is performed to form source/drain region in the substrate beside the spacers. Then, a metal silicide layer is formed on the surface of the source and the drain. An oxide layer is formed on the surface of the metal silicide layer. The spacers are removed and an etching stop layer is formed on the substrate. With the oxide layer over the metal silicide layer, the solvent for removing the spacers is prevented from damaging the metal silicide layer.
    Type: Application
    Filed: September 15, 2006
    Publication date: March 22, 2007
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Chao Tsao, Chang-Chi Huang, Ming-Tsung Chen, Yi-Yiing Chiang, Yu-Lan Chang, Chung-Ju Lee, Chih-Ning Wu, Kuan-Yang Liao
  • Publication number: 20070063290
    Abstract: A method for forming a metal oxide semiconductor (MOS) transistor is provided. First, a gate structure is formed over a substrate. Then, offset spacers are formed on respective sidewalls of the gate structure. A first ion implantation process is performed to form a lightly doped drain (LDD) in the substrate beside the gate structure. Other spacers are formed on respective sidewalls of the offset spacers. Thereafter, a second ion implantation process is performed to form source/drain region in the substrate beside the spacers. Then, a metal silicide layer is formed on the surface of the source and the drain. An oxide layer is formed on the surface of the metal silicide layer. The spacers are removed and an etching stop layer is formed on the substrate. With the oxide layer over the metal silicide layer, the solvent for removing the spacers is prevented from damaging the metal silicide layer.
    Type: Application
    Filed: September 20, 2005
    Publication date: March 22, 2007
    Inventors: Po-Chao Tsao, Chang-Chi Huang, Ming-Tsung Chen, Yi-Yiing Chiang, Yu-Lan Chang, Chung-Ju Lee, Chih-Ning Wu, Kuan-Yang Liao