Abstract: A color tunable panel of an organic electroluminescent display at least comprises a transparent substrate, an organic light-emitting area and a micro-lens array. The transparent substrate has a first surface and a second surface opposite to the first surface. The organic light-emitting area is disposed over the first surface of the transparent substrate and comprises a plurality of pixels for emitting white light or short-wavelength light. The micro-lens array is disposed over the second surface of the transparent substrate and comprises a plurality of micro-lenses doped with a fluorescent material and/or a phosphorescent material.

Abstract: A developing apparatus for organic electroluminescent display panels comprises a developing unit for supplying a developing solution to be uniformly dispensed to the surface of an organic electroluminescent display panel by immersing the organic electroluminescent display panel into the developing solution or spreading the developing solution over the organic electroluminescent display panel, a cleaning unit having at least a bath connected to the end of the developing unit for spraying a recycled cleaning liquid or cleaning liquid over the organic electroluminescent display panel, a drying unit having at least an airflow driers, and a transporting unit for transporting the electroluminescent display panel; wherein the organic electroluminescent display panel is transported at a constant speed by the transporting unit of the developing apparatus.

Abstract: A system for measuring electrostatic discharge (ESD) characteristics of a semiconductor device that comprises at least one pulse generator generating ESD-scale pulses, a first point of the semiconductor device receiving a first ESD-scale pulse from the at least one pulse generator, a second point of the semiconductor device receiving the first ESD-scale pulse from the at least one pulse generator, at least a third point of the semiconductor device receiving a second ESD-scale pulse from the at least one pulse generator, and a data collector to collect data on the ESD characteristics of the semiconductor device.

Abstract: A bi-directional silicon controlled rectifier formed in a silicon layer and disposed over shallow trench isolations and therefore electrically isolated from the substrate to be insensitive to substrate noise for electrostatic discharge protection an electrostatic discharge protection device that includes a semiconductor substrate, including a first p-type portion, a first n-type portion contiguous with the first p-type portion, a second p-type portion contiguous with the first p-type portion and the first n-type portion, a second n-type portion, a third p-type portion, a third n-type portion contiguous with the third p-type portion, and a fourth p-type portion contiguous with the third p-type portion and the third n-type portion, wherein at least one of the first p-type portion, second p-type portion, third p-type portion, fourth p-type portion, first n-type portion, second n-type portion, and third n-type portion overlaps the isolation structure.

Abstract: An electrode substrate of a flat panel display comprises a substrate, an electrode layer, a conductive layer, and a barrier layer. In this case, the electrode layer is disposed above the substrate. The conductive layer is disposed above the electrode layer. The material of the conductive layer comprises Silver (>99.5%), Silver alloy, Aluminum (>99.5%), Aluminum alloy, Copper (>99.5%) or Copper alloy. The barrier layer is disposed above the conductive layer. The material of the barrier layer comprises Titanium, Titanium alloy, Molybdenum, Chromium, Silicon, Silicon Oxide, or Titanium Oxide.

Abstract: A method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process is provided. In the present lateral SCR device, the shallow trench isolation among the current conduction path of the lateral SCR device is removed and instead of a dummy gate. Thereby, the SCR device has a narrower anode-to-cathode spacing, and then the lateral SCR device can be turned on more quickly to protect the CMOS IC's in ESD events. Additionally, the silicon area of the substrate occupied by the lateral SCR device is also saved. This method for forming a lateral SCR device without shallow-trench-isolation regions in its current path can be fully process-compatible to general CMOS technologies by only changing layout patterns in the mask layers.

Abstract: An organic electroluminescence display device is provided. The OEL device includes a substrate, a first electrode layer, a second electrode layer, an organic functional layer and at least one electrochromic medium layer. The first electrode layer is disposed on the substrate, the second electrode layer is disposed over the first electrode layer, and the organic functional layer and the electrochromic medium layer are disposed between the first electrode layer and the second electrode layer. Accordingly, the electrochromic medium layer is provided as a selective light valve to improve the reflection of the external light, and thus the contrast ratio of the organic electroluminescence display device is enhanced.

Abstract: A photoresist stripping apparatus and a corresponding method for removing photoresist layers after a patterned polyimide layer is developed. The photoresist-stripping apparatus includes a transporting unit, a stripping unit, a washing unit, a drying unit and a control unit. The transporting unit connects the stripping unit, the washing unit and the drying unit. The control unit is responsible for controlling the transport sequence and timing of the transporting unit. The method of stripping the photoresist layer off the OLED panel includes providing a stripping solution to the stripping unit to remove photoresist layers. The OLED panel is jet-cleaned with a washing solution in the washing unit so that any residual stripping agent is removed. Finally, the surface of the OLED panel is blown dry.

Abstract: A method for forming a pixel-defining layer on an OLED panel comprises the following steps: (A) providing a substrate; (B) forming a plurality of first electrodes in parallel stripes on the substrate; (C) coating a layer of non-photosensitive polyimide or polyimide precursor compositions on the substrate; (D) first prebaking said substrate; (E) coating a layer of photoresist compositions on the layer of non-photosensitive polyimide or polyimide precursor compositions; (F) second prebaking the substrate; (G) forming patterns of the photoresist by exposing the substrate to masked radiaion and developing the photoresist; (H) etching the layer of said non-photosensitive polyimide or polyimide precursor compositions to form patterned polyimide or polyimide precursor compositions; (I) releasing or stripping the patterned layer of the photoresist compositions; and (J) baking the substrate with patterned non-photosensitive polyimide or polyimide precursor compositions to form the pixel-defining layer.

Abstract: An organic electroluminescent panel having a silver alloy is disclosed, which has a substrate; a plurality of the first electrodes; a plurality of the second electrodes; a plurality of conducting lines containing a silver alloy; a plurality of isolating walls; and a plurality of organic electroluminescent media. The first electrodes are arranged in parallel on the substrate. The organic electroluminescent media are disposed on the first electrodes. The second electrodes are disposed on the organic electroluminescent media. The conducting lines containing the silver alloy connect to the first electrodes or the second electrodes. The silver alloy contained in the conducting lines has 80 to 99.8 mol % of silver; 0.1 to 10 mol % of copper; and 0.1 to 10 mol % of at least one transition metal selected from the group consisting of palladium (Pd), magnesium (Mg), gold (Au), platinum (Pt), and the combinations thereof.

Abstract: An integrated circuit device that includes a semiconductor substrate, a well region formed inside the semiconductor substrate, a first isolation structure formed inside the well region, a second isolation structure formed inside the well region and spaced apart from the first isolation structure, a dielectric layer formed over the well region, and a layer of silicon, formed over the dielectric layer, including a p-type portion, an n-type portion and a center portion disposed between the p-type and n-type portions.

Abstract: A silicon-on-isolator CMOS integrated circuit device includes a semiconductor substrate, an isolation layer formed over the semiconductor substrate, an n-type MOS transistor having a gate, a drain region, and a source region formed over the isolation layer, and a p-type MOS transistor having a gate, a drain region, and a source region formed over the isolation layer and contiguous with the n-type MOS transistor, wherein the n-type MOS transistor and the p-type MOS transistor form a silicon controlled rectifier to provide electrostatic discharge protection.

Abstract: An integrated circuit device for electrostatic discharge protection that includes a semiconductor substrate, a lightly doped region of a first dopant type formed in the substrate, a first diffusion region of the first dopant type formed at least partially in the lightly doped region, a second diffusion region of the first dopant type formed at least partially in the lightly doped region and spaced apart from the first diffusion region, a resistive path defined by the lightly doped region, the first and the second diffusion regions, and a third diffusion region of a second dopant type formed in the lightly doped region, and disposed between and spaced apart from the first and the second diffusion regions, wherein the third diffusion region keeps the resistive path at a low resistive state until a normal operation period occurs.

Abstract: An integrated circuit for electrostatic discharge (ESD) protection that comprises a silicon-controlled rectifier (SCR), a first transistor of a first type integrally formed with the SCR including a first gate, a second transistor of a second type integrally formed with the SCR including a second gate, and a control circuit in response to a first voltage applied to the first and second gates providing a first holding voltage to the SCR to keep the SCR from latching-up, and in response to a second voltage applied to the first and second gates providing a second holding voltage to the SCR to keep the SCR in the latch-up state.

Abstract: An integrated circuit for electrostatic discharge protection that includes a silicon-controlled rectifier (SCR) including a substrate of a first dopant type, a semiconductor well of a second dopant type formed in the substrate, a first diffused region of the first dopant type formed in the semiconductor well, and a second diffused region of the second dopant type formed outside the semiconductor well, and a control circuit coupled to the SCR for providing a first holding voltage to the SCR to keep the SCR from latching-up during a first condition and providing a second holding voltage to the SCR to keep the SCR in the latch-up state during a second condition, the first holding voltage being different from the second holding voltage.

Abstract: A bi-directional silicon controlled rectifier formed in a silicon layer and disposed over shallow trench isolations and therefore electrically isolated from the substrate to be insensitive to substrate noise for electrostatic discharge protection an electrostatic discharge protection device that includes a semiconductor substrate, including a first p-type portion, a first n-type portion contiguous with the first p-type portion, a second p-type portion contiguous with the first p-type portion and the first n-type portion, a second n-type portion, a third p-type portion, a third n-type portion contiguous with the third p-type portion, and a fourth p-type portion contiguous with the third p-type portion and the third n-type portion, wherein at least one of the first p-type portion, second p-type portion, third p-type portion, fourth p-type portion, first n-type portion, second n-type portion, and third n-type portion overlaps the isolation structure.

Abstract: The present invention is related to an alloy target used for producing thin film electrodes, consisting of silver (Ag), copper (Cu), and at least one precious metal selected from the group consisting of palladium (Pd), gold (Au) and platinum (Pt); wherein the mole ratio of said silver ranges from 0.8 to 0.999; the mole ratio of said copper ranges from 0.001 to 0.1; the mole ratio of said precious metal ranges from 0.001 to 0.1; and the total mole ratio of said alloy target is 1.

Abstract: A photoresist stripping apparatus and a corresponding method for removing photoresist layers after a patterned polyimide layer is developed. The photoresist-stripping apparatus includes a transporting unit, a stripping unit, a washing unit, a drying unit and a control unit. The transporting unit connects the stripping unit, the washing unit and the drying unit. The control unit is responsible for controlling the transport sequence and timing of the transporting unit. The method of stripping the photoresist layer off the OLED panel includes providing a stripping solution to the stripping unit to remove photoresist layers. The OLED panel is jet-cleaned with a washing solution in the washing unit so that any residual stripping agent is removed. Finally, the surface of the OLED panel is blown dry.

Abstract: An electrostatic discharge protection device that includes a semiconductor substrate of a first dopant type, at least one source/drain pair of a second dopant type formed in the substrate, wherein the source/drain pair is separated to define a channel region therebetween, a lightly-doped region of the first dopant type defined between the source/drain pair and including at least a portion of the channel region, a gate dielectric layer formed over the substrate, and a gate formed over the gate dielectric layer and above the channel region.

Abstract: An electrostatic discharge protection circuit that includes a first terminal, a second terminal, an electrostatic discharge device coupled between the first and second terminals, and an active device coupled to the electrostatic discharge device and controlling an electrostatic current to the electrostatic discharge device.