Abstract: A panel for an organic electroluminescent device is disclosed, which has a substrate having a first conducting area, a second conducting area, a third conducting area, and an active area; wherein active area locates between first conducting area and second conducting area; third conducting area locates at one side of active area; first conducting area, second conducting area, third conducting area and active area are integrated together on the surface of substrate; and third conducting area locates adjacent to first conducting area, second conducting area, and active area; a plurality of first conducting lines located in first conducting area on the substrate, a plurality of second conducting lines located in second conducting area on the substrate, and a plurality of third conducting lines located in third conducting area on the substrates.

Abstract: An integrated circuit device that includes a semiconductor substrate, a well region formed inside the semiconductor substrate, a first isolation structure formed inside the well region, a second isolation structure formed inside the well region and spaced apart from the first isolation structure, a dielectric layer formed over the well region, and a layer of silicon, formed over the dielectric layer, including a p-type portion, an n-type portion and a center portion disposed between the p-type and n-type portions.

Abstract: A method and an apparatus for transporting substrates in all organic light emitting diode (OLED) process is disclosed, which has a transferring chamber provided for transporting substrates between processing modules and the atmosphere condition therein is able to be adjusted to be the same as the processing module by an atmosphere conditioner unit. According to the present invention, the substrates are not contaminated by moisture and the process operation and the factory layout are more flexible. Moreover, the OLED yield is improved.

Abstract: An illuminating device, relating particularly to an OLED illuminating lamp suitable for a dark environment, is disclosed. The device includes an organic light-emitting panel for providing a light source, a translucent diffusive substrate for uniformly diffusing the light source, and a housing having a chamber for receiving the organic light-emitting panel and the translucent diffusive substrate mounted between the organic light-emitting panel and the housing and a window through which passes light emitting from the organic light-emitting panel.

Abstract: An ESD protection circuit with whole-chip ESD protection. A plurality of ESD protection devices, apart from an ESD detection circuit, can be MOS transistors connected between the input/output pads and the VDD/VSS lines or a power rail clamp circuit between the VDD and VSS lines. The ESD detection circuit is connected between the VDD and VSS lines. When an ESD event occurs and an ESD current is bypassed to the power line, the ESD detection circuit generates a plurality of enabling signals to simultaneously enable the ESD protection devices, which provides a plurality of discharge paths to bypass the ESD current.

Abstract: A photoresist stripping apparatus and a corresponding method for removing photoresist layers after a patterned polyimide layer is developed. The photoresist-stripping apparatus includes a transporting unit, a stripping unit, a washing unit, a drying unit and a control unit. The transporting unit connects the stripping unit, the washing unit and the drying unit. The control unit is responsible for controlling the transport sequence and timing of the transporting unit. The method of stripping the photoresist layer off the OLED panel includes providing a stripping solution to the stripping unit to remove photoresist layers. The OLED panel is jet-cleaned with a washing solution in the washing unit so that any residual stripping agent is removed. Finally, the surface of the OLED panel is blown dry.

Abstract: A bi-directional silicon controlled rectifier formed in a silicon layer and disposed over shallow trench isolations and therefore electrically isolated from the substrate to be insensitive to substrate noise for electrostatic discharge protection an electrostatic discharge protection device that includes a semiconductor substrate, including a first p-type portion, a first n-type portion contiguous with the first p-type portion, a second p-type portion contiguous with the first p-type portion and the first n-type portion, a second n-type portion, a third p-type portion, a third n-type portion contiguous with the third p-type portion, and a fourth p-type portion contiguous with the third p-type portion and the third n-type portion, wherein at least one of the first p-type portion, second p-type portion, third p-type portion, fourth p-type portion, first n-type portion, second n-type portion, and third n-type portion overlaps the isolation structure.

Abstract: An integrated circuit device that includes a semiconductor substrate, a well region formed inside the semiconductor substrate, a first isolation structure contiguous with the well region, a second isolation structure contiguous with well region and spaced apart from the first isolation structure, a dielectric layer disposed over the well region and the first and second isolation structures, and a layer of silicon, formed over the dielectric layer, including a first p-type portion, a first n-type portion contiguous with the first p-type portion, a second p-type portion, and a second n-type portion contiguous with the second p-type portion, wherein at least a portion of the first p-type and first n-type portions overlap the first isolation structure and at least a portion of the second p-type and second n-type portions overlap the second isolation structure.

Abstract: An integrated circuit device that includes a plurality of electrostatic discharge clamp circuits, variously coupled to VDD, VSS and transistor, having at least one bi-directional silicon diode that includes a first silicon diode and a second silicon diode, wherein an n-type portion of the first silicon diode is coupled to a p-type portion of the second silicon diode and a p-type portion of the first silicon diode is coupled to an n-type portion of the second silicon diode, responsive to either a positive electrostatic discharge or a negative electrostatic discharge to provide electrostatic discharge protection.

Abstract: A photoresist stripping apparatus and a corresponding method for removing photoresist layers after a patterned polyimide layer is developed. The photoresist-stripping apparatus includes a transporting unit, a stripping unit, a washing unit, a drying unit and a control unit. The transporting unit connects the stripping unit, the washing unit and the drying unit. The control unit is responsible for controlling the transport sequence and timing of the transporting unit. The method of stripping the photoresist layer off the OLED panel includes providing a stripping solution to the stripping unit to remove photoresist layers. The OLED panel is jet-cleaned with a washing solution in the washing unit so that any residual stripping agent is removed. Finally, the surface of the OLED panel is blown dry.

Abstract: An integrated circuit device that includes a semiconductor substrate, a well region formed inside the semiconductor substrate, a first isolation structure formed inside the well region, a second isolation structure formed inside the well region and spaced apart from the first isolation structure, a dielectric layer formed over the well region, and a layer of silicon, formed over the dielectric layer, including a p-type portion, an n-type portion and a center portion disposed between the p-type and n-type portions.

Abstract: A method of the invention for forming a pixel-defining layer on an OLED panel is disclosed.

Abstract: A silicon-on-isolator CMOS integrated circuit device includes a semiconductor substrate, an isolation layer formed over the semiconductor substrate, an n-type MOS transistor having a gate, a drain region, and a source region formed over the isolation layer, and a p-type MOS transistor having a gate, a drain region, and a source region formed over the isolation layer and contiguous with the n-type MOS transistor, wherein the n-type MOS transistor and the p-type MOS transistor form a silicon controlled rectifier to provide electrostatic discharge protection.

Abstract: An ESD protection circuit using a novel substrate-triggered lateral bipolar junction transistor (STLBJT) for providing a discharging path between power rails. The ESD protection circuit comprises an ESD detection circuit and a STLBJT device. The STLBJT device formed in a P-type substrate includes N-type collector and emitter regions coupled to the power rails, respectively. The substrate region between the collector and emitter regions, on which there is no field oxide device, serves as a base of the STLBJT device. The STLBJT device further includes a first P-type region coupled to the ESD detection circuit and a second P-type region coupled to one of the power rails, which are spatially separated from the collector/emitter regions, respectively. The STLBJT device is turned on by substrate-triggering responsive to the signal coming from the ESD detection circuit and establishes the discharging path between the power rails.

Abstract: A developing apparatus for organic electroluminescent display panels comprises a developing unit for supplying a developing solution to be uniformly dispensed to the surface of an organic electroluminescent display panel by immersing the organic electroluminescent display panel into the developing solution or spreading the developing solution over the organic electroluminescent display panel, a cleaning unit having at least a bath connected to the end of the developing unit for spraying a recycled cleaning liquid or cleaning liquid over the organic electroluminescent display panel, a drying unit having at least an airflow driers, and a transporting unit for transporting the electroluminescent display panel; wherein the organic electroluminescent display panel is transported at a constant speed by the transporting unit of the developing apparatus.

Abstract: An integrated circuit device receiving signals from a signal pad that includes at least one silicon bipolar junction transistor responsive to the signals from the signal pad for providing electrostatic discharge protection, and a detection circuit for detecting the signals from the signal pad and providing a bias voltage to the at least one silicon bipolar junction transistor, wherein the at least one silicon bipolar junction transistor includes an emitter, collector and base formed in a single silicon layer and isolated from a substrate of the integrated circuit device, and wherein the base is coupled to the detection circuit to receive the bias voltage.

Abstract: A method of the invention for forming a pixel-defining layer on an OLED panel is disclosed.

Abstract: A method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process is provided. In the present lateral SCR device, the shallow trench isolation among the current conduction path of the lateral SCR device is removed and instead of a dummy gate. Thereby, the SCR device has a narrower anode-to-cathode spacing, and then the lateral SCR device can be turned on more quickly to protect the CMOS IC's in ESD events. Additionally, the silicon area of the substrate occupied by the lateral SCR device is also saved. This method for forming a lateral SCR device without shallow-trench-isolation regions in its current path can be fully process-compatible to general CMOS technologies by only changing layout patterns in the mask layers.

Abstract: An integrated circuit device that includes a semiconductor substrate, a well region formed inside the semiconductor substrate, a first isolation structure contiguous with the well region, a second isolation structure contiguous with well region and spaced apart from the first isolation structure, a dielectric layer disposed over the well region and the first and second isolation structures, and a layer of silicon, formed over the dielectric layer, including a first p-type portion, a first n-type portion contiguous with the first p-type portion, a second p-type portion, and a second n-type portion contiguous with the second p-type portion, wherein at least a portion of the first p-type and first n-type portions overlap the first isolation structure and at least a portion of the second p-type and second n-type portions overlap the second isolation structure.

Abstract: A method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process is provided. In the present lateral SCR device, the shallow trench isolation among the current conduction path of the lateral SCR device is removed and instead of a dummy gate. Thereby, the SCR device has a narrower anode-to-cathode spacing, and then the lateral SCR device can be turned on more quickly to protect the CMOS IC's in ESD events. Additionally, the silicon area of the substrate occupied by the lateral SCR device is also saved. This method for forming a lateral SCR device without shallow-trench-isolation regions in its current path can be fully process-compatible to general CMOS technologies by only changing layout patterns in the mask layers.